)]}'
{
  "commit": "04414221df53bb5129e34bec354dae3121db436a",
  "tree": "f48b3ff309a2710bd1898134c2039141418b7218",
  "parents": [
    "4deb1ee57fdb711cac6f36fed75b3c8cb5112d99"
  ],
  "author": {
    "name": "Claudiu Zissulescu",
    "email": "claziss@synopsys.com",
    "time": "Mon Sep 25 10:55:51 2023 +0300"
  },
  "committer": {
    "name": "Claudiu Zissulescu",
    "email": "claziss@gmail.com",
    "time": "Mon Sep 25 10:55:51 2023 +0300"
  },
  "message": "arc: Update opcode related include files for ARCv3.\n\nAdd new ARCv3 CPUs and required bits to decode/encode ARCv3 ISA\nopcodes. Fix 32 bit relocations which were set as signed but should be\nbitfield: ARC_32_ME, ARC_GLOB_DAT, ARC_JMP_SLOT, ARC_RELATIVE. Remove\nnon-ABI relocation ARC_32_ME_S.\n\ninclude/\nxxxx-xx-xx  Claudiu Zissulescu  \u003cclaziss@synopsys.com\u003e\n\t    Cupertino Miranda  \u003ccupertinomiranda@gmail.com\u003e\n\t    Bruno Mauricio \u003cbrunoasmauricio@gmail.com\u003e\n\n\t* include/elf/arc-cpu.def: Add new HS5x and HS6x CPUs.\n\t* include/elf/arc-reloc.def: Add new ARC64 relocations.\n\t* include/elf/arc.h (EF_ARC_CPU_ARC64): New define.\n\t* include/opcode/arc-attrs.h (FEATURE_LIST_NAME): Update predicate.\n\t* include/opcode/arc-func.h: Update formating.\n\t(replace_disp8ls): New function.\n\t(replace_disp9s): Likewise.\n\t(replace_disp6s): Likewise.\n\t(replace_disp7s): Likewise.\n\t(replace_disp12s): Likewise.\n\t* include/opcode/arc.h (ARC_OPCODE_ARC64): New define.\n\t(ARC_OPCODE_ARC32): Likewise.\n\t(ARC_OPERAND_FP): Likewise.\n\t(HARD_FIELDF): Likewise.\n\t(ARC_OPCODE_ARCVx): New macro.\n\t(arc_flag_class): Update structure to hold new extract/insert\n\tfunctions for flags.\n\t(INSN3OP): Update macro.\n\t(FP_SIZE, TPOF, DPOF, SOPF, COPF, CONVOPS): New enums.\n\nSigned-off-by: Claudiu Zissulescu \u003cclaziss@synopsys.com\u003e\n",
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