)]}'
{
  "commit": "199cfcc4754cea6f4c42dcbb8d8d5161f5b2d186",
  "tree": "421a44c2103aed91928b78ca2ac89ce055c9ffb1",
  "parents": [
    "d09b87e0b11f14c267014e22716b91ba61c1e458"
  ],
  "author": {
    "name": "Richard Sandiford",
    "email": "richard.sandiford@arm.com",
    "time": "Thu Mar 30 11:09:09 2023 +0100"
  },
  "committer": {
    "name": "Richard Sandiford",
    "email": "richard.sandiford@arm.com",
    "time": "Thu Mar 30 11:09:09 2023 +0100"
  },
  "message": "aarch64: Add a aarch64_cpu_supports_inst_p helper\n\nQuite a lot of SME2 instructions have an opcode bit that selects\nbetween 32-bit and 64-bit forms of an instruction, with the 32-bit\nforms being part of base SME2 and with the 64-bit forms being part\nof an optional extension.  It\u0027s nevertheless useful to have a single\nopcode entry for both forms since (a) that matches the ISA definition\nand (b) it tends to improve error reporting.\n\nThis patch therefore adds a libopcodes function called\naarch64_cpu_supports_inst_p that tests whether the target\nsupports a particular instruction.  In future it will depend\non internal libopcodes routines.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c8e37623d9e34c71b12b88311bcf0e716df1b829",
      "old_mode": 33188,
      "old_path": "gas/config/tc-aarch64.c",
      "new_id": "71b63d3f7b348d89be755e20c5e8d3e9db411e62",
      "new_mode": 33188,
      "new_path": "gas/config/tc-aarch64.c"
    },
    {
      "type": "modify",
      "old_id": "d09897f48d40acab86dd4c96215c19d3768ead75",
      "old_mode": 33188,
      "old_path": "include/opcode/aarch64.h",
      "new_id": "61afe561a12f83a2636103ad1ba8bb810470df46",
      "new_mode": 33188,
      "new_path": "include/opcode/aarch64.h"
    },
    {
      "type": "modify",
      "old_id": "b9029010c47d76fc71ee7eab748b6f0d4a684a92",
      "old_mode": 33188,
      "old_path": "opcodes/aarch64-opc.c",
      "new_id": "7a88c19633da765513653020e85fb4b7ba023a01",
      "new_mode": 33188,
      "new_path": "opcodes/aarch64-opc.c"
    }
  ]
}