)]}'
{
  "commit": "1ba39b6fe595d05bbfdf7abebaea2883ddb9d717",
  "tree": "3e13fc633f0cfe9df234e7167151f93781d88f95",
  "parents": [
    "9a51da2636778dce2e2635cb10822a92a51b2b9e"
  ],
  "author": {
    "name": "Jin Ma",
    "email": "jinma@linux.alibaba.com",
    "time": "Sat Nov 18 15:07:39 2023 +0800"
  },
  "committer": {
    "name": "Nelson Chu",
    "email": "nelson@rivosinc.com",
    "time": "Thu Nov 23 09:32:03 2023 +0800"
  },
  "message": "RISC-V: Add floating-point arithmetic instructions for T-Head VECTOR vendor extension\n\nT-Head has a range of vendor-specific instructions. Therefore\nit makes sense to group them into smaller chunks in form of\nvendor extensions.\n\nThis patch adds floating-point arithmetic instructions for the\n\"XTheadVector\" extension. The \u0027th\u0027 prefix and the\n\"XTheadVector\" extension are documented in a PR for the\nRISC-V toolchain conventions ([1]).\n\n[1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19\n\nCo-developed-by: Lifang Xia \u003clifang_xia@linux.alibaba.com\u003e\nCo-developed-by: Christoph Müllner \u003cchristoph.muellner@vrull.eu\u003e\n\ngas/ChangeLog:\n\n\t* testsuite/gas/riscv/x-thead-vector.d: Add tests for\n\tfloating-point arithmetic instructions.\n\t* testsuite/gas/riscv/x-thead-vector.s: Likewise.\n\ninclude/ChangeLog:\n\n\t* opcode/riscv-opc.h (MATCH_TH_VFSQRTV): New.\n\nopcodes/ChangeLog:\n\n\t* riscv-opc.c: Likewise.\n",
  "tree_diff": [
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}