| //Original:/testcases/core/c_dsp32alu_rrpmmp/c_dsp32alu_rrpmmp.dsp |
| // Spec Reference: dsp32alu (dreg, dreg) = +/-, -/+ (dreg, dreg) amod0 |
| # mach: bfin |
| |
| .include "testutils.inc" |
| start |
| |
| |
| |
| |
| imm32 r0, 0x35678911; |
| imm32 r1, 0x2489ab1d; |
| imm32 r2, 0x34545515; |
| imm32 r3, 0x46667717; |
| imm32 r0, 0x5567891b; |
| imm32 r1, 0x67889b1d; |
| imm32 r2, 0x74445915; |
| imm32 r3, 0x86667797; |
| R0 = R0 +|- R0 , R7 = R0 -|+ R0; |
| R1 = R0 +|- R1 , R6 = R0 -|+ R1; |
| R2 = R0 +|- R2 , R5 = R0 -|+ R2; |
| R3 = R0 +|- R3 , R4 = R0 -|+ R3; |
| R4 = R0 +|- R4 , R3 = R0 -|+ R4; |
| R5 = R0 +|- R5 , R2 = R0 -|+ R5; |
| R6 = R0 +|- R6 , R1 = R0 -|+ R6; |
| R7 = R0 +|- R7 , R0 = R0 -|+ R7; |
| CHECKREG r0, 0xAACE1236; |
| CHECKREG r1, 0x67889B1D; |
| CHECKREG r2, 0x74445915; |
| CHECKREG r3, 0x86667797; |
| CHECKREG r4, 0xCF368869; |
| CHECKREG r5, 0xE158A6EB; |
| CHECKREG r6, 0xEE1464E3; |
| CHECKREG r7, 0xAACEEDCA; |
| |
| imm32 r0, 0xe5678911; |
| imm32 r1, 0x2e89ab1d; |
| imm32 r2, 0x34e45515; |
| imm32 r3, 0x466e7717; |
| imm32 r0, 0x5567ee1b; |
| imm32 r1, 0x6789abed; |
| imm32 r2, 0x7444551e; |
| imm32 r3, 0x86e67777; |
| R0 = R1 +|- R0 , R7 = R1 -|+ R0; |
| R1 = R1 +|- R1 , R6 = R1 -|+ R1; |
| R2 = R1 +|- R2 , R5 = R1 -|+ R2; |
| R3 = R1 +|- R3 , R4 = R1 -|+ R3; |
| R4 = R1 +|- R4 , R3 = R1 -|+ R4; |
| R5 = R1 +|- R5 , R2 = R1 -|+ R5; |
| R6 = R1 +|- R6 , R1 = R1 -|+ R6; |
| R7 = R1 +|- R7 , R0 = R1 -|+ R7; |
| CHECKREG r0, 0xBCF0F1E2; |
| CHECKREG r1, 0xCF1257DA; |
| CHECKREG r2, 0x7444551E; |
| CHECKREG r3, 0x86E67777; |
| CHECKREG r4, 0x173E8889; |
| CHECKREG r5, 0x29E0AAE2; |
| CHECKREG r6, 0xCF12A826; |
| CHECKREG r7, 0xE134BDD2; |
| |
| imm32 r0, 0x15678911; |
| imm32 r1, 0x2789ab1d; |
| imm32 r2, 0x34445515; |
| imm32 r3, 0x46667717; |
| imm32 r0, 0x5567891b; |
| imm32 r1, 0x6789ab1d; |
| imm32 r2, 0x74445515; |
| imm32 r3, 0x86667777; |
| R0 = R2 +|- R0 , R7 = R2 -|+ R0; |
| R1 = R2 +|- R1 , R6 = R2 -|+ R1; |
| R2 = R2 +|- R2 , R5 = R2 -|+ R2; |
| R3 = R2 +|- R3 , R4 = R2 -|+ R3; |
| R4 = R2 +|- R4 , R3 = R2 -|+ R4; |
| R5 = R2 +|- R5 , R2 = R2 -|+ R5; |
| R6 = R2 +|- R6 , R1 = R2 -|+ R6; |
| R7 = R2 +|- R7 , R0 = R2 -|+ R7; |
| CHECKREG r0, 0xC9AB885A; |
| CHECKREG r1, 0xDBCDAA5C; |
| CHECKREG r2, 0xE888AA2A; |
| CHECKREG r3, 0x86667777; |
| CHECKREG r4, 0x4AAA8889; |
| CHECKREG r5, 0xE88855D6; |
| CHECKREG r6, 0xF543A9F8; |
| CHECKREG r7, 0x0765CBFA; |
| |
| imm32 r0, 0x85678911; |
| imm32 r1, 0x2889ab1d; |
| imm32 r2, 0x34445515; |
| imm32 r3, 0x46667717; |
| imm32 r0, 0x5587891b; |
| imm32 r1, 0x6788ab1d; |
| imm32 r2, 0x74448515; |
| imm32 r3, 0x86667877; |
| R0 = R3 +|- R0 , R7 = R3 -|+ R0; |
| R1 = R3 +|- R1 , R6 = R3 -|+ R1; |
| R2 = R3 +|- R2 , R5 = R3 -|+ R2; |
| R3 = R3 +|- R3 , R4 = R3 -|+ R3; |
| R4 = R3 +|- R4 , R3 = R3 -|+ R4; |
| R5 = R3 +|- R5 , R2 = R3 -|+ R5; |
| R6 = R3 +|- R6 , R1 = R3 -|+ R6; |
| R7 = R3 +|- R7 , R0 = R3 -|+ R7; |
| CHECKREG r0, 0xDBEDF280; |
| CHECKREG r1, 0xEDEE1482; |
| CHECKREG r2, 0xFAAAEE7A; |
| CHECKREG r3, 0x0CCCF0EE; |
| CHECKREG r4, 0x0CCC0F12; |
| CHECKREG r5, 0x1EEEF362; |
| CHECKREG r6, 0x2BAACD5A; |
| CHECKREG r7, 0x3DABEF5C; |
| |
| imm32 r0, 0x15678911; |
| imm32 r1, 0x2789ab1d; |
| imm32 r2, 0x34445515; |
| imm32 r3, 0x46667717; |
| imm32 r0, 0x5567891b; |
| imm32 r1, 0x6789ab1d; |
| imm32 r2, 0x74445515; |
| imm32 r3, 0x86667777; |
| R0 = R4 +|- R0 , R7 = R4 -|+ R0; |
| R1 = R4 +|- R1 , R6 = R4 -|+ R1; |
| R2 = R4 +|- R2 , R5 = R4 -|+ R2; |
| R3 = R4 +|- R3 , R4 = R4 -|+ R3; |
| R4 = R4 +|- R4 , R3 = R4 -|+ R4; |
| R5 = R4 +|- R5 , R2 = R4 -|+ R5; |
| R6 = R4 +|- R6 , R1 = R4 -|+ R6; |
| R7 = R4 +|- R7 , R0 = R4 -|+ R7; |
| CHECKREG r0, 0x5567982D; |
| CHECKREG r1, 0x6789BA2F; |
| CHECKREG r2, 0x74446427; |
| CHECKREG r3, 0x00000D12; |
| CHECKREG r4, 0x0CCC0000; |
| CHECKREG r5, 0xA5549BD9; |
| CHECKREG r6, 0xB20F45D1; |
| CHECKREG r7, 0xC43167D3; |
| |
| imm32 r0, 0x95678911; |
| imm32 r1, 0x2789ab1d; |
| imm32 r2, 0x39445515; |
| imm32 r3, 0x46967717; |
| imm32 r0, 0x5567891b; |
| imm32 r1, 0x6789ab1d; |
| imm32 r2, 0x74495515; |
| imm32 r3, 0x86669777; |
| R0 = R5 +|- R0 , R7 = R5 -|+ R0; |
| R1 = R5 +|- R1 , R6 = R5 -|+ R1; |
| R2 = R5 +|- R2 , R5 = R5 -|+ R2; |
| R3 = R5 +|- R3 , R4 = R5 -|+ R3; |
| R4 = R5 +|- R4 , R3 = R5 -|+ R4; |
| R5 = R5 +|- R5 , R2 = R5 -|+ R5; |
| R6 = R5 +|- R6 , R1 = R5 -|+ R6; |
| R7 = R5 +|- R7 , R0 = R5 -|+ R7; |
| CHECKREG r0, 0x122924F4; |
| CHECKREG r1, 0x244B46F6; |
| CHECKREG r2, 0x0000E1DC; |
| CHECKREG r3, 0x86667953; |
| CHECKREG r4, 0xDBB06889; |
| CHECKREG r5, 0x62160000; |
| CHECKREG r6, 0x9FE1B90A; |
| CHECKREG r7, 0xB203DB0C; |
| |
| imm32 r0, 0x15678911; |
| imm32 r1, 0x2789ab1d; |
| imm32 r2, 0x34445515; |
| imm32 r3, 0x46667717; |
| imm32 r0, 0x5567891b; |
| imm32 r1, 0x6789ab1d; |
| imm32 r2, 0x74445515; |
| imm32 r3, 0x86667777; |
| R0 = R6 +|- R0 , R7 = R6 -|+ R0; |
| R1 = R6 +|- R1 , R6 = R6 -|+ R1; |
| R2 = R6 +|- R2 , R5 = R6 -|+ R2; |
| R3 = R6 +|- R3 , R4 = R6 -|+ R3; |
| R4 = R6 +|- R4 , R3 = R6 -|+ R4; |
| R5 = R6 +|- R5 , R2 = R6 -|+ R5; |
| R6 = R6 +|- R6 , R1 = R6 -|+ R6; |
| R7 = R6 +|- R7 , R0 = R6 -|+ R7; |
| CHECKREG r0, 0x26364225; |
| CHECKREG r1, 0x0000C84E; |
| CHECKREG r2, 0x74441D63; |
| CHECKREG r3, 0x86663FC5; |
| CHECKREG r4, 0xEA4A8889; |
| CHECKREG r5, 0xFC6CAAEB; |
| CHECKREG r6, 0x70B00000; |
| CHECKREG r7, 0xBB2ABDDB; |
| |
| imm32 r0, 0x67898911; |
| imm32 r1, 0xb789ab1d; |
| imm32 r2, 0x3b445515; |
| imm32 r3, 0x46b67717; |
| imm32 r0, 0x5567891b; |
| imm32 r1, 0x678bab1d; |
| imm32 r2, 0x7444b515; |
| imm32 r3, 0x86667b77; |
| R0 = R7 +|- R0 , R7 = R7 -|+ R0; |
| R1 = R7 +|- R1 , R6 = R7 -|+ R1; |
| R2 = R7 +|- R2 , R5 = R7 -|+ R2; |
| R3 = R7 +|- R3 , R4 = R7 -|+ R3; |
| R4 = R7 +|- R4 , R3 = R7 -|+ R4; |
| R5 = R7 +|- R5 , R2 = R7 -|+ R5; |
| R6 = R7 +|- R6 , R1 = R7 -|+ R6; |
| R7 = R7 +|- R7 , R0 = R7 -|+ R7; |
| CHECKREG r0, 0x00008DEC; |
| CHECKREG r1, 0x678B3909; |
| CHECKREG r2, 0x74444301; |
| CHECKREG r3, 0x86660963; |
| CHECKREG r4, 0x45208489; |
| CHECKREG r5, 0x57424AEB; |
| CHECKREG r6, 0x63FB54E3; |
| CHECKREG r7, 0xCB860000; |
| |
| imm32 r0, 0xe5678911; |
| imm32 r1, 0x2e89ab1d; |
| imm32 r2, 0x34ee5515; |
| imm32 r3, 0x4666e717; |
| imm32 r0, 0x5567891b; |
| imm32 r1, 0x6789ae1d; |
| imm32 r2, 0x744455e5; |
| imm32 r3, 0x8666777e; |
| R4 = R2 +|- R5 , R3 = R2 -|+ R5 (S); |
| R0 = R5 +|- R3 , R5 = R5 -|+ R3 (CO); |
| R2 = R6 +|- R2 , R0 = R6 -|+ R2 (SCO); |
| R3 = R4 +|- R0 , R2 = R4 -|+ R0 (S); |
| R7 = R7 +|- R6 , R6 = R7 -|+ R6 (CO); |
| R6 = R1 +|- R7 , R1 = R1 -|+ R7 (SCO); |
| R5 = R0 +|- R4 , R7 = R0 -|+ R4 (S); |
| R1 = R3 +|- R1 , R4 = R3 -|+ R1 (CO); |
| CHECKREG r0, 0x7FFFEFB7; |
| CHECKREG r1, 0xFFFFE33B; |
| CHECKREG r2, 0x0000FAB1; |
| CHECKREG r3, 0x7FFF1B43; |
| CHECKREG r4, 0x534BFFFF; |
| CHECKREG r5, 0x7FFFE4BD; |
| CHECKREG r6, 0x7FFF0300; |
| CHECKREG r7, 0x0000FAB1; |
| |
| imm32 r0, 0xff678911; |
| imm32 r1, 0x2789ab1d; |
| imm32 r2, 0x3f445515; |
| imm32 r3, 0x46f67717; |
| imm32 r0, 0x556f891b; |
| imm32 r1, 0x6789fb1d; |
| imm32 r2, 0x74445f15; |
| imm32 r3, 0x866677f7; |
| R4 = R3 +|- R3 , R5 = R3 -|+ R3 (SCO); |
| R1 = R6 +|- R1 , R6 = R6 -|+ R1 (SCO); |
| R6 = R1 +|- R4 , R4 = R1 -|+ R4 (S); |
| R7 = R4 +|- R2 , R0 = R4 -|+ R2 (S); |
| R2 = R2 +|- R6 , R1 = R2 -|+ R6 (CO); |
| R3 = R5 +|- R5 , R7 = R5 -|+ R5 (CO); |
| R5 = R7 +|- R7 , R3 = R7 -|+ R7 (SCO); |
| R0 = R0 +|- R0 , R2 = R0 -|+ R0 (SCO); |
| CHECKREG r0, 0x17760000; |
| CHECKREG r1, 0x66F87445; |
| CHECKREG r2, 0x7FFF0000; |
| CHECKREG r3, 0x00000000; |
| CHECKREG r4, 0x7FFF07E3; |
| CHECKREG r5, 0x00000000; |
| CHECKREG r6, 0xFFFF07E3; |
| CHECKREG r7, 0x00000000; |
| |
| |
| |
| pass |
