blob: d232802eb575d2e38afe3046c37ef3c91c2eb0f2 [file] [log] [blame]
# frv testcase for srlicc $GRi,$s10,$GRk,$ICCi_1
# mach: all
.include "testutils.inc"
start
.global srlicc
srlicc:
set_gr_limmed 0x8000,0x0000,gr8
set_icc 0x05,0 ; Set mask opposite of expected
srlicc gr8,0x1e0,gr8,icc0 ; Shift by 0
test_icc 1 0 0 0 icc0
test_gr_limmed 0x8000,0x0000,gr8
set_gr_limmed 0x8000,0x0000,gr8
set_icc 0x0f,0 ; Set mask opposite of expected
srlicc gr8,-31,gr8,icc0 ; Shift by 1
test_icc 0 0 1 0 icc0
test_gr_limmed 0x4000,0x0000,gr8
set_gr_limmed 0x8000,0x0000,gr8
set_icc 0x0f,0 ; Set mask opposite of expected
srlicc gr8,31,gr8,icc0 ; Shift by 31
test_icc 0 0 1 0 icc0
test_gr_immed 1,gr8
set_gr_limmed 0x4000,0x0000,gr8
set_icc 0x0a,0 ; Set mask opposite of expected
srlicc gr8,31,gr8,icc0 ; clear register
test_icc 0 1 1 1 icc0
test_gr_immed 0x00000000,gr8
pass