)]}'
{
  "commit": "265b467340e5334a682e47a0e1b69a80c4428349",
  "tree": "b267535c51ac8f000eda24751f03ef77b7aeb8c6",
  "parents": [
    "70d497007d097a68cbd5e78104619f4f88a09838"
  ],
  "author": {
    "name": "Claudiu Zissulescu",
    "email": "claziss@gmail.com",
    "time": "Tue Feb 25 10:27:07 2020 +0200"
  },
  "committer": {
    "name": "Claudiu Zissulescu",
    "email": "claziss@gmail.com",
    "time": "Tue Feb 25 10:27:07 2020 +0200"
  },
  "message": "[ARC][committed] Update int_vector_base aux register.\n\nINT_VECTOR_BASE auxiliary register is available across all ARC\narchitectures.\n\nxxxx-xx-xx  Claudiu Zissulescu \u003cclaziss@gmail.com\u003e\n\n\t* arc-regs.h (int_vector_base): Make it available for all ARC\n\tCPUs.\n\nSigned-off-by: Claudiu Zissulescu \u003cclaziss@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "73091b9e61d16bef786188b8c2238cbc5bfaa591",
      "old_mode": 33188,
      "old_path": "opcodes/ChangeLog",
      "new_id": "5d8357864185ceae4a8ab50d8380f1d2ef7464d5",
      "new_mode": 33188,
      "new_path": "opcodes/ChangeLog"
    },
    {
      "type": "modify",
      "old_id": "a1d98bf17942792e1f7a7cd133c95912f81753e0",
      "old_mode": 33188,
      "old_path": "opcodes/arc-regs.h",
      "new_id": "4494a0630a1c7f9d561aed538771daf54ee622b3",
      "new_mode": 33188,
      "new_path": "opcodes/arc-regs.h"
    }
  ]
}