[^:]*: Assembler messages:
[^:]*:10: Error: bad type in SIMD instruction -- `vmaxv.u64 r0,q1'
[^:]*:11: Error: bad type in SIMD instruction -- `vmaxv.f16 r0,q1'
[^:]*:12: Error: bad type in SIMD instruction -- `vminv.s64 r0,q1'
[^:]*:13: Error: bad type in SIMD instruction -- `vminv.f32 r0,q1'
[^:]*:14: Error: bad type in SIMD instruction -- `vmaxav.u16 r0,q1'
[^:]*:15: Error: bad type in SIMD instruction -- `vmaxav.f32 r0,q1'
[^:]*:16: Error: bad type in SIMD instruction -- `vminav.u32 r0,q1'
[^:]*:17: Error: bad type in SIMD instruction -- `vminav.f16 r0,q1'
[^:]*:18: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:19: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:20: Warning: instruction is UNPREDICTABLE with PC operand
[^:]*:21: Warning: instruction is UNPREDICTABLE with SP operand
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:22: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:23: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:24: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:27: Error: syntax error -- `vmaxveq.s32 r0,q1'
[^:]*:28: Error: syntax error -- `vmaxveq.s32 r0,q1'
[^:]*:30: Error: syntax error -- `vmaxveq.s32 r0,q1'
[^:]*:31: Error: vector predicated instruction should be in VPT/VPST block -- `vmaxvt.s32 r0,q1'
[^:]*:33: Error: instruction missing MVE vector predication code -- `vmaxv.s32 r0,q1'
[^:]*:35: Error: syntax error -- `vmaxaveq.s32 r0,q1'
[^:]*:36: Error: syntax error -- `vmaxaveq.s32 r0,q1'
[^:]*:38: Error: syntax error -- `vmaxaveq.s32 r0,q1'
[^:]*:39: Error: vector predicated instruction should be in VPT/VPST block -- `vmaxavt.s32 r0,q1'
[^:]*:41: Error: instruction missing MVE vector predication code -- `vmaxav.s32 r0,q1'
[^:]*:43: Error: syntax error -- `vminveq.s32 r0,q1'
[^:]*:44: Error: syntax error -- `vminveq.s32 r0,q1'
[^:]*:46: Error: syntax error -- `vminveq.s32 r0,q1'
[^:]*:47: Error: vector predicated instruction should be in VPT/VPST block -- `vminvt.s32 r0,q1'
[^:]*:49: Error: instruction missing MVE vector predication code -- `vminv.s32 r0,q1'
[^:]*:51: Error: syntax error -- `vminaveq.s32 r0,q1'
[^:]*:52: Error: syntax error -- `vminaveq.s32 r0,q1'
[^:]*:54: Error: syntax error -- `vminaveq.s32 r0,q1'
[^:]*:55: Error: vector predicated instruction should be in VPT/VPST block -- `vminavt.s32 r0,q1'
[^:]*:57: Error: instruction missing MVE vector predication code -- `vminav.s32 r0,q1'