| #as: |
| #objdump: -dr |
| |
| .*: file format .* |
| |
| |
| Disassembly of section .text: |
| |
| 0000000000000000 <target>: |
| 0: [0-9a-f]* { nop } |
| 8: [0-9a-f]* { nop } |
| 10: [0-9a-f]* { nop } |
| 18: [0-9a-f]* { nop } |
| 20: [0-9a-f]* { nop } |
| 28: [0-9a-f]* { nop } |
| 30: [0-9a-f]* { nop } |
| 38: [0-9a-f]* { nop } |
| 40: [0-9a-f]* { nop } |
| 48: [0-9a-f]* { nop } |
| 50: [0-9a-f]* { nop } |
| 58: [0-9a-f]* { nop } |
| 60: [0-9a-f]* { nop } |
| 68: [0-9a-f]* { nop } |
| 70: [0-9a-f]* { nop } |
| 78: [0-9a-f]* { nop } |
| 80: [0-9a-f]* { nop } |
| 88: [0-9a-f]* { nop } |
| 90: [0-9a-f]* { nop } |
| 98: [0-9a-f]* { nop } |
| a0: [0-9a-f]* { nop } |
| a8: [0-9a-f]* { nop } |
| b0: [0-9a-f]* { nop } |
| b8: [0-9a-f]* { nop } |
| c0: [0-9a-f]* { nop } |
| c8: [0-9a-f]* { nop } |
| d0: [0-9a-f]* { nop } |
| d8: [0-9a-f]* { nop } |
| e0: [0-9a-f]* { nop } |
| e8: [0-9a-f]* { nop } |
| f0: [0-9a-f]* { nop } |
| f8: [0-9a-f]* { nop } |
| 100: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; bnezt r15, 0 <target> } |
| 108: [0-9a-f]* { fdouble_sub_flags r5, r6, r7 ; bnez r15, 0 <target> } |
| 110: [0-9a-f]* { fdouble_addsub r5, r6, r7 ; bnez r15, 0 <target> } |
| 118: [0-9a-f]* { fdouble_pack1 r5, r6, r7 ; bnez r15, 0 <target> } |
| 120: [0-9a-f]* { fsingle_pack2 r5, r6, r7 ; bnez r15, 0 <target> } |
| 128: [0-9a-f]* { fsingle_mul2 r5, r6, r7 ; blez r15, 0 <target> } |
| 130: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 138: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 140: [0-9a-f]* { addli r5, r6, 4660 ; bgtzt r15, 0 <target> } |
| 148: [0-9a-f]* { fsingle_pack1 r5, r6 ; beqzt r15, 0 <target> } |
| 150: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; beqzt r15, 0 <target> } |
| 158: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; beqzt r15, 0 <target> } |
| 160: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; beqz r15, 0 <target> } |
| 168: [0-9a-f]* { mula_lu_lu r5, r6, r7 ; beqz r15, 0 <target> } |
| 170: [0-9a-f]* { addli r5, r6, 4660 ; beqz r15, 0 <target> } |
| 178: [0-9a-f]* { dblalign2 r5, r6, r7 ; beqz r15, 0 <target> } |
| 180: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; blbs r15, 0 <target> } |
| 188: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; blbs r15, 0 <target> } |
| 190: [0-9a-f]* { shl1addx r5, r6, r7 ; blbst r15, 0 <target> } |
| 198: [0-9a-f]* { v1cmpleu r5, r6, r7 ; blbst r15, 0 <target> } |
| 1a0: [0-9a-f]* { v1ddotpu r5, r6, r7 ; blbst r15, 0 <target> } |
| 1a8: [0-9a-f]* { v1dotpusa r5, r6, r7 ; blbs r15, 0 <target> } |
| 1b0: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; blbst r15, 0 <target> } |
| 1b8: [0-9a-f]* { v4packsc r5, r6, r7 ; blbst r15, 0 <target> } |
| 1c0: [0-9a-f]* { cmovnez r5, r6, r7 ; blbst r15, 0 <target> } |
| 1c8: [0-9a-f]* { shl1addx r5, r6, r7 ; bgtz r15, 0 <target> } |
| 1d0: [0-9a-f]* { v1adduc r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 1d8: [0-9a-f]* { v1cmpleu r5, r6, r7 ; bgtz r15, 0 <target> } |
| 1e0: [0-9a-f]* { v1cmpne r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 1e8: [0-9a-f]* { v1dotpus r5, r6, r7 ; bgtz r15, 0 <target> } |
| 1f0: [0-9a-f]* { v1sadau r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 1f8: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; bgtzt r15, 0 <target> } |
| 200: [0-9a-f]* { v2cmpltu r5, r6, r7 ; bgtz r15, 0 <target> } |
| 208: [0-9a-f]* { v2int_l r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 210: [0-9a-f]* { v2packuc r5, r6, r7 ; bgtz r15, 0 <target> } |
| 218: [0-9a-f]* { v4addsc r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 220: [0-9a-f]* { v4subsc r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 228: [0-9a-f]* { cmples r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 230: [0-9a-f]* { cmpltui r5, r6, 5 ; bgtzt r15, 0 <target> } |
| 238: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; j 0 <target> } |
| 240: [0-9a-f]* { subxsc r5, r6, r7 ; bltzt r15, 0 <target> } |
| 248: [0-9a-f]* { v1cmpne r5, r6, r7 ; bltz r15, 0 <target> } |
| 250: [0-9a-f]* { v1int_l r5, r6, r7 ; bltz r15, 0 <target> } |
| 258: [0-9a-f]* { v1multu r5, r6, r7 ; bltz r15, 0 <target> } |
| 260: [0-9a-f]* { v1shrs r5, r6, r7 ; bltzt r15, 0 <target> } |
| 268: [0-9a-f]* { v2addsc r5, r6, r7 ; bltz r15, 0 <target> } |
| 270: [0-9a-f]* { v2dotp r5, r6, r7 ; bltzt r15, 0 <target> } |
| 278: [0-9a-f]* { v2maxsi r5, r6, 5 ; bltzt r15, 0 <target> } |
| 280: [0-9a-f]* { v2packh r5, r6, r7 ; bltz r15, 0 <target> } |
| 288: [0-9a-f]* { v2sadu r5, r6, r7 ; bltzt r15, 0 <target> } |
| 290: [0-9a-f]* { v2shrui r5, r6, 5 ; bltzt r15, 0 <target> } |
| 298: [0-9a-f]* { v4shlsc r5, r6, r7 ; bltz r15, 0 <target> } |
| 2a0: [0-9a-f]* { cmpeq r5, r6, r7 ; bltzt r15, 0 <target> } |
| 2a8: [0-9a-f]* { cmpltsi r5, r6, 5 ; bltz r15, 0 <target> } |
| 2b0: [0-9a-f]* { cmulaf r5, r6, r7 ; bltz r15, 0 <target> } |
| 2b8: [0-9a-f]* { moveli r5, 4660 ; bgez r15, 0 <target> } |
| 2c0: [0-9a-f]* { subxsc r5, r6, r7 ; bnez r15, 0 <target> } |
| 2c8: [0-9a-f]* { v1maxu r5, r6, r7 ; bnez r15, 0 <target> } |
| 2d0: [0-9a-f]* { v1mulu r5, r6, r7 ; bnez r15, 0 <target> } |
| 2d8: [0-9a-f]* { v1shrsi r5, r6, 5 ; bnez r15, 0 <target> } |
| 2e0: [0-9a-f]* { v2addi r5, r6, 5 ; bnezt r15, 0 <target> } |
| 2e8: [0-9a-f]* { v2mins r5, r6, r7 ; bnez r15, 0 <target> } |
| 2f0: [0-9a-f]* { v2sadu r5, r6, r7 ; bnez r15, 0 <target> } |
| 2f8: [0-9a-f]* { v2shru r5, r6, r7 ; bnez r15, 0 <target> } |
| 300: [0-9a-f]* { v4shrs r5, r6, r7 ; bnez r15, 0 <target> } |
| 308: [0-9a-f]* { cmpeq r5, r6, r7 ; bnez r15, 0 <target> } |
| 310: [0-9a-f]* { cmulf r5, r6, r7 ; bnez r15, 0 <target> } |
| 318: [0-9a-f]* { revbytes r5, r6 ; blbst r15, 0 <target> } |
| 320: [0-9a-f]* { shrs r5, r6, r7 ; blbst r15, 0 <target> } |
| 328: [0-9a-f]* { shruxi r5, r6, 5 ; blbs r15, 0 <target> } |
| 330: [0-9a-f]* { tblidxb3 r5, r6 ; blbst r15, 0 <target> } |
| 338: [0-9a-f]* { v1shl r5, r6, r7 ; blbs r15, 0 <target> } |
| 340: [0-9a-f]* { v2mnz r5, r6, r7 ; blbs r15, 0 <target> } |
| 348: [0-9a-f]* { v4add r5, r6, r7 ; blbs r15, 0 <target> } |
| 350: [0-9a-f]* { addx r5, r6, r7 ; blbs r15, 0 <target> } |
| 358: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; j 0 <target> } |
| 360: [0-9a-f]* { nor r5, r6, r7 ; blezt r15, 0 <target> } |
| 368: [0-9a-f]* { shl r5, r6, r7 ; blezt r15, 0 <target> } |
| 370: [0-9a-f]* { shrsi r5, r6, 5 ; blez r15, 0 <target> } |
| 378: [0-9a-f]* { tblidxb0 r5, r6 ; blbs r15, 0 <target> } |
| 380: [0-9a-f]* { v2mz r5, r6, r7 ; blbc r15, 0 <target> } |
| 388: [0-9a-f]* { and r5, r6, r7 ; bgtz r15, 0 <target> } |
| 390: [0-9a-f]* { mz r5, r6, r7 ; blbst r15, 0 <target> } |
| 398: [0-9a-f]* { shl r5, r6, r7 ; blbs r15, 0 <target> } |
| 3a0: [0-9a-f]* { bfexts r5, r6, 5, 7 ; jal 0 <target> } |
| 3a8: [0-9a-f]* { ori r5, r6, 5 ; bgtz r15, 0 <target> } |
| 3b0: [0-9a-f]* { infol 4660 ; bgez r15, 0 <target> } |
| 3b8: [0-9a-f]* { pcnt r5, r6 ; bnezt r15, 0 <target> } |
| 3c0: [0-9a-f]* { bfextu r5, r6, 5, 7 ; j 0 <target> } |
| 3c8: [0-9a-f]* { movei r5, 5 ; blbs r15, 0 <target> } |
| 3d0: [0-9a-f]* { v2avgs r5, r6, r7 ; jal 0 <target> } |
| 3d8: [0-9a-f]* { cmulh r5, r6, r7 ; jal 0 <target> } |
| 3e0: [0-9a-f]* { v2dotpa r5, r6, r7 ; j 0 <target> } |
| 3e8: [0-9a-f]* { rotli r5, r6, 5 ; jal 0 <target> } |
| 3f0: [0-9a-f]* { v4shrs r5, r6, r7 ; j 0 <target> } |
| 3f8: [0-9a-f]* { v2sub r5, r6, r7 ; j 0 <target> } |
| 400: [0-9a-f]* { and r5, r6, r7 ; j 0 <target> } |
| 408: [0-9a-f]* { nop ; blbst r15, 0 <target> } |
| 410: [0-9a-f]* { cmpltu r5, r6, r7 ; beqzt r15, 0 <target> } |
| 418: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; beqzt r15, 0 <target> } |
| 420: [0-9a-f]* { shli r5, r6, 5 ; beqzt r15, 0 <target> } |
| 428: [0-9a-f]* { v1dotpusa r5, r6, r7 ; beqzt r15, 0 <target> } |
| 430: [0-9a-f]* { v2maxs r5, r6, r7 ; beqzt r15, 0 <target> } |
| 438: [0-9a-f]* { addli r5, r6, 4660 ; bgezt r15, 0 <target> } |
| 440: [0-9a-f]* { fdouble_pack2 r5, r6, r7 ; bgezt r15, 0 <target> } |
| 448: [0-9a-f]* { mulx r5, r6, r7 ; bgezt r15, 0 <target> } |
| 450: [0-9a-f]* { v1avgu r5, r6, r7 ; bgezt r15, 0 <target> } |
| 458: [0-9a-f]* { v1subuc r5, r6, r7 ; bgezt r15, 0 <target> } |
| 460: [0-9a-f]* { v2shru r5, r6, r7 ; bgezt r15, 0 <target> } |
| 468: [0-9a-f]* { cmpne r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 470: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 478: [0-9a-f]* { shlxi r5, r6, 5 ; bgtzt r15, 0 <target> } |
| 480: [0-9a-f]* { v1int_l r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 488: [0-9a-f]* { v2mins r5, r6, r7 ; bgtzt r15, 0 <target> } |
| 490: [0-9a-f]* { addxi r5, r6, 5 ; blbct r15, 0 <target> } |
| 498: [0-9a-f]* { fdouble_unpack_max r5, r6, r7 ; blbct r15, 0 <target> } |
| 4a0: [0-9a-f]* { nop ; blbct r15, 0 <target> } |
| 4a8: [0-9a-f]* { v1cmpeqi r5, r6, 5 ; blbct r15, 0 <target> } |
| 4b0: [0-9a-f]* { v2addi r5, r6, 5 ; blbct r15, 0 <target> } |
| 4b8: [0-9a-f]* { v2sub r5, r6, r7 ; blbct r15, 0 <target> } |
| 4c0: [0-9a-f]* { cmula r5, r6, r7 ; blbst r15, 0 <target> } |
| 4c8: [0-9a-f]* { mul_hu_hu r5, r6, r7 ; blbst r15, 0 <target> } |
| 4d0: [0-9a-f]* { shrsi r5, r6, 5 ; blbst r15, 0 <target> } |
| 4d8: [0-9a-f]* { v1maxui r5, r6, 5 ; blbst r15, 0 <target> } |
| 4e0: [0-9a-f]* { v2mnz r5, r6, r7 ; blbst r15, 0 <target> } |
| 4e8: [0-9a-f]* { addxsc r5, r6, r7 ; blezt r15, 0 <target> } |
| 4f0: [0-9a-f]* { blezt r15, 0 <target> } |
| 4f8: [0-9a-f]* { or r5, r6, r7 ; blezt r15, 0 <target> } |
| 500: [0-9a-f]* { v1cmpleu r5, r6, r7 ; blezt r15, 0 <target> } |
| 508: [0-9a-f]* { v2adiffs r5, r6, r7 ; blezt r15, 0 <target> } |
| 510: [0-9a-f]* { v4add r5, r6, r7 ; blezt r15, 0 <target> } |
| 518: [0-9a-f]* { cmulf r5, r6, r7 ; bltzt r15, 0 <target> } |
| 520: [0-9a-f]* { mul_hu_lu r5, r6, r7 ; bltzt r15, 0 <target> } |
| 528: [0-9a-f]* { shrui r5, r6, 5 ; bltzt r15, 0 <target> } |
| 530: [0-9a-f]* { v1minui r5, r6, 5 ; bltzt r15, 0 <target> } |
| 538: [0-9a-f]* { v2muls r5, r6, r7 ; bltzt r15, 0 <target> } |
| 540: [0-9a-f]* { andi r5, r6, 5 ; bnezt r15, 0 <target> } |
| 548: [0-9a-f]* { fsingle_addsub2 r5, r6, r7 ; bnezt r15, 0 <target> } |
| 550: [0-9a-f]* { pcnt r5, r6 ; bnezt r15, 0 <target> } |
| 558: [0-9a-f]* { v1cmpltsi r5, r6, 5 ; bnezt r15, 0 <target> } |
| 560: [0-9a-f]* { v2cmpeq r5, r6, r7 ; bnezt r15, 0 <target> } |
| 568: [0-9a-f]* { v4int_h r5, r6, r7 ; bnezt r15, 0 <target> } |
| 570: [0-9a-f]* { cmulfr r5, r6, r7 ; beqz r15, 0 <target> } |
| 578: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; beqz r15, 0 <target> } |
| 580: [0-9a-f]* { shrux r5, r6, r7 ; beqz r15, 0 <target> } |
| 588: [0-9a-f]* { v1mnz r5, r6, r7 ; beqz r15, 0 <target> } |
| 590: [0-9a-f]* { v2mults r5, r6, r7 ; beqz r15, 0 <target> } |
| 598: [0-9a-f]* { bfexts r5, r6, 5, 7 ; bgez r15, 0 <target> } |
| 5a0: [0-9a-f]* { fsingle_mul1 r5, r6, r7 ; bgez r15, 0 <target> } |
| 5a8: [0-9a-f]* { revbits r5, r6 ; bgez r15, 0 <target> } |
| 5b0: [0-9a-f]* { v1cmpltu r5, r6, r7 ; bgez r15, 0 <target> } |
| 5b8: [0-9a-f]* { v2cmpeqi r5, r6, 5 ; bgez r15, 0 <target> } |
| 5c0: [0-9a-f]* { v4int_l r5, r6, r7 ; bgez r15, 0 <target> } |
| 5c8: [0-9a-f]* { cmulhr r5, r6, r7 ; bgtz r15, 0 <target> } |
| 5d0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; bgtz r15, 0 <target> } |
| 5d8: [0-9a-f]* { shufflebytes r5, r6, r7 ; bgtz r15, 0 <target> } |
| 5e0: [0-9a-f]* { v1mulu r5, r6, r7 ; bgtz r15, 0 <target> } |
| 5e8: [0-9a-f]* { v2packh r5, r6, r7 ; bgtz r15, 0 <target> } |
| 5f0: [0-9a-f]* { bfins r5, r6, 5, 7 ; blbc r15, 0 <target> } |
| 5f8: [0-9a-f]* { fsingle_pack1 r5, r6 ; blbc r15, 0 <target> } |
| 600: [0-9a-f]* { rotl r5, r6, r7 ; blbc r15, 0 <target> } |
| 608: [0-9a-f]* { v1cmpne r5, r6, r7 ; blbc r15, 0 <target> } |
| 610: [0-9a-f]* { v2cmpleu r5, r6, r7 ; blbc r15, 0 <target> } |
| 618: [0-9a-f]* { v4shl r5, r6, r7 ; blbc r15, 0 <target> } |
| 620: [0-9a-f]* { crc32_8 r5, r6, r7 ; blbs r15, 0 <target> } |
| 628: [0-9a-f]* { mula_hs_hu r5, r6, r7 ; blbs r15, 0 <target> } |
| 630: [0-9a-f]* { subx r5, r6, r7 ; blbs r15, 0 <target> } |
| 638: [0-9a-f]* { v1mz r5, r6, r7 ; blbs r15, 0 <target> } |
| 640: [0-9a-f]* { v2packuc r5, r6, r7 ; blbs r15, 0 <target> } |
| 648: [0-9a-f]* { cmoveqz r5, r6, r7 ; blez r15, 0 <target> } |
| 650: [0-9a-f]* { fsingle_sub1 r5, r6, r7 ; blez r15, 0 <target> } |
| 658: [0-9a-f]* { shl r5, r6, r7 ; blez r15, 0 <target> } |
| 660: [0-9a-f]* { v1ddotpua r5, r6, r7 ; blez r15, 0 <target> } |
| 668: [0-9a-f]* { v2cmpltsi r5, r6, 5 ; blez r15, 0 <target> } |
| 670: [0-9a-f]* { v4shrs r5, r6, r7 ; blez r15, 0 <target> } |
| 678: [0-9a-f]* { dblalign r5, r6, r7 ; bltz r15, 0 <target> } |
| 680: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; bltz r15, 0 <target> } |
| 688: [0-9a-f]* { tblidxb0 r5, r6 ; bltz r15, 0 <target> } |
| 690: [0-9a-f]* { v1sadu r5, r6, r7 ; bltz r15, 0 <target> } |
| 698: [0-9a-f]* { v2sadau r5, r6, r7 ; bltz r15, 0 <target> } |
| 6a0: [0-9a-f]* { cmpeq r5, r6, r7 ; bnez r15, 0 <target> } |
| 6a8: [0-9a-f]* { infol 4660 ; bnez r15, 0 <target> } |
| 6b0: [0-9a-f]* { shl1add r5, r6, r7 ; bnez r15, 0 <target> } |
| 6b8: [0-9a-f]* { v1ddotpusa r5, r6, r7 ; bnez r15, 0 <target> } |
| 6c0: [0-9a-f]* { v2cmpltui r5, r6, 5 ; bnez r15, 0 <target> } |
| 6c8: [0-9a-f]* { v4sub r5, r6, r7 ; bnez r15, 0 <target> } |
| 6d0: [0-9a-f]* { cmples r5, r6, r7 ; jal 0 <target> } |
| 6d8: [0-9a-f]* { mnz r5, r6, r7 ; jal 0 <target> } |
| 6e0: [0-9a-f]* { shl2add r5, r6, r7 ; jal 0 <target> } |
| 6e8: [0-9a-f]* { v1dotpa r5, r6, r7 ; jal 0 <target> } |
| 6f0: [0-9a-f]* { v2dotp r5, r6, r7 ; jal 0 <target> } |
| 6f8: [0-9a-f]* { xor r5, r6, r7 ; jal 0 <target> } |
| 700: [0-9a-f]* { dblalign6 r5, r6, r7 ; j 0 <target> } |
| 708: [0-9a-f]* { mula_hu_lu r5, r6, r7 ; j 0 <target> } |
| 710: [0-9a-f]* { tblidxb3 r5, r6 ; j 0 <target> } |
| 718: [0-9a-f]* { v1shrs r5, r6, r7 ; j 0 <target> } |
| 720: [0-9a-f]* { v2shl r5, r6, r7 ; j 0 <target> } |
| 728: [0-9a-f]* { cmpeqi r5, r6, 5 } |
| 730: [0-9a-f]* { fetchand r5, r6, r7 } |
| 738: [0-9a-f]* { ldna_add r5, r6, 5 } |
| 740: [0-9a-f]* { mula_hu_lu r5, r6, r7 } |
| 748: [0-9a-f]* { shlx r5, r6, r7 } |
| 750: [0-9a-f]* { v1avgu r5, r6, r7 } |
| 758: [0-9a-f]* { v1subuc r5, r6, r7 } |
| 760: [0-9a-f]* { v2shru r5, r6, r7 } |
| 768: [0-9a-f]* { add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 } |
| 770: [0-9a-f]* { add r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 } |
| 778: [0-9a-f]* { add r15, r16, r17 ; andi r5, r6, 5 ; ld2u r25, r26 } |
| 780: [0-9a-f]* { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 } |
| 788: [0-9a-f]* { add r15, r16, r17 ; cmpeq r5, r6, r7 ; ld4s r25, r26 } |
| 790: [0-9a-f]* { add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch r25 } |
| 798: [0-9a-f]* { add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 } |
| 7a0: [0-9a-f]* { add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 } |
| 7a8: [0-9a-f]* { ctz r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 } |
| 7b0: [0-9a-f]* { add r15, r16, r17 ; prefetch_l3 r25 } |
| 7b8: [0-9a-f]* { add r15, r16, r17 ; info 19 ; prefetch r25 } |
| 7c0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 } |
| 7c8: [0-9a-f]* { add r15, r16, r17 ; andi r5, r6, 5 ; ld1s r25, r26 } |
| 7d0: [0-9a-f]* { add r15, r16, r17 ; shl1addx r5, r6, r7 ; ld1s r25, r26 } |
| 7d8: [0-9a-f]* { add r15, r16, r17 ; move r5, r6 ; ld1u r25, r26 } |
| 7e0: [0-9a-f]* { add r15, r16, r17 ; ld1u r25, r26 } |
| 7e8: [0-9a-f]* { revbits r5, r6 ; add r15, r16, r17 ; ld2s r25, r26 } |
| 7f0: [0-9a-f]* { add r15, r16, r17 ; cmpne r5, r6, r7 ; ld2u r25, r26 } |
| 7f8: [0-9a-f]* { add r15, r16, r17 ; subx r5, r6, r7 ; ld2u r25, r26 } |
| 800: [0-9a-f]* { mulx r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } |
| 808: [0-9a-f]* { add r15, r16, r17 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 } |
| 810: [0-9a-f]* { add r15, r16, r17 ; shli r5, r6, 5 ; ld4u r25, r26 } |
| 818: [0-9a-f]* { add r15, r16, r17 ; move r5, r6 ; prefetch r25 } |
| 820: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } |
| 828: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } |
| 830: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } |
| 838: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; ld2s r25, r26 } |
| 840: [0-9a-f]* { mulax r5, r6, r7 ; add r15, r16, r17 ; ld2u r25, r26 } |
| 848: [0-9a-f]* { add r15, r16, r17 ; mz r5, r6, r7 ; ld4u r25, r26 } |
| 850: [0-9a-f]* { add r15, r16, r17 ; nor r5, r6, r7 ; prefetch r25 } |
| 858: [0-9a-f]* { pcnt r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 } |
| 860: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } |
| 868: [0-9a-f]* { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } |
| 870: [0-9a-f]* { add r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } |
| 878: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 } |
| 880: [0-9a-f]* { add r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l2 r25 } |
| 888: [0-9a-f]* { add r15, r16, r17 ; rotl r5, r6, r7 ; prefetch_l2 r25 } |
| 890: [0-9a-f]* { add r15, r16, r17 ; prefetch_l2_fault r25 } |
| 898: [0-9a-f]* { tblidxb1 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 } |
| 8a0: [0-9a-f]* { add r15, r16, r17 ; nop ; prefetch_l3 r25 } |
| 8a8: [0-9a-f]* { add r15, r16, r17 ; cmpleu r5, r6, r7 ; prefetch_l3_fault r25 } |
| 8b0: [0-9a-f]* { add r15, r16, r17 ; shrsi r5, r6, 5 ; prefetch_l3_fault r25 } |
| 8b8: [0-9a-f]* { revbytes r5, r6 ; add r15, r16, r17 ; prefetch_l2 r25 } |
| 8c0: [0-9a-f]* { add r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l3 r25 } |
| 8c8: [0-9a-f]* { add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 } |
| 8d0: [0-9a-f]* { add r15, r16, r17 ; shl2add r5, r6, r7 ; st1 r25, r26 } |
| 8d8: [0-9a-f]* { add r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 } |
| 8e0: [0-9a-f]* { add r15, r16, r17 ; shlx r5, r6, r7 } |
| 8e8: [0-9a-f]* { add r15, r16, r17 ; shru r5, r6, r7 ; ld r25, r26 } |
| 8f0: [0-9a-f]* { shufflebytes r5, r6, r7 ; add r15, r16, r17 } |
| 8f8: [0-9a-f]* { revbits r5, r6 ; add r15, r16, r17 ; st r25, r26 } |
| 900: [0-9a-f]* { add r15, r16, r17 ; cmpne r5, r6, r7 ; st1 r25, r26 } |
| 908: [0-9a-f]* { add r15, r16, r17 ; subx r5, r6, r7 ; st1 r25, r26 } |
| 910: [0-9a-f]* { mulx r5, r6, r7 ; add r15, r16, r17 ; st2 r25, r26 } |
| 918: [0-9a-f]* { add r15, r16, r17 ; cmpeqi r5, r6, 5 ; st4 r25, r26 } |
| 920: [0-9a-f]* { add r15, r16, r17 ; shli r5, r6, 5 ; st4 r25, r26 } |
| 928: [0-9a-f]* { add r15, r16, r17 ; subx r5, r6, r7 ; prefetch r25 } |
| 930: [0-9a-f]* { tblidxb1 r5, r6 ; add r15, r16, r17 ; prefetch_l1_fault r25 } |
| 938: [0-9a-f]* { tblidxb3 r5, r6 ; add r15, r16, r17 ; prefetch_l2_fault r25 } |
| 940: [0-9a-f]* { v1mulu r5, r6, r7 ; add r15, r16, r17 } |
| 948: [0-9a-f]* { add r15, r16, r17 ; v2packh r5, r6, r7 } |
| 950: [0-9a-f]* { add r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } |
| 958: [0-9a-f]* { add r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 } |
| 960: [0-9a-f]* { add r5, r6, r7 ; addxi r15, r16, 5 ; st1 r25, r26 } |
| 968: [0-9a-f]* { add r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 } |
| 970: [0-9a-f]* { add r5, r6, r7 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } |
| 978: [0-9a-f]* { add r5, r6, r7 ; cmpleu r15, r16, r17 ; st4 r25, r26 } |
| 980: [0-9a-f]* { add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 } |
| 988: [0-9a-f]* { add r5, r6, r7 ; dblalign4 r15, r16, r17 } |
| 990: [0-9a-f]* { add r5, r6, r7 ; ill ; ld2u r25, r26 } |
| 998: [0-9a-f]* { add r5, r6, r7 ; jalr r15 ; ld2s r25, r26 } |
| 9a0: [0-9a-f]* { add r5, r6, r7 ; jr r15 ; ld4s r25, r26 } |
| 9a8: [0-9a-f]* { add r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 } |
| 9b0: [0-9a-f]* { add r5, r6, r7 ; ld r25, r26 } |
| 9b8: [0-9a-f]* { add r5, r6, r7 ; shli r15, r16, 5 ; ld1s r25, r26 } |
| 9c0: [0-9a-f]* { add r5, r6, r7 ; rotl r15, r16, r17 ; ld1u r25, r26 } |
| 9c8: [0-9a-f]* { add r5, r6, r7 ; jrp r15 ; ld2s r25, r26 } |
| 9d0: [0-9a-f]* { add r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 } |
| 9d8: [0-9a-f]* { add r5, r6, r7 ; addx r15, r16, r17 ; ld4s r25, r26 } |
| 9e0: [0-9a-f]* { add r5, r6, r7 ; shrui r15, r16, 5 ; ld4s r25, r26 } |
| 9e8: [0-9a-f]* { add r5, r6, r7 ; shl1addx r15, r16, r17 ; ld4u r25, r26 } |
| 9f0: [0-9a-f]* { add r5, r6, r7 ; lnk r15 ; prefetch r25 } |
| 9f8: [0-9a-f]* { add r5, r6, r7 ; move r15, r16 ; prefetch r25 } |
| a00: [0-9a-f]* { add r5, r6, r7 ; mz r15, r16, r17 ; prefetch r25 } |
| a08: [0-9a-f]* { add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 } |
| a10: [0-9a-f]* { add r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 } |
| a18: [0-9a-f]* { add r5, r6, r7 ; prefetch_add_l2_fault r15, 5 } |
| a20: [0-9a-f]* { add r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch r25 } |
| a28: [0-9a-f]* { add r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 } |
| a30: [0-9a-f]* { add r5, r6, r7 ; jrp r15 ; prefetch_l2 r25 } |
| a38: [0-9a-f]* { add r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 } |
| a40: [0-9a-f]* { add r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 } |
| a48: [0-9a-f]* { add r5, r6, r7 ; subx r15, r16, r17 ; prefetch_l3 r25 } |
| a50: [0-9a-f]* { add r5, r6, r7 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 } |
| a58: [0-9a-f]* { add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } |
| a60: [0-9a-f]* { add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } |
| a68: [0-9a-f]* { add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3 r25 } |
| a70: [0-9a-f]* { add r5, r6, r7 ; shl3add r15, r16, r17 ; st r25, r26 } |
| a78: [0-9a-f]* { add r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 } |
| a80: [0-9a-f]* { add r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 } |
| a88: [0-9a-f]* { add r5, r6, r7 ; shrui r15, r16, 5 } |
| a90: [0-9a-f]* { add r5, r6, r7 ; shl3add r15, r16, r17 ; st r25, r26 } |
| a98: [0-9a-f]* { add r5, r6, r7 ; or r15, r16, r17 ; st1 r25, r26 } |
| aa0: [0-9a-f]* { add r5, r6, r7 ; jr r15 ; st2 r25, r26 } |
| aa8: [0-9a-f]* { add r5, r6, r7 ; cmplts r15, r16, r17 ; st4 r25, r26 } |
| ab0: [0-9a-f]* { add r5, r6, r7 ; stnt1 r15, r16 } |
| ab8: [0-9a-f]* { add r5, r6, r7 ; subx r15, r16, r17 ; st r25, r26 } |
| ac0: [0-9a-f]* { add r5, r6, r7 ; v2cmpleu r15, r16, r17 } |
| ac8: [0-9a-f]* { add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 } |
| ad0: [0-9a-f]* { addi r15, r16, 5 ; addi r5, r6, 5 ; ld2s r25, r26 } |
| ad8: [0-9a-f]* { addi r15, r16, 5 ; addxi r5, r6, 5 ; ld2u r25, r26 } |
| ae0: [0-9a-f]* { addi r15, r16, 5 ; andi r5, r6, 5 ; ld2u r25, r26 } |
| ae8: [0-9a-f]* { cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 } |
| af0: [0-9a-f]* { addi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld4s r25, r26 } |
| af8: [0-9a-f]* { addi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch r25 } |
| b00: [0-9a-f]* { addi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 } |
| b08: [0-9a-f]* { addi r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 } |
| b10: [0-9a-f]* { ctz r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 } |
| b18: [0-9a-f]* { addi r15, r16, 5 ; prefetch_l3 r25 } |
| b20: [0-9a-f]* { addi r15, r16, 5 ; info 19 ; prefetch r25 } |
| b28: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld r25, r26 } |
| b30: [0-9a-f]* { addi r15, r16, 5 ; andi r5, r6, 5 ; ld1s r25, r26 } |
| b38: [0-9a-f]* { addi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld1s r25, r26 } |
| b40: [0-9a-f]* { addi r15, r16, 5 ; move r5, r6 ; ld1u r25, r26 } |
| b48: [0-9a-f]* { addi r15, r16, 5 ; ld1u r25, r26 } |
| b50: [0-9a-f]* { revbits r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 } |
| b58: [0-9a-f]* { addi r15, r16, 5 ; cmpne r5, r6, r7 ; ld2u r25, r26 } |
| b60: [0-9a-f]* { addi r15, r16, 5 ; subx r5, r6, r7 ; ld2u r25, r26 } |
| b68: [0-9a-f]* { mulx r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 } |
| b70: [0-9a-f]* { addi r15, r16, 5 ; cmpeqi r5, r6, 5 ; ld4u r25, r26 } |
| b78: [0-9a-f]* { addi r15, r16, 5 ; shli r5, r6, 5 ; ld4u r25, r26 } |
| b80: [0-9a-f]* { addi r15, r16, 5 ; move r5, r6 ; prefetch r25 } |
| b88: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } |
| b90: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld4s r25, r26 } |
| b98: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; ld4u r25, r26 } |
| ba0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; ld2s r25, r26 } |
| ba8: [0-9a-f]* { mulax r5, r6, r7 ; addi r15, r16, 5 ; ld2u r25, r26 } |
| bb0: [0-9a-f]* { addi r15, r16, 5 ; mz r5, r6, r7 ; ld4u r25, r26 } |
| bb8: [0-9a-f]* { addi r15, r16, 5 ; nor r5, r6, r7 ; prefetch r25 } |
| bc0: [0-9a-f]* { pcnt r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } |
| bc8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } |
| bd0: [0-9a-f]* { cmoveqz r5, r6, r7 ; addi r15, r16, 5 ; prefetch r25 } |
| bd8: [0-9a-f]* { addi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch r25 } |
| be0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } |
| be8: [0-9a-f]* { addi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l2 r25 } |
| bf0: [0-9a-f]* { addi r15, r16, 5 ; rotl r5, r6, r7 ; prefetch_l2 r25 } |
| bf8: [0-9a-f]* { addi r15, r16, 5 ; prefetch_l2_fault r25 } |
| c00: [0-9a-f]* { tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 } |
| c08: [0-9a-f]* { addi r15, r16, 5 ; nop ; prefetch_l3 r25 } |
| c10: [0-9a-f]* { addi r15, r16, 5 ; cmpleu r5, r6, r7 ; prefetch_l3_fault r25 } |
| c18: [0-9a-f]* { addi r15, r16, 5 ; shrsi r5, r6, 5 ; prefetch_l3_fault r25 } |
| c20: [0-9a-f]* { revbytes r5, r6 ; addi r15, r16, 5 ; prefetch_l2 r25 } |
| c28: [0-9a-f]* { addi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l3 r25 } |
| c30: [0-9a-f]* { addi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 } |
| c38: [0-9a-f]* { addi r15, r16, 5 ; shl2add r5, r6, r7 ; st1 r25, r26 } |
| c40: [0-9a-f]* { addi r15, r16, 5 ; shl3add r5, r6, r7 ; st4 r25, r26 } |
| c48: [0-9a-f]* { addi r15, r16, 5 ; shlx r5, r6, r7 } |
| c50: [0-9a-f]* { addi r15, r16, 5 ; shru r5, r6, r7 ; ld r25, r26 } |
| c58: [0-9a-f]* { shufflebytes r5, r6, r7 ; addi r15, r16, 5 } |
| c60: [0-9a-f]* { revbits r5, r6 ; addi r15, r16, 5 ; st r25, r26 } |
| c68: [0-9a-f]* { addi r15, r16, 5 ; cmpne r5, r6, r7 ; st1 r25, r26 } |
| c70: [0-9a-f]* { addi r15, r16, 5 ; subx r5, r6, r7 ; st1 r25, r26 } |
| c78: [0-9a-f]* { mulx r5, r6, r7 ; addi r15, r16, 5 ; st2 r25, r26 } |
| c80: [0-9a-f]* { addi r15, r16, 5 ; cmpeqi r5, r6, 5 ; st4 r25, r26 } |
| c88: [0-9a-f]* { addi r15, r16, 5 ; shli r5, r6, 5 ; st4 r25, r26 } |
| c90: [0-9a-f]* { addi r15, r16, 5 ; subx r5, r6, r7 ; prefetch r25 } |
| c98: [0-9a-f]* { tblidxb1 r5, r6 ; addi r15, r16, 5 ; prefetch_l1_fault r25 } |
| ca0: [0-9a-f]* { tblidxb3 r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 } |
| ca8: [0-9a-f]* { v1mulu r5, r6, r7 ; addi r15, r16, 5 } |
| cb0: [0-9a-f]* { addi r15, r16, 5 ; v2packh r5, r6, r7 } |
| cb8: [0-9a-f]* { addi r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l3_fault r25 } |
| cc0: [0-9a-f]* { addi r5, r6, 5 ; addi r15, r16, 5 ; st r25, r26 } |
| cc8: [0-9a-f]* { addi r5, r6, 5 ; addxi r15, r16, 5 ; st1 r25, r26 } |
| cd0: [0-9a-f]* { addi r5, r6, 5 ; andi r15, r16, 5 ; st1 r25, r26 } |
| cd8: [0-9a-f]* { addi r5, r6, 5 ; cmpeqi r15, r16, 5 ; st4 r25, r26 } |
| ce0: [0-9a-f]* { addi r5, r6, 5 ; cmpleu r15, r16, r17 ; st4 r25, r26 } |
| ce8: [0-9a-f]* { addi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld r25, r26 } |
| cf0: [0-9a-f]* { addi r5, r6, 5 ; dblalign4 r15, r16, r17 } |
| cf8: [0-9a-f]* { addi r5, r6, 5 ; ill ; ld2u r25, r26 } |
| d00: [0-9a-f]* { addi r5, r6, 5 ; jalr r15 ; ld2s r25, r26 } |
| d08: [0-9a-f]* { addi r5, r6, 5 ; jr r15 ; ld4s r25, r26 } |
| d10: [0-9a-f]* { addi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld r25, r26 } |
| d18: [0-9a-f]* { addi r5, r6, 5 ; ld r25, r26 } |
| d20: [0-9a-f]* { addi r5, r6, 5 ; shli r15, r16, 5 ; ld1s r25, r26 } |
| d28: [0-9a-f]* { addi r5, r6, 5 ; rotl r15, r16, r17 ; ld1u r25, r26 } |
| d30: [0-9a-f]* { addi r5, r6, 5 ; jrp r15 ; ld2s r25, r26 } |
| d38: [0-9a-f]* { addi r5, r6, 5 ; cmpltsi r15, r16, 5 ; ld2u r25, r26 } |
| d40: [0-9a-f]* { addi r5, r6, 5 ; addx r15, r16, r17 ; ld4s r25, r26 } |
| d48: [0-9a-f]* { addi r5, r6, 5 ; shrui r15, r16, 5 ; ld4s r25, r26 } |
| d50: [0-9a-f]* { addi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld4u r25, r26 } |
| d58: [0-9a-f]* { addi r5, r6, 5 ; lnk r15 ; prefetch r25 } |
| d60: [0-9a-f]* { addi r5, r6, 5 ; move r15, r16 ; prefetch r25 } |
| d68: [0-9a-f]* { addi r5, r6, 5 ; mz r15, r16, r17 ; prefetch r25 } |
| d70: [0-9a-f]* { addi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l2 r25 } |
| d78: [0-9a-f]* { addi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch r25 } |
| d80: [0-9a-f]* { addi r5, r6, 5 ; prefetch_add_l2_fault r15, 5 } |
| d88: [0-9a-f]* { addi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch r25 } |
| d90: [0-9a-f]* { addi r5, r6, 5 ; or r15, r16, r17 ; prefetch_l1_fault r25 } |
| d98: [0-9a-f]* { addi r5, r6, 5 ; jrp r15 ; prefetch_l2 r25 } |
| da0: [0-9a-f]* { addi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l2_fault r25 } |
| da8: [0-9a-f]* { addi r5, r6, 5 ; and r15, r16, r17 ; prefetch_l3 r25 } |
| db0: [0-9a-f]* { addi r5, r6, 5 ; subx r15, r16, r17 ; prefetch_l3 r25 } |
| db8: [0-9a-f]* { addi r5, r6, 5 ; shl3add r15, r16, r17 ; prefetch_l3_fault r25 } |
| dc0: [0-9a-f]* { addi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 } |
| dc8: [0-9a-f]* { addi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } |
| dd0: [0-9a-f]* { addi r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l3 r25 } |
| dd8: [0-9a-f]* { addi r5, r6, 5 ; shl3add r15, r16, r17 ; st r25, r26 } |
| de0: [0-9a-f]* { addi r5, r6, 5 ; shli r15, r16, 5 ; st2 r25, r26 } |
| de8: [0-9a-f]* { addi r5, r6, 5 ; shrsi r15, r16, 5 ; st2 r25, r26 } |
| df0: [0-9a-f]* { addi r5, r6, 5 ; shrui r15, r16, 5 } |
| df8: [0-9a-f]* { addi r5, r6, 5 ; shl3add r15, r16, r17 ; st r25, r26 } |
| e00: [0-9a-f]* { addi r5, r6, 5 ; or r15, r16, r17 ; st1 r25, r26 } |
| e08: [0-9a-f]* { addi r5, r6, 5 ; jr r15 ; st2 r25, r26 } |
| e10: [0-9a-f]* { addi r5, r6, 5 ; cmplts r15, r16, r17 ; st4 r25, r26 } |
| e18: [0-9a-f]* { addi r5, r6, 5 ; stnt1 r15, r16 } |
| e20: [0-9a-f]* { addi r5, r6, 5 ; subx r15, r16, r17 ; st r25, r26 } |
| e28: [0-9a-f]* { addi r5, r6, 5 ; v2cmpleu r15, r16, r17 } |
| e30: [0-9a-f]* { addi r5, r6, 5 ; xor r15, r16, r17 ; ld1u r25, r26 } |
| e38: [0-9a-f]* { addli r15, r16, 4660 ; cmpltui r5, r6, 5 } |
| e40: [0-9a-f]* { mul_hs_hu r5, r6, r7 ; addli r15, r16, 4660 } |
| e48: [0-9a-f]* { addli r15, r16, 4660 ; shlx r5, r6, r7 } |
| e50: [0-9a-f]* { addli r15, r16, 4660 ; v1int_h r5, r6, r7 } |
| e58: [0-9a-f]* { addli r15, r16, 4660 ; v2maxsi r5, r6, 5 } |
| e60: [0-9a-f]* { addli r5, r6, 4660 ; addx r15, r16, r17 } |
| e68: [0-9a-f]* { addli r5, r6, 4660 ; iret } |
| e70: [0-9a-f]* { addli r5, r6, 4660 ; movei r15, 5 } |
| e78: [0-9a-f]* { addli r5, r6, 4660 ; shruxi r15, r16, 5 } |
| e80: [0-9a-f]* { addli r5, r6, 4660 ; v1shl r15, r16, r17 } |
| e88: [0-9a-f]* { addli r5, r6, 4660 ; v4add r15, r16, r17 } |
| e90: [0-9a-f]* { addx r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 } |
| e98: [0-9a-f]* { addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch r25 } |
| ea0: [0-9a-f]* { addx r15, r16, r17 ; andi r5, r6, 5 ; prefetch r25 } |
| ea8: [0-9a-f]* { cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } |
| eb0: [0-9a-f]* { addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 } |
| eb8: [0-9a-f]* { addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 } |
| ec0: [0-9a-f]* { addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 } |
| ec8: [0-9a-f]* { addx r15, r16, r17 ; cmpltu r5, r6, r7 ; st1 r25, r26 } |
| ed0: [0-9a-f]* { ctz r5, r6 ; addx r15, r16, r17 ; prefetch r25 } |
| ed8: [0-9a-f]* { addx r15, r16, r17 ; st2 r25, r26 } |
| ee0: [0-9a-f]* { addx r15, r16, r17 ; info 19 ; prefetch_l3 r25 } |
| ee8: [0-9a-f]* { mulax r5, r6, r7 ; addx r15, r16, r17 ; ld r25, r26 } |
| ef0: [0-9a-f]* { addx r15, r16, r17 ; cmpeq r5, r6, r7 ; ld1s r25, r26 } |
| ef8: [0-9a-f]* { addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1s r25, r26 } |
| f00: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; ld1u r25, r26 } |
| f08: [0-9a-f]* { addx r15, r16, r17 ; addxi r5, r6, 5 ; ld2s r25, r26 } |
| f10: [0-9a-f]* { addx r15, r16, r17 ; shl r5, r6, r7 ; ld2s r25, r26 } |
| f18: [0-9a-f]* { addx r15, r16, r17 ; info 19 ; ld2u r25, r26 } |
| f20: [0-9a-f]* { tblidxb3 r5, r6 ; addx r15, r16, r17 ; ld2u r25, r26 } |
| f28: [0-9a-f]* { addx r15, r16, r17 ; or r5, r6, r7 ; ld4s r25, r26 } |
| f30: [0-9a-f]* { addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld4u r25, r26 } |
| f38: [0-9a-f]* { addx r15, r16, r17 ; shrui r5, r6, 5 ; ld4u r25, r26 } |
| f40: [0-9a-f]* { addx r15, r16, r17 ; move r5, r6 ; prefetch_l2_fault r25 } |
| f48: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 } |
| f50: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 } |
| f58: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l2 r25 } |
| f60: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } |
| f68: [0-9a-f]* { mulax r5, r6, r7 ; addx r15, r16, r17 ; prefetch r25 } |
| f70: [0-9a-f]* { addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l2 r25 } |
| f78: [0-9a-f]* { addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l3 r25 } |
| f80: [0-9a-f]* { pcnt r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 } |
| f88: [0-9a-f]* { addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch r25 } |
| f90: [0-9a-f]* { addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch r25 } |
| f98: [0-9a-f]* { addx r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 } |
| fa0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l1_fault r25 } |
| fa8: [0-9a-f]* { addx r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l2 r25 } |
| fb0: [0-9a-f]* { addx r15, r16, r17 ; shl1addx r5, r6, r7 ; prefetch_l2 r25 } |
| fb8: [0-9a-f]* { addx r15, r16, r17 ; move r5, r6 ; prefetch_l2_fault r25 } |
| fc0: [0-9a-f]* { addx r15, r16, r17 ; prefetch_l2_fault r25 } |
| fc8: [0-9a-f]* { revbits r5, r6 ; addx r15, r16, r17 ; prefetch_l3 r25 } |
| fd0: [0-9a-f]* { addx r15, r16, r17 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 } |
| fd8: [0-9a-f]* { addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3_fault r25 } |
| fe0: [0-9a-f]* { revbytes r5, r6 ; addx r15, r16, r17 ; st r25, r26 } |
| fe8: [0-9a-f]* { addx r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 } |
| ff0: [0-9a-f]* { addx r15, r16, r17 ; shl1add r5, r6, r7 ; st4 r25, r26 } |
| ff8: [0-9a-f]* { addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld r25, r26 } |
| 1000: [0-9a-f]* { addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 } |
| 1008: [0-9a-f]* { addx r15, r16, r17 ; shrs r5, r6, r7 ; ld1u r25, r26 } |
| 1010: [0-9a-f]* { addx r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 } |
| 1018: [0-9a-f]* { addx r15, r16, r17 ; addxi r5, r6, 5 ; st r25, r26 } |
| 1020: [0-9a-f]* { addx r15, r16, r17 ; shl r5, r6, r7 ; st r25, r26 } |
| 1028: [0-9a-f]* { addx r15, r16, r17 ; info 19 ; st1 r25, r26 } |
| 1030: [0-9a-f]* { tblidxb3 r5, r6 ; addx r15, r16, r17 ; st1 r25, r26 } |
| 1038: [0-9a-f]* { addx r15, r16, r17 ; or r5, r6, r7 ; st2 r25, r26 } |
| 1040: [0-9a-f]* { addx r15, r16, r17 ; cmpltsi r5, r6, 5 ; st4 r25, r26 } |
| 1048: [0-9a-f]* { addx r15, r16, r17 ; shrui r5, r6, 5 ; st4 r25, r26 } |
| 1050: [0-9a-f]* { addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3 r25 } |
| 1058: [0-9a-f]* { tblidxb1 r5, r6 ; addx r15, r16, r17 ; prefetch_l3_fault r25 } |
| 1060: [0-9a-f]* { tblidxb3 r5, r6 ; addx r15, r16, r17 ; st1 r25, r26 } |
| 1068: [0-9a-f]* { v1sadu r5, r6, r7 ; addx r15, r16, r17 } |
| 1070: [0-9a-f]* { v2sadau r5, r6, r7 ; addx r15, r16, r17 } |
| 1078: [0-9a-f]* { addx r15, r16, r17 ; xor r5, r6, r7 ; st4 r25, r26 } |
| 1080: [0-9a-f]* { addx r5, r6, r7 ; addi r15, r16, 5 } |
| 1088: [0-9a-f]* { addx r5, r6, r7 ; addxli r15, r16, 4660 } |
| 1090: [0-9a-f]* { addx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 } |
| 1098: [0-9a-f]* { addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 } |
| 10a0: [0-9a-f]* { addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 } |
| 10a8: [0-9a-f]* { addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2u r25, r26 } |
| 10b0: [0-9a-f]* { addx r5, r6, r7 ; exch4 r15, r16, r17 } |
| 10b8: [0-9a-f]* { addx r5, r6, r7 ; ill ; prefetch r25 } |
| 10c0: [0-9a-f]* { addx r5, r6, r7 ; jalr r15 ; prefetch r25 } |
| 10c8: [0-9a-f]* { addx r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 } |
| 10d0: [0-9a-f]* { addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld r25, r26 } |
| 10d8: [0-9a-f]* { addx r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 } |
| 10e0: [0-9a-f]* { addx r5, r6, r7 ; shrui r15, r16, 5 ; ld1s r25, r26 } |
| 10e8: [0-9a-f]* { addx r5, r6, r7 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } |
| 10f0: [0-9a-f]* { addx r5, r6, r7 ; movei r15, 5 ; ld2s r25, r26 } |
| 10f8: [0-9a-f]* { addx r5, r6, r7 ; ill ; ld2u r25, r26 } |
| 1100: [0-9a-f]* { addx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } |
| 1108: [0-9a-f]* { addx r5, r6, r7 ; ld4s r25, r26 } |
| 1110: [0-9a-f]* { addx r5, r6, r7 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } |
| 1118: [0-9a-f]* { addx r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 } |
| 1120: [0-9a-f]* { addx r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 } |
| 1128: [0-9a-f]* { addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 } |
| 1130: [0-9a-f]* { addx r5, r6, r7 ; nor r15, r16, r17 ; st r25, r26 } |
| 1138: [0-9a-f]* { addx r5, r6, r7 ; prefetch r25 } |
| 1140: [0-9a-f]* { addx r5, r6, r7 ; add r15, r16, r17 ; prefetch r25 } |
| 1148: [0-9a-f]* { addx r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch r25 } |
| 1150: [0-9a-f]* { addx r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 } |
| 1158: [0-9a-f]* { addx r5, r6, r7 ; movei r15, 5 ; prefetch_l2 r25 } |
| 1160: [0-9a-f]* { addx r5, r6, r7 ; info 19 ; prefetch_l2_fault r25 } |
| 1168: [0-9a-f]* { addx r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3 r25 } |
| 1170: [0-9a-f]* { addx r5, r6, r7 ; add r15, r16, r17 ; prefetch_l3_fault r25 } |
| 1178: [0-9a-f]* { addx r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 } |
| 1180: [0-9a-f]* { addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 } |
| 1188: [0-9a-f]* { addx r5, r6, r7 ; shl1add r15, r16, r17 ; st r25, r26 } |
| 1190: [0-9a-f]* { addx r5, r6, r7 ; shl2add r15, r16, r17 ; st2 r25, r26 } |
| 1198: [0-9a-f]* { addx r5, r6, r7 ; shl3add r15, r16, r17 } |
| 11a0: [0-9a-f]* { addx r5, r6, r7 ; shlxi r15, r16, 5 } |
| 11a8: [0-9a-f]* { addx r5, r6, r7 ; shru r15, r16, r17 ; ld1s r25, r26 } |
| 11b0: [0-9a-f]* { addx r5, r6, r7 ; add r15, r16, r17 ; st r25, r26 } |
| 11b8: [0-9a-f]* { addx r5, r6, r7 ; shrsi r15, r16, 5 ; st r25, r26 } |
| 11c0: [0-9a-f]* { addx r5, r6, r7 ; shl1add r15, r16, r17 ; st1 r25, r26 } |
| 11c8: [0-9a-f]* { addx r5, r6, r7 ; move r15, r16 ; st2 r25, r26 } |
| 11d0: [0-9a-f]* { addx r5, r6, r7 ; st4 r25, r26 } |
| 11d8: [0-9a-f]* { addx r5, r6, r7 ; stnt4 r15, r16 } |
| 11e0: [0-9a-f]* { addx r5, r6, r7 ; subx r15, r16, r17 } |
| 11e8: [0-9a-f]* { addx r5, r6, r7 ; v2cmpltui r15, r16, 5 } |
| 11f0: [0-9a-f]* { addx r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 } |
| 11f8: [0-9a-f]* { addxi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 } |
| 1200: [0-9a-f]* { addxi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch r25 } |
| 1208: [0-9a-f]* { addxi r15, r16, 5 ; andi r5, r6, 5 ; prefetch r25 } |
| 1210: [0-9a-f]* { cmoveqz r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } |
| 1218: [0-9a-f]* { addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 } |
| 1220: [0-9a-f]* { addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 } |
| 1228: [0-9a-f]* { addxi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 } |
| 1230: [0-9a-f]* { addxi r15, r16, 5 ; cmpltu r5, r6, r7 ; st1 r25, r26 } |
| 1238: [0-9a-f]* { ctz r5, r6 ; addxi r15, r16, 5 ; prefetch r25 } |
| 1240: [0-9a-f]* { addxi r15, r16, 5 ; st2 r25, r26 } |
| 1248: [0-9a-f]* { addxi r15, r16, 5 ; info 19 ; prefetch_l3 r25 } |
| 1250: [0-9a-f]* { mulax r5, r6, r7 ; addxi r15, r16, 5 ; ld r25, r26 } |
| 1258: [0-9a-f]* { addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld1s r25, r26 } |
| 1260: [0-9a-f]* { addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld1s r25, r26 } |
| 1268: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; ld1u r25, r26 } |
| 1270: [0-9a-f]* { addxi r15, r16, 5 ; addxi r5, r6, 5 ; ld2s r25, r26 } |
| 1278: [0-9a-f]* { addxi r15, r16, 5 ; shl r5, r6, r7 ; ld2s r25, r26 } |
| 1280: [0-9a-f]* { addxi r15, r16, 5 ; info 19 ; ld2u r25, r26 } |
| 1288: [0-9a-f]* { tblidxb3 r5, r6 ; addxi r15, r16, 5 ; ld2u r25, r26 } |
| 1290: [0-9a-f]* { addxi r15, r16, 5 ; or r5, r6, r7 ; ld4s r25, r26 } |
| 1298: [0-9a-f]* { addxi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld4u r25, r26 } |
| 12a0: [0-9a-f]* { addxi r15, r16, 5 ; shrui r5, r6, 5 ; ld4u r25, r26 } |
| 12a8: [0-9a-f]* { addxi r15, r16, 5 ; move r5, r6 ; prefetch_l2_fault r25 } |
| 12b0: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3 r25 } |
| 12b8: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 } |
| 12c0: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l2 r25 } |
| 12c8: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } |
| 12d0: [0-9a-f]* { mulax r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } |
| 12d8: [0-9a-f]* { addxi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l2 r25 } |
| 12e0: [0-9a-f]* { addxi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l3 r25 } |
| 12e8: [0-9a-f]* { pcnt r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } |
| 12f0: [0-9a-f]* { addxi r15, r16, 5 ; mz r5, r6, r7 ; prefetch r25 } |
| 12f8: [0-9a-f]* { addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch r25 } |
| 1300: [0-9a-f]* { addxi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch r25 } |
| 1308: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l1_fault r25 } |
| 1310: [0-9a-f]* { addxi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l2 r25 } |
| 1318: [0-9a-f]* { addxi r15, r16, 5 ; shl1addx r5, r6, r7 ; prefetch_l2 r25 } |
| 1320: [0-9a-f]* { addxi r15, r16, 5 ; move r5, r6 ; prefetch_l2_fault r25 } |
| 1328: [0-9a-f]* { addxi r15, r16, 5 ; prefetch_l2_fault r25 } |
| 1330: [0-9a-f]* { revbits r5, r6 ; addxi r15, r16, 5 ; prefetch_l3 r25 } |
| 1338: [0-9a-f]* { addxi r15, r16, 5 ; cmpne r5, r6, r7 ; prefetch_l3_fault r25 } |
| 1340: [0-9a-f]* { addxi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l3_fault r25 } |
| 1348: [0-9a-f]* { revbytes r5, r6 ; addxi r15, r16, 5 ; st r25, r26 } |
| 1350: [0-9a-f]* { addxi r15, r16, 5 ; rotli r5, r6, 5 ; st2 r25, r26 } |
| 1358: [0-9a-f]* { addxi r15, r16, 5 ; shl1add r5, r6, r7 ; st4 r25, r26 } |
| 1360: [0-9a-f]* { addxi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 } |
| 1368: [0-9a-f]* { addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld1u r25, r26 } |
| 1370: [0-9a-f]* { addxi r15, r16, 5 ; shrs r5, r6, r7 ; ld1u r25, r26 } |
| 1378: [0-9a-f]* { addxi r15, r16, 5 ; shru r5, r6, r7 ; ld2u r25, r26 } |
| 1380: [0-9a-f]* { addxi r15, r16, 5 ; addxi r5, r6, 5 ; st r25, r26 } |
| 1388: [0-9a-f]* { addxi r15, r16, 5 ; shl r5, r6, r7 ; st r25, r26 } |
| 1390: [0-9a-f]* { addxi r15, r16, 5 ; info 19 ; st1 r25, r26 } |
| 1398: [0-9a-f]* { tblidxb3 r5, r6 ; addxi r15, r16, 5 ; st1 r25, r26 } |
| 13a0: [0-9a-f]* { addxi r15, r16, 5 ; or r5, r6, r7 ; st2 r25, r26 } |
| 13a8: [0-9a-f]* { addxi r15, r16, 5 ; cmpltsi r5, r6, 5 ; st4 r25, r26 } |
| 13b0: [0-9a-f]* { addxi r15, r16, 5 ; shrui r5, r6, 5 ; st4 r25, r26 } |
| 13b8: [0-9a-f]* { addxi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l3 r25 } |
| 13c0: [0-9a-f]* { tblidxb1 r5, r6 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } |
| 13c8: [0-9a-f]* { tblidxb3 r5, r6 ; addxi r15, r16, 5 ; st1 r25, r26 } |
| 13d0: [0-9a-f]* { v1sadu r5, r6, r7 ; addxi r15, r16, 5 } |
| 13d8: [0-9a-f]* { v2sadau r5, r6, r7 ; addxi r15, r16, 5 } |
| 13e0: [0-9a-f]* { addxi r15, r16, 5 ; xor r5, r6, r7 ; st4 r25, r26 } |
| 13e8: [0-9a-f]* { addxi r5, r6, 5 ; addi r15, r16, 5 } |
| 13f0: [0-9a-f]* { addxi r5, r6, 5 ; addxli r15, r16, 4660 } |
| 13f8: [0-9a-f]* { addxi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld r25, r26 } |
| 1400: [0-9a-f]* { addxi r5, r6, 5 ; cmples r15, r16, r17 ; ld r25, r26 } |
| 1408: [0-9a-f]* { addxi r5, r6, 5 ; cmplts r15, r16, r17 ; ld1u r25, r26 } |
| 1410: [0-9a-f]* { addxi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld2u r25, r26 } |
| 1418: [0-9a-f]* { addxi r5, r6, 5 ; exch4 r15, r16, r17 } |
| 1420: [0-9a-f]* { addxi r5, r6, 5 ; ill ; prefetch r25 } |
| 1428: [0-9a-f]* { addxi r5, r6, 5 ; jalr r15 ; prefetch r25 } |
| 1430: [0-9a-f]* { addxi r5, r6, 5 ; jr r15 ; prefetch_l1_fault r25 } |
| 1438: [0-9a-f]* { addxi r5, r6, 5 ; cmplts r15, r16, r17 ; ld r25, r26 } |
| 1440: [0-9a-f]* { addxi r5, r6, 5 ; addx r15, r16, r17 ; ld1s r25, r26 } |
| 1448: [0-9a-f]* { addxi r5, r6, 5 ; shrui r15, r16, 5 ; ld1s r25, r26 } |
| 1450: [0-9a-f]* { addxi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld1u r25, r26 } |
| 1458: [0-9a-f]* { addxi r5, r6, 5 ; movei r15, 5 ; ld2s r25, r26 } |
| 1460: [0-9a-f]* { addxi r5, r6, 5 ; ill ; ld2u r25, r26 } |
| 1468: [0-9a-f]* { addxi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld4s r25, r26 } |
| 1470: [0-9a-f]* { addxi r5, r6, 5 ; ld4s r25, r26 } |
| 1478: [0-9a-f]* { addxi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld4u r25, r26 } |
| 1480: [0-9a-f]* { addxi r5, r6, 5 ; lnk r15 ; prefetch_l3 r25 } |
| 1488: [0-9a-f]* { addxi r5, r6, 5 ; move r15, r16 ; prefetch_l3 r25 } |
| 1490: [0-9a-f]* { addxi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l3 r25 } |
| 1498: [0-9a-f]* { addxi r5, r6, 5 ; nor r15, r16, r17 ; st r25, r26 } |
| 14a0: [0-9a-f]* { addxi r5, r6, 5 ; prefetch r25 } |
| 14a8: [0-9a-f]* { addxi r5, r6, 5 ; add r15, r16, r17 ; prefetch r25 } |
| 14b0: [0-9a-f]* { addxi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch r25 } |
| 14b8: [0-9a-f]* { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l1_fault r25 } |
| 14c0: [0-9a-f]* { addxi r5, r6, 5 ; movei r15, 5 ; prefetch_l2 r25 } |
| 14c8: [0-9a-f]* { addxi r5, r6, 5 ; info 19 ; prefetch_l2_fault r25 } |
| 14d0: [0-9a-f]* { addxi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3 r25 } |
| 14d8: [0-9a-f]* { addxi r5, r6, 5 ; add r15, r16, r17 ; prefetch_l3_fault r25 } |
| 14e0: [0-9a-f]* { addxi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch_l3_fault r25 } |
| 14e8: [0-9a-f]* { addxi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 } |
| 14f0: [0-9a-f]* { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st r25, r26 } |
| 14f8: [0-9a-f]* { addxi r5, r6, 5 ; shl2add r15, r16, r17 ; st2 r25, r26 } |
| 1500: [0-9a-f]* { addxi r5, r6, 5 ; shl3add r15, r16, r17 } |
| 1508: [0-9a-f]* { addxi r5, r6, 5 ; shlxi r15, r16, 5 } |
| 1510: [0-9a-f]* { addxi r5, r6, 5 ; shru r15, r16, r17 ; ld1s r25, r26 } |
| 1518: [0-9a-f]* { addxi r5, r6, 5 ; add r15, r16, r17 ; st r25, r26 } |
| 1520: [0-9a-f]* { addxi r5, r6, 5 ; shrsi r15, r16, 5 ; st r25, r26 } |
| 1528: [0-9a-f]* { addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st1 r25, r26 } |
| 1530: [0-9a-f]* { addxi r5, r6, 5 ; move r15, r16 ; st2 r25, r26 } |
| 1538: [0-9a-f]* { addxi r5, r6, 5 ; st4 r25, r26 } |
| 1540: [0-9a-f]* { addxi r5, r6, 5 ; stnt4 r15, r16 } |
| 1548: [0-9a-f]* { addxi r5, r6, 5 ; subx r15, r16, r17 } |
| 1550: [0-9a-f]* { addxi r5, r6, 5 ; v2cmpltui r15, r16, 5 } |
| 1558: [0-9a-f]* { addxi r5, r6, 5 ; xor r15, r16, r17 ; ld4u r25, r26 } |
| 1560: [0-9a-f]* { cmulaf r5, r6, r7 ; addxli r15, r16, 4660 } |
| 1568: [0-9a-f]* { mul_hu_ls r5, r6, r7 ; addxli r15, r16, 4660 } |
| 1570: [0-9a-f]* { addxli r15, r16, 4660 ; shru r5, r6, r7 } |
| 1578: [0-9a-f]* { addxli r15, r16, 4660 ; v1minu r5, r6, r7 } |
| 1580: [0-9a-f]* { v2mulfsc r5, r6, r7 ; addxli r15, r16, 4660 } |
| 1588: [0-9a-f]* { addxli r5, r6, 4660 ; and r15, r16, r17 } |
| 1590: [0-9a-f]* { addxli r5, r6, 4660 ; jrp r15 } |
| 1598: [0-9a-f]* { addxli r5, r6, 4660 ; nop } |
| 15a0: [0-9a-f]* { addxli r5, r6, 4660 ; st2 r15, r16 } |
| 15a8: [0-9a-f]* { addxli r5, r6, 4660 ; v1shru r15, r16, r17 } |
| 15b0: [0-9a-f]* { addxli r5, r6, 4660 ; v4packsc r15, r16, r17 } |
| 15b8: [0-9a-f]* { cmulhr r5, r6, r7 ; addxsc r15, r16, r17 } |
| 15c0: [0-9a-f]* { mul_lu_lu r5, r6, r7 ; addxsc r15, r16, r17 } |
| 15c8: [0-9a-f]* { shufflebytes r5, r6, r7 ; addxsc r15, r16, r17 } |
| 15d0: [0-9a-f]* { v1mulu r5, r6, r7 ; addxsc r15, r16, r17 } |
| 15d8: [0-9a-f]* { addxsc r15, r16, r17 ; v2packh r5, r6, r7 } |
| 15e0: [0-9a-f]* { addxsc r5, r6, r7 ; cmpexch r15, r16, r17 } |
| 15e8: [0-9a-f]* { addxsc r5, r6, r7 ; ld1u r15, r16 } |
| 15f0: [0-9a-f]* { addxsc r5, r6, r7 ; prefetch r15 } |
| 15f8: [0-9a-f]* { addxsc r5, r6, r7 ; st_add r15, r16, 5 } |
| 1600: [0-9a-f]* { addxsc r5, r6, r7 ; v2add r15, r16, r17 } |
| 1608: [0-9a-f]* { addxsc r5, r6, r7 ; v4shru r15, r16, r17 } |
| 1610: [0-9a-f]* { and r15, r16, r17 ; addi r5, r6, 5 ; st1 r25, r26 } |
| 1618: [0-9a-f]* { and r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 } |
| 1620: [0-9a-f]* { and r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 } |
| 1628: [0-9a-f]* { cmoveqz r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 } |
| 1630: [0-9a-f]* { and r15, r16, r17 ; cmpeq r5, r6, r7 ; st4 r25, r26 } |
| 1638: [0-9a-f]* { and r15, r16, r17 ; cmpleu r5, r6, r7 ; ld r25, r26 } |
| 1640: [0-9a-f]* { and r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 } |
| 1648: [0-9a-f]* { and r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 } |
| 1650: [0-9a-f]* { ctz r5, r6 ; and r15, r16, r17 ; st1 r25, r26 } |
| 1658: [0-9a-f]* { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 } |
| 1660: [0-9a-f]* { and r15, r16, r17 ; add r5, r6, r7 ; ld r25, r26 } |
| 1668: [0-9a-f]* { revbytes r5, r6 ; and r15, r16, r17 ; ld r25, r26 } |
| 1670: [0-9a-f]* { ctz r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 } |
| 1678: [0-9a-f]* { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 } |
| 1680: [0-9a-f]* { and r15, r16, r17 ; mz r5, r6, r7 ; ld1u r25, r26 } |
| 1688: [0-9a-f]* { and r15, r16, r17 ; cmples r5, r6, r7 ; ld2s r25, r26 } |
| 1690: [0-9a-f]* { and r15, r16, r17 ; shrs r5, r6, r7 ; ld2s r25, r26 } |
| 1698: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; ld2u r25, r26 } |
| 16a0: [0-9a-f]* { and r15, r16, r17 ; andi r5, r6, 5 ; ld4s r25, r26 } |
| 16a8: [0-9a-f]* { and r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4s r25, r26 } |
| 16b0: [0-9a-f]* { and r15, r16, r17 ; move r5, r6 ; ld4u r25, r26 } |
| 16b8: [0-9a-f]* { and r15, r16, r17 ; ld4u r25, r26 } |
| 16c0: [0-9a-f]* { and r15, r16, r17 ; movei r5, 5 ; ld r25, r26 } |
| 16c8: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; and r15, r16, r17 } |
| 16d0: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st4 r25, r26 } |
| 16d8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 } |
| 16e0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 } |
| 16e8: [0-9a-f]* { mulax r5, r6, r7 ; and r15, r16, r17 ; st2 r25, r26 } |
| 16f0: [0-9a-f]* { and r15, r16, r17 ; mz r5, r6, r7 } |
| 16f8: [0-9a-f]* { and r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 } |
| 1700: [0-9a-f]* { and r15, r16, r17 ; addx r5, r6, r7 ; prefetch r25 } |
| 1708: [0-9a-f]* { and r15, r16, r17 ; rotli r5, r6, 5 ; prefetch r25 } |
| 1710: [0-9a-f]* { fsingle_pack1 r5, r6 ; and r15, r16, r17 ; prefetch r25 } |
| 1718: [0-9a-f]* { tblidxb2 r5, r6 ; and r15, r16, r17 ; prefetch r25 } |
| 1720: [0-9a-f]* { and r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1_fault r25 } |
| 1728: [0-9a-f]* { and r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l2 r25 } |
| 1730: [0-9a-f]* { and r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l2 r25 } |
| 1738: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; and r15, r16, r17 ; prefetch_l2_fault r25 } |
| 1740: [0-9a-f]* { cmoveqz r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 } |
| 1748: [0-9a-f]* { and r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l3 r25 } |
| 1750: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3_fault r25 } |
| 1758: [0-9a-f]* { revbits r5, r6 ; and r15, r16, r17 ; ld1s r25, r26 } |
| 1760: [0-9a-f]* { and r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 } |
| 1768: [0-9a-f]* { and r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 } |
| 1770: [0-9a-f]* { and r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4u r25, r26 } |
| 1778: [0-9a-f]* { and r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch r25 } |
| 1780: [0-9a-f]* { and r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 } |
| 1788: [0-9a-f]* { and r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 } |
| 1790: [0-9a-f]* { and r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3 r25 } |
| 1798: [0-9a-f]* { and r15, r16, r17 ; cmples r5, r6, r7 ; st r25, r26 } |
| 17a0: [0-9a-f]* { and r15, r16, r17 ; shrs r5, r6, r7 ; st r25, r26 } |
| 17a8: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; and r15, r16, r17 ; st1 r25, r26 } |
| 17b0: [0-9a-f]* { and r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 } |
| 17b8: [0-9a-f]* { and r15, r16, r17 ; shl1addx r5, r6, r7 ; st2 r25, r26 } |
| 17c0: [0-9a-f]* { and r15, r16, r17 ; move r5, r6 ; st4 r25, r26 } |
| 17c8: [0-9a-f]* { and r15, r16, r17 ; st4 r25, r26 } |
| 17d0: [0-9a-f]* { tblidxb0 r5, r6 ; and r15, r16, r17 ; ld r25, r26 } |
| 17d8: [0-9a-f]* { tblidxb2 r5, r6 ; and r15, r16, r17 ; ld1u r25, r26 } |
| 17e0: [0-9a-f]* { v1avgu r5, r6, r7 ; and r15, r16, r17 } |
| 17e8: [0-9a-f]* { and r15, r16, r17 ; v1subuc r5, r6, r7 } |
| 17f0: [0-9a-f]* { and r15, r16, r17 ; v2shru r5, r6, r7 } |
| 17f8: [0-9a-f]* { and r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 } |
| 1800: [0-9a-f]* { and r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 } |
| 1808: [0-9a-f]* { and r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 } |
| 1810: [0-9a-f]* { and r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch r25 } |
| 1818: [0-9a-f]* { and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } |
| 1820: [0-9a-f]* { and r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } |
| 1828: [0-9a-f]* { and r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } |
| 1830: [0-9a-f]* { and r5, r6, r7 ; fetchor4 r15, r16, r17 } |
| 1838: [0-9a-f]* { and r5, r6, r7 ; ill ; st2 r25, r26 } |
| 1840: [0-9a-f]* { and r5, r6, r7 ; jalr r15 ; st1 r25, r26 } |
| 1848: [0-9a-f]* { and r5, r6, r7 ; jr r15 ; st4 r25, r26 } |
| 1850: [0-9a-f]* { and r5, r6, r7 ; jalrp r15 ; ld r25, r26 } |
| 1858: [0-9a-f]* { and r5, r6, r7 ; cmplts r15, r16, r17 ; ld1s r25, r26 } |
| 1860: [0-9a-f]* { and r5, r6, r7 ; addi r15, r16, 5 ; ld1u r25, r26 } |
| 1868: [0-9a-f]* { and r5, r6, r7 ; shru r15, r16, r17 ; ld1u r25, r26 } |
| 1870: [0-9a-f]* { and r5, r6, r7 ; shl1add r15, r16, r17 ; ld2s r25, r26 } |
| 1878: [0-9a-f]* { and r5, r6, r7 ; move r15, r16 ; ld2u r25, r26 } |
| 1880: [0-9a-f]* { and r5, r6, r7 ; ld4s r25, r26 } |
| 1888: [0-9a-f]* { and r5, r6, r7 ; andi r15, r16, 5 ; ld4u r25, r26 } |
| 1890: [0-9a-f]* { and r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 } |
| 1898: [0-9a-f]* { and r5, r6, r7 ; mfspr r16, MEM_ERROR_CBOX_ADDR } |
| 18a0: [0-9a-f]* { and r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 } |
| 18a8: [0-9a-f]* { and r5, r6, r7 ; nop ; ld1s r25, r26 } |
| 18b0: [0-9a-f]* { and r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 } |
| 18b8: [0-9a-f]* { and r5, r6, r7 ; mnz r15, r16, r17 ; prefetch r25 } |
| 18c0: [0-9a-f]* { and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch r25 } |
| 18c8: [0-9a-f]* { and r5, r6, r7 ; add r15, r16, r17 ; prefetch_l1_fault r25 } |
| 18d0: [0-9a-f]* { and r5, r6, r7 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 } |
| 18d8: [0-9a-f]* { and r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } |
| 18e0: [0-9a-f]* { and r5, r6, r7 ; movei r15, 5 ; prefetch_l2_fault r25 } |
| 18e8: [0-9a-f]* { and r5, r6, r7 ; info 19 ; prefetch_l3 r25 } |
| 18f0: [0-9a-f]* { and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } |
| 18f8: [0-9a-f]* { and r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 } |
| 1900: [0-9a-f]* { and r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 } |
| 1908: [0-9a-f]* { and r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } |
| 1910: [0-9a-f]* { and r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } |
| 1918: [0-9a-f]* { and r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 } |
| 1920: [0-9a-f]* { and r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 } |
| 1928: [0-9a-f]* { and r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } |
| 1930: [0-9a-f]* { and r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 } |
| 1938: [0-9a-f]* { and r5, r6, r7 ; add r15, r16, r17 ; st1 r25, r26 } |
| 1940: [0-9a-f]* { and r5, r6, r7 ; shrsi r15, r16, 5 ; st1 r25, r26 } |
| 1948: [0-9a-f]* { and r5, r6, r7 ; shl r15, r16, r17 ; st2 r25, r26 } |
| 1950: [0-9a-f]* { and r5, r6, r7 ; mnz r15, r16, r17 ; st4 r25, r26 } |
| 1958: [0-9a-f]* { and r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 } |
| 1960: [0-9a-f]* { and r5, r6, r7 ; v1cmpleu r15, r16, r17 } |
| 1968: [0-9a-f]* { and r5, r6, r7 ; v2mnz r15, r16, r17 } |
| 1970: [0-9a-f]* { and r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 } |
| 1978: [0-9a-f]* { andi r15, r16, 5 ; addi r5, r6, 5 ; st1 r25, r26 } |
| 1980: [0-9a-f]* { andi r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 } |
| 1988: [0-9a-f]* { andi r15, r16, 5 ; andi r5, r6, 5 ; st2 r25, r26 } |
| 1990: [0-9a-f]* { cmoveqz r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 } |
| 1998: [0-9a-f]* { andi r15, r16, 5 ; cmpeq r5, r6, r7 ; st4 r25, r26 } |
| 19a0: [0-9a-f]* { andi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld r25, r26 } |
| 19a8: [0-9a-f]* { andi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 } |
| 19b0: [0-9a-f]* { andi r15, r16, 5 ; cmpne r5, r6, r7 ; ld2s r25, r26 } |
| 19b8: [0-9a-f]* { ctz r5, r6 ; andi r15, r16, 5 ; st1 r25, r26 } |
| 19c0: [0-9a-f]* { fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 } |
| 19c8: [0-9a-f]* { andi r15, r16, 5 ; add r5, r6, r7 ; ld r25, r26 } |
| 19d0: [0-9a-f]* { revbytes r5, r6 ; andi r15, r16, 5 ; ld r25, r26 } |
| 19d8: [0-9a-f]* { ctz r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 } |
| 19e0: [0-9a-f]* { tblidxb0 r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 } |
| 19e8: [0-9a-f]* { andi r15, r16, 5 ; mz r5, r6, r7 ; ld1u r25, r26 } |
| 19f0: [0-9a-f]* { andi r15, r16, 5 ; cmples r5, r6, r7 ; ld2s r25, r26 } |
| 19f8: [0-9a-f]* { andi r15, r16, 5 ; shrs r5, r6, r7 ; ld2s r25, r26 } |
| 1a00: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; ld2u r25, r26 } |
| 1a08: [0-9a-f]* { andi r15, r16, 5 ; andi r5, r6, 5 ; ld4s r25, r26 } |
| 1a10: [0-9a-f]* { andi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld4s r25, r26 } |
| 1a18: [0-9a-f]* { andi r15, r16, 5 ; move r5, r6 ; ld4u r25, r26 } |
| 1a20: [0-9a-f]* { andi r15, r16, 5 ; ld4u r25, r26 } |
| 1a28: [0-9a-f]* { andi r15, r16, 5 ; movei r5, 5 ; ld r25, r26 } |
| 1a30: [0-9a-f]* { mul_hs_ls r5, r6, r7 ; andi r15, r16, 5 } |
| 1a38: [0-9a-f]* { mul_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; st4 r25, r26 } |
| 1a40: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 } |
| 1a48: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 } |
| 1a50: [0-9a-f]* { mulax r5, r6, r7 ; andi r15, r16, 5 ; st2 r25, r26 } |
| 1a58: [0-9a-f]* { andi r15, r16, 5 ; mz r5, r6, r7 } |
| 1a60: [0-9a-f]* { andi r15, r16, 5 ; or r5, r6, r7 ; ld1s r25, r26 } |
| 1a68: [0-9a-f]* { andi r15, r16, 5 ; addx r5, r6, r7 ; prefetch r25 } |
| 1a70: [0-9a-f]* { andi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch r25 } |
| 1a78: [0-9a-f]* { fsingle_pack1 r5, r6 ; andi r15, r16, 5 ; prefetch r25 } |
| 1a80: [0-9a-f]* { tblidxb2 r5, r6 ; andi r15, r16, 5 ; prefetch r25 } |
| 1a88: [0-9a-f]* { andi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l1_fault r25 } |
| 1a90: [0-9a-f]* { andi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l2 r25 } |
| 1a98: [0-9a-f]* { andi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l2 r25 } |
| 1aa0: [0-9a-f]* { mula_ls_ls r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l2_fault r25 } |
| 1aa8: [0-9a-f]* { cmoveqz r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3 r25 } |
| 1ab0: [0-9a-f]* { andi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l3 r25 } |
| 1ab8: [0-9a-f]* { mul_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; prefetch_l3_fault r25 } |
| 1ac0: [0-9a-f]* { revbits r5, r6 ; andi r15, r16, 5 ; ld1s r25, r26 } |
| 1ac8: [0-9a-f]* { andi r15, r16, 5 ; rotl r5, r6, r7 ; ld2s r25, r26 } |
| 1ad0: [0-9a-f]* { andi r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 } |
| 1ad8: [0-9a-f]* { andi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld4u r25, r26 } |
| 1ae0: [0-9a-f]* { andi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch r25 } |
| 1ae8: [0-9a-f]* { andi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 } |
| 1af0: [0-9a-f]* { andi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 } |
| 1af8: [0-9a-f]* { andi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l3 r25 } |
| 1b00: [0-9a-f]* { andi r15, r16, 5 ; cmples r5, r6, r7 ; st r25, r26 } |
| 1b08: [0-9a-f]* { andi r15, r16, 5 ; shrs r5, r6, r7 ; st r25, r26 } |
| 1b10: [0-9a-f]* { mula_hs_hs r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 } |
| 1b18: [0-9a-f]* { andi r15, r16, 5 ; andi r5, r6, 5 ; st2 r25, r26 } |
| 1b20: [0-9a-f]* { andi r15, r16, 5 ; shl1addx r5, r6, r7 ; st2 r25, r26 } |
| 1b28: [0-9a-f]* { andi r15, r16, 5 ; move r5, r6 ; st4 r25, r26 } |
| 1b30: [0-9a-f]* { andi r15, r16, 5 ; st4 r25, r26 } |
| 1b38: [0-9a-f]* { tblidxb0 r5, r6 ; andi r15, r16, 5 ; ld r25, r26 } |
| 1b40: [0-9a-f]* { tblidxb2 r5, r6 ; andi r15, r16, 5 ; ld1u r25, r26 } |
| 1b48: [0-9a-f]* { v1avgu r5, r6, r7 ; andi r15, r16, 5 } |
| 1b50: [0-9a-f]* { andi r15, r16, 5 ; v1subuc r5, r6, r7 } |
| 1b58: [0-9a-f]* { andi r15, r16, 5 ; v2shru r5, r6, r7 } |
| 1b60: [0-9a-f]* { andi r5, r6, 5 ; add r15, r16, r17 ; ld4s r25, r26 } |
| 1b68: [0-9a-f]* { andi r5, r6, 5 ; addx r15, r16, r17 ; ld4u r25, r26 } |
| 1b70: [0-9a-f]* { andi r5, r6, 5 ; and r15, r16, r17 ; ld4u r25, r26 } |
| 1b78: [0-9a-f]* { andi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch r25 } |
| 1b80: [0-9a-f]* { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch r25 } |
| 1b88: [0-9a-f]* { andi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l2 r25 } |
| 1b90: [0-9a-f]* { andi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 } |
| 1b98: [0-9a-f]* { andi r5, r6, 5 ; fetchor4 r15, r16, r17 } |
| 1ba0: [0-9a-f]* { andi r5, r6, 5 ; ill ; st2 r25, r26 } |
| 1ba8: [0-9a-f]* { andi r5, r6, 5 ; jalr r15 ; st1 r25, r26 } |
| 1bb0: [0-9a-f]* { andi r5, r6, 5 ; jr r15 ; st4 r25, r26 } |
| 1bb8: [0-9a-f]* { andi r5, r6, 5 ; jalrp r15 ; ld r25, r26 } |
| 1bc0: [0-9a-f]* { andi r5, r6, 5 ; cmplts r15, r16, r17 ; ld1s r25, r26 } |
| 1bc8: [0-9a-f]* { andi r5, r6, 5 ; addi r15, r16, 5 ; ld1u r25, r26 } |
| 1bd0: [0-9a-f]* { andi r5, r6, 5 ; shru r15, r16, r17 ; ld1u r25, r26 } |
| 1bd8: [0-9a-f]* { andi r5, r6, 5 ; shl1add r15, r16, r17 ; ld2s r25, r26 } |
| 1be0: [0-9a-f]* { andi r5, r6, 5 ; move r15, r16 ; ld2u r25, r26 } |
| 1be8: [0-9a-f]* { andi r5, r6, 5 ; ld4s r25, r26 } |
| 1bf0: [0-9a-f]* { andi r5, r6, 5 ; andi r15, r16, 5 ; ld4u r25, r26 } |
| 1bf8: [0-9a-f]* { andi r5, r6, 5 ; xor r15, r16, r17 ; ld4u r25, r26 } |
| 1c00: [0-9a-f]* { andi r5, r6, 5 ; mfspr r16, MEM_ERROR_CBOX_ADDR } |
| 1c08: [0-9a-f]* { andi r5, r6, 5 ; movei r15, 5 ; ld1s r25, r26 } |
| 1c10: [0-9a-f]* { andi r5, r6, 5 ; nop ; ld1s r25, r26 } |
| 1c18: [0-9a-f]* { andi r5, r6, 5 ; or r15, r16, r17 ; ld2s r25, r26 } |
| 1c20: [0-9a-f]* { andi r5, r6, 5 ; mnz r15, r16, r17 ; prefetch r25 } |
| 1c28: [0-9a-f]* { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch r25 } |
| 1c30: [0-9a-f]* { andi r5, r6, 5 ; add r15, r16, r17 ; prefetch_l1_fault r25 } |
| 1c38: [0-9a-f]* { andi r5, r6, 5 ; shrsi r15, r16, 5 ; prefetch_l1_fault r25 } |
| 1c40: [0-9a-f]* { andi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l2 r25 } |
| 1c48: [0-9a-f]* { andi r5, r6, 5 ; movei r15, 5 ; prefetch_l2_fault r25 } |
| 1c50: [0-9a-f]* { andi r5, r6, 5 ; info 19 ; prefetch_l3 r25 } |
| 1c58: [0-9a-f]* { andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l3_fault r25 } |
| 1c60: [0-9a-f]* { andi r5, r6, 5 ; rotl r15, r16, r17 ; ld r25, r26 } |
| 1c68: [0-9a-f]* { andi r5, r6, 5 ; shl r15, r16, r17 ; ld1u r25, r26 } |
| 1c70: [0-9a-f]* { andi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld2s r25, r26 } |
| 1c78: [0-9a-f]* { andi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4s r25, r26 } |
| 1c80: [0-9a-f]* { andi r5, r6, 5 ; shl3addx r15, r16, r17 ; prefetch r25 } |
| 1c88: [0-9a-f]* { andi r5, r6, 5 ; shrs r15, r16, r17 ; prefetch r25 } |
| 1c90: [0-9a-f]* { andi r5, r6, 5 ; shru r15, r16, r17 ; prefetch_l1_fault r25 } |
| 1c98: [0-9a-f]* { andi r5, r6, 5 ; cmples r15, r16, r17 ; st r25, r26 } |
| 1ca0: [0-9a-f]* { andi r5, r6, 5 ; add r15, r16, r17 ; st1 r25, r26 } |
| 1ca8: [0-9a-f]* { andi r5, r6, 5 ; shrsi r15, r16, 5 ; st1 r25, r26 } |
| 1cb0: [0-9a-f]* { andi r5, r6, 5 ; shl r15, r16, r17 ; st2 r25, r26 } |
| 1cb8: [0-9a-f]* { andi r5, r6, 5 ; mnz r15, r16, r17 ; st4 r25, r26 } |
| 1cc0: [0-9a-f]* { andi r5, r6, 5 ; sub r15, r16, r17 ; ld4s r25, r26 } |
| 1cc8: [0-9a-f]* { andi r5, r6, 5 ; v1cmpleu r15, r16, r17 } |
| 1cd0: [0-9a-f]* { andi r5, r6, 5 ; v2mnz r15, r16, r17 } |
| 1cd8: [0-9a-f]* { andi r5, r6, 5 ; xor r15, r16, r17 ; st r25, r26 } |
| 1ce0: [0-9a-f]* { bfexts r5, r6, 5, 7 ; finv r15 } |
| 1ce8: [0-9a-f]* { bfexts r5, r6, 5, 7 ; ldnt4s_add r15, r16, 5 } |
| 1cf0: [0-9a-f]* { bfexts r5, r6, 5, 7 ; shl3addx r15, r16, r17 } |
| 1cf8: [0-9a-f]* { bfexts r5, r6, 5, 7 ; v1cmpne r15, r16, r17 } |
| 1d00: [0-9a-f]* { bfexts r5, r6, 5, 7 ; v2shl r15, r16, r17 } |
| 1d08: [0-9a-f]* { bfextu r5, r6, 5, 7 ; cmpltu r15, r16, r17 } |
| 1d10: [0-9a-f]* { bfextu r5, r6, 5, 7 ; ld4s r15, r16 } |
| 1d18: [0-9a-f]* { bfextu r5, r6, 5, 7 ; prefetch_add_l3_fault r15, 5 } |
| 1d20: [0-9a-f]* { bfextu r5, r6, 5, 7 ; stnt4 r15, r16 } |
| 1d28: [0-9a-f]* { bfextu r5, r6, 5, 7 ; v2cmpleu r15, r16, r17 } |
| 1d30: [0-9a-f]* { bfins r5, r6, 5, 7 ; add r15, r16, r17 } |
| 1d38: [0-9a-f]* { bfins r5, r6, 5, 7 ; info 19 } |
| 1d40: [0-9a-f]* { bfins r5, r6, 5, 7 ; mfspr r16, MEM_ERROR_CBOX_ADDR } |
| 1d48: [0-9a-f]* { bfins r5, r6, 5, 7 ; shru r15, r16, r17 } |
| 1d50: [0-9a-f]* { bfins r5, r6, 5, 7 ; v1minui r15, r16, 5 } |
| 1d58: [0-9a-f]* { bfins r5, r6, 5, 7 ; v2shrui r15, r16, 5 } |
| 1d60: [0-9a-f]* { clz r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 } |
| 1d68: [0-9a-f]* { clz r5, r6 ; addxi r15, r16, 5 ; ld2u r25, r26 } |
| 1d70: [0-9a-f]* { clz r5, r6 ; andi r15, r16, 5 ; ld2u r25, r26 } |
| 1d78: [0-9a-f]* { clz r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 } |
| 1d80: [0-9a-f]* { clz r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 } |
| 1d88: [0-9a-f]* { clz r5, r6 ; cmpltsi r15, r16, 5 ; prefetch r25 } |
| 1d90: [0-9a-f]* { clz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 } |
| 1d98: [0-9a-f]* { clz r5, r6 ; prefetch_l3_fault r25 } |
| 1da0: [0-9a-f]* { clz r5, r6 ; info 19 ; st r25, r26 } |
| 1da8: [0-9a-f]* { clz r5, r6 ; jalrp r15 ; prefetch_l3_fault r25 } |
| 1db0: [0-9a-f]* { clz r5, r6 ; jrp r15 ; st1 r25, r26 } |
| 1db8: [0-9a-f]* { clz r5, r6 ; shl2addx r15, r16, r17 ; ld r25, r26 } |
| 1dc0: [0-9a-f]* { clz r5, r6 ; nor r15, r16, r17 ; ld1s r25, r26 } |
| 1dc8: [0-9a-f]* { clz r5, r6 ; jalrp r15 ; ld1u r25, r26 } |
| 1dd0: [0-9a-f]* { clz r5, r6 ; cmpleu r15, r16, r17 ; ld2s r25, r26 } |
| 1dd8: [0-9a-f]* { clz r5, r6 ; add r15, r16, r17 ; ld2u r25, r26 } |
| 1de0: [0-9a-f]* { clz r5, r6 ; shrsi r15, r16, 5 ; ld2u r25, r26 } |
| 1de8: [0-9a-f]* { clz r5, r6 ; shl r15, r16, r17 ; ld4s r25, r26 } |
| 1df0: [0-9a-f]* { clz r5, r6 ; mnz r15, r16, r17 ; ld4u r25, r26 } |
| 1df8: [0-9a-f]* { clz r5, r6 ; ldnt4u r15, r16 } |
| 1e00: [0-9a-f]* { clz r5, r6 ; mnz r15, r16, r17 ; st2 r25, r26 } |
| 1e08: [0-9a-f]* { clz r5, r6 ; movei r15, 5 } |
| 1e10: [0-9a-f]* { clz r5, r6 ; nop } |
| 1e18: [0-9a-f]* { clz r5, r6 ; prefetch r15 } |
| 1e20: [0-9a-f]* { clz r5, r6 ; shrs r15, r16, r17 ; prefetch r25 } |
| 1e28: [0-9a-f]* { clz r5, r6 ; mz r15, r16, r17 ; prefetch r25 } |
| 1e30: [0-9a-f]* { clz r5, r6 ; jalr r15 ; prefetch_l1_fault r25 } |
| 1e38: [0-9a-f]* { clz r5, r6 ; cmpleu r15, r16, r17 ; prefetch_l2 r25 } |
| 1e40: [0-9a-f]* { clz r5, r6 ; addi r15, r16, 5 ; prefetch_l2_fault r25 } |
| 1e48: [0-9a-f]* { clz r5, r6 ; shru r15, r16, r17 ; prefetch_l2_fault r25 } |
| 1e50: [0-9a-f]* { clz r5, r6 ; shl1addx r15, r16, r17 ; prefetch_l3 r25 } |
| 1e58: [0-9a-f]* { clz r5, r6 ; mz r15, r16, r17 ; prefetch_l3_fault r25 } |
| 1e60: [0-9a-f]* { clz r5, r6 ; rotl r15, r16, r17 ; st4 r25, r26 } |
| 1e68: [0-9a-f]* { clz r5, r6 ; shl16insli r15, r16, 4660 } |
| 1e70: [0-9a-f]* { clz r5, r6 ; shl2add r15, r16, r17 ; ld1s r25, r26 } |
| 1e78: [0-9a-f]* { clz r5, r6 ; shl3add r15, r16, r17 ; ld2s r25, r26 } |
| 1e80: [0-9a-f]* { clz r5, r6 ; shli r15, r16, 5 ; ld4s r25, r26 } |
| 1e88: [0-9a-f]* { clz r5, r6 ; shrsi r15, r16, 5 ; ld4s r25, r26 } |
| 1e90: [0-9a-f]* { clz r5, r6 ; shrui r15, r16, 5 ; prefetch r25 } |
| 1e98: [0-9a-f]* { clz r5, r6 ; mz r15, r16, r17 ; st r25, r26 } |
| 1ea0: [0-9a-f]* { clz r5, r6 ; jalr r15 ; st1 r25, r26 } |
| 1ea8: [0-9a-f]* { clz r5, r6 ; cmples r15, r16, r17 ; st2 r25, r26 } |
| 1eb0: [0-9a-f]* { clz r5, r6 ; st4 r15, r16 } |
| 1eb8: [0-9a-f]* { clz r5, r6 ; shrs r15, r16, r17 ; st4 r25, r26 } |
| 1ec0: [0-9a-f]* { clz r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 } |
| 1ec8: [0-9a-f]* { clz r5, r6 ; v1shrsi r15, r16, 5 } |
| 1ed0: [0-9a-f]* { clz r5, r6 ; v4int_l r15, r16, r17 } |
| 1ed8: [0-9a-f]* { cmoveqz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2_fault r25 } |
| 1ee0: [0-9a-f]* { cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 } |
| 1ee8: [0-9a-f]* { cmoveqz r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 } |
| 1ef0: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 } |
| 1ef8: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 } |
| 1f00: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 } |
| 1f08: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 } |
| 1f10: [0-9a-f]* { cmoveqz r5, r6, r7 ; ld1u r25, r26 } |
| 1f18: [0-9a-f]* { cmoveqz r5, r6, r7 ; info 19 ; ld2s r25, r26 } |
| 1f20: [0-9a-f]* { cmoveqz r5, r6, r7 ; jalrp r15 ; ld1u r25, r26 } |
| 1f28: [0-9a-f]* { cmoveqz r5, r6, r7 ; jrp r15 ; ld2u r25, r26 } |
| 1f30: [0-9a-f]* { cmoveqz r5, r6, r7 ; movei r15, 5 ; ld r25, r26 } |
| 1f38: [0-9a-f]* { cmoveqz r5, r6, r7 ; info 19 ; ld1s r25, r26 } |
| 1f40: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeqi r15, r16, 5 ; ld1u r25, r26 } |
| 1f48: [0-9a-f]* { cmoveqz r5, r6, r7 ; ld1u_add r15, r16, 5 } |
| 1f50: [0-9a-f]* { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; ld2s r25, r26 } |
| 1f58: [0-9a-f]* { cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld2u r25, r26 } |
| 1f60: [0-9a-f]* { cmoveqz r5, r6, r7 ; jrp r15 ; ld4s r25, r26 } |
| 1f68: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpltsi r15, r16, 5 ; ld4u r25, r26 } |
| 1f70: [0-9a-f]* { cmoveqz r5, r6, r7 ; ldnt r15, r16 } |
| 1f78: [0-9a-f]* { cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 } |
| 1f80: [0-9a-f]* { cmoveqz r5, r6, r7 ; movei r15, 5 ; prefetch r25 } |
| 1f88: [0-9a-f]* { cmoveqz r5, r6, r7 ; nop ; prefetch r25 } |
| 1f90: [0-9a-f]* { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 } |
| 1f98: [0-9a-f]* { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; prefetch r25 } |
| 1fa0: [0-9a-f]* { cmoveqz r5, r6, r7 ; prefetch r25 } |
| 1fa8: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1_fault r25 } |
| 1fb0: [0-9a-f]* { cmoveqz r5, r6, r7 ; prefetch_l1_fault r25 } |
| 1fb8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shli r15, r16, 5 ; prefetch_l2 r25 } |
| 1fc0: [0-9a-f]* { cmoveqz r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l2_fault r25 } |
| 1fc8: [0-9a-f]* { cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; prefetch_l3 r25 } |
| 1fd0: [0-9a-f]* { cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 } |
| 1fd8: [0-9a-f]* { cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 } |
| 1fe0: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; prefetch r25 } |
| 1fe8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 } |
| 1ff0: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 } |
| 1ff8: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 } |
| 2000: [0-9a-f]* { cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 } |
| 2008: [0-9a-f]* { cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 } |
| 2010: [0-9a-f]* { cmoveqz r5, r6, r7 ; st r25, r26 } |
| 2018: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; st1 r25, r26 } |
| 2020: [0-9a-f]* { cmoveqz r5, r6, r7 ; st1 r25, r26 } |
| 2028: [0-9a-f]* { cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; st2 r25, r26 } |
| 2030: [0-9a-f]* { cmoveqz r5, r6, r7 ; or r15, r16, r17 ; st4 r25, r26 } |
| 2038: [0-9a-f]* { cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2_fault r25 } |
| 2040: [0-9a-f]* { cmoveqz r5, r6, r7 ; v1int_h r15, r16, r17 } |
| 2048: [0-9a-f]* { cmoveqz r5, r6, r7 ; v2shli r15, r16, 5 } |
| 2050: [0-9a-f]* { cmovnez r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 } |
| 2058: [0-9a-f]* { cmovnez r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 } |
| 2060: [0-9a-f]* { cmovnez r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 } |
| 2068: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } |
| 2070: [0-9a-f]* { cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 } |
| 2078: [0-9a-f]* { cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 } |
| 2080: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 } |
| 2088: [0-9a-f]* { cmovnez r5, r6, r7 ; fetchaddgez r15, r16, r17 } |
| 2090: [0-9a-f]* { cmovnez r5, r6, r7 ; ill ; prefetch_l2_fault r25 } |
| 2098: [0-9a-f]* { cmovnez r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 } |
| 20a0: [0-9a-f]* { cmovnez r5, r6, r7 ; jr r15 ; prefetch_l3 r25 } |
| 20a8: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpne r15, r16, r17 ; ld r25, r26 } |
| 20b0: [0-9a-f]* { cmovnez r5, r6, r7 ; andi r15, r16, 5 ; ld1s r25, r26 } |
| 20b8: [0-9a-f]* { cmovnez r5, r6, r7 ; xor r15, r16, r17 ; ld1s r25, r26 } |
| 20c0: [0-9a-f]* { cmovnez r5, r6, r7 ; shl3add r15, r16, r17 ; ld1u r25, r26 } |
| 20c8: [0-9a-f]* { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; ld2s r25, r26 } |
| 20d0: [0-9a-f]* { cmovnez r5, r6, r7 ; jalrp r15 ; ld2u r25, r26 } |
| 20d8: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpleu r15, r16, r17 ; ld4s r25, r26 } |
| 20e0: [0-9a-f]* { cmovnez r5, r6, r7 ; add r15, r16, r17 ; ld4u r25, r26 } |
| 20e8: [0-9a-f]* { cmovnez r5, r6, r7 ; shrsi r15, r16, 5 ; ld4u r25, r26 } |
| 20f0: [0-9a-f]* { cmovnez r5, r6, r7 ; lnk r15 ; st1 r25, r26 } |
| 20f8: [0-9a-f]* { cmovnez r5, r6, r7 ; move r15, r16 ; st1 r25, r26 } |
| 2100: [0-9a-f]* { cmovnez r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 } |
| 2108: [0-9a-f]* { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 } |
| 2110: [0-9a-f]* { cmovnez r5, r6, r7 ; jalr r15 ; prefetch r25 } |
| 2118: [0-9a-f]* { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; prefetch r25 } |
| 2120: [0-9a-f]* { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; prefetch r25 } |
| 2128: [0-9a-f]* { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l1_fault r25 } |
| 2130: [0-9a-f]* { cmovnez r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 } |
| 2138: [0-9a-f]* { cmovnez r5, r6, r7 ; jr r15 ; prefetch_l2_fault r25 } |
| 2140: [0-9a-f]* { cmovnez r5, r6, r7 ; cmpltsi r15, r16, 5 ; prefetch_l3 r25 } |
| 2148: [0-9a-f]* { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; prefetch_l3_fault r25 } |
| 2150: [0-9a-f]* { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l3_fault r25 } |
| 2158: [0-9a-f]* { cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 } |
| 2160: [0-9a-f]* { cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 } |
| 2168: [0-9a-f]* { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 } |
| 2170: [0-9a-f]* { cmovnez r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 } |
| 2178: [0-9a-f]* { cmovnez r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 } |
| 2180: [0-9a-f]* { cmovnez r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 } |
| 2188: [0-9a-f]* { cmovnez r5, r6, r7 ; addxi r15, r16, 5 ; st r25, r26 } |
| 2190: [0-9a-f]* { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; st r25, r26 } |
| 2198: [0-9a-f]* { cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; st1 r25, r26 } |
| 21a0: [0-9a-f]* { cmovnez r5, r6, r7 ; nop ; st2 r25, r26 } |
| 21a8: [0-9a-f]* { cmovnez r5, r6, r7 ; jalr r15 ; st4 r25, r26 } |
| 21b0: [0-9a-f]* { cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 } |
| 21b8: [0-9a-f]* { cmovnez r5, r6, r7 ; v1addi r15, r16, 5 } |
| 21c0: [0-9a-f]* { cmovnez r5, r6, r7 ; v2int_l r15, r16, r17 } |
| 21c8: [0-9a-f]* { cmovnez r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 } |
| 21d0: [0-9a-f]* { cmpeq r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l2 r25 } |
| 21d8: [0-9a-f]* { cmpeq r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 } |
| 21e0: [0-9a-f]* { cmpeq r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l2_fault r25 } |
| 21e8: [0-9a-f]* { cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 } |
| 21f0: [0-9a-f]* { cmpeq r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 } |
| 21f8: [0-9a-f]* { cmpeq r15, r16, r17 ; cmples r5, r6, r7 ; st r25, r26 } |
| 2200: [0-9a-f]* { cmpeq r15, r16, r17 ; cmplts r5, r6, r7 ; st2 r25, r26 } |
| 2208: [0-9a-f]* { cmpeq r15, r16, r17 ; cmpltu r5, r6, r7 } |
| 2210: [0-9a-f]* { ctz r5, r6 ; cmpeq r15, r16, r17 ; prefetch_l2 r25 } |
| 2218: [0-9a-f]* { fsingle_add1 r5, r6, r7 ; cmpeq r15, r16, r17 } |
| 2220: [0-9a-f]* { cmpeq r15, r16, r17 ; info 19 ; st1 r25, r26 } |
| 2228: [0-9a-f]* { cmpeq r15, r16, r17 ; nop ; ld r25, r26 } |
| 2230: [0-9a-f]* { cmpeq r15, r16, r17 ; cmpleu r5, r6, r7 ; ld1s r25, r26 } |
| 2238: [0-9a-f]* { cmpeq r15, r16, r17 ; shrsi r5, r6, 5 ; ld1s r25, r26 } |
| 2240: [0-9a-f]* { mula_hu_hu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld1u r25, r26 } |
| 2248: [0-9a-f]* { clz r5, r6 ; cmpeq r15, r16, r17 ; ld2s r25, r26 } |
| 2250: [0-9a-f]* { cmpeq r15, r16, r17 ; shl2add r5, r6, r7 ; ld2s r25, r26 } |
| 2258: [0-9a-f]* { cmpeq r15, r16, r17 ; movei r5, 5 ; ld2u r25, r26 } |
| 2260: [0-9a-f]* { cmpeq r15, r16, r17 ; add r5, r6, r7 ; ld4s r25, r26 } |
| 2268: [0-9a-f]* { revbytes r5, r6 ; cmpeq r15, r16, r17 ; ld4s r25,<
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