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gnu / binutils-gdb / 38b03d23c7c7e6a9f8f27a9899fd0a84587c379e / . / gas / testsuite / gas / tilegx / t_insns.s
blob: c7560496f63dbdd94de7db874db0c876b6dc2f39 [file] [log] [blame]
target:
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{ fdouble_sub_flags r5, r6, r7 ; bnezt r15, target }
{ fdouble_sub_flags r5, r6, r7 ; bnez r15, target }
{ fdouble_addsub r5, r6, r7 ; bnez r15, target }
{ fdouble_pack1 r5, r6, r7 ; bnez r15, target }
{ fsingle_pack2 r5, r6, r7 ; bnez r15, target }
{ fsingle_mul2 r5, r6, r7 ; blez r15, target }
{ mula_hs_hu r5, r6, r7 ; bgtzt r15, target }
{ mula_hu_lu r5, r6, r7 ; bgtzt r15, target }
{ addli r5, r6, 0x1234 ; bgtzt r15, target }
{ fsingle_pack1 r5, r6 ; beqzt r15, target }
{ mul_hu_hu r5, r6, r7 ; beqzt r15, target }
{ mul_lu_lu r5, r6, r7 ; beqzt r15, target }
{ mula_hu_hu r5, r6, r7 ; beqz r15, target }
{ mula_lu_lu r5, r6, r7 ; beqz r15, target }
{ addli r5, r6, 0x1234 ; beqz r15, target }
{ dblalign2 r5, r6, r7 ; beqz r15, target }
{ mul_hs_hs r5, r6, r7 ; blbs r15, target }
{ mul_hu_ls r5, r6, r7 ; blbs r15, target }
{ shl1addx r5, r6, r7 ; blbst r15, target }
{ v1cmpleu r5, r6, r7 ; blbst r15, target }
{ v1ddotpu r5, r6, r7 ; blbst r15, target }
{ v1dotpusa r5, r6, r7 ; blbs r15, target }
{ v2cmpltsi r5, r6, 5 ; blbst r15, target }
{ v4packsc r5, r6, r7 ; blbst r15, target }
{ cmovnez r5, r6, r7 ; blbst r15, target }
{ shl1addx r5, r6, r7 ; bgtz r15, target }
{ v1adduc r5, r6, r7 ; bgtzt r15, target }
{ v1cmpleu r5, r6, r7 ; bgtz r15, target }
{ v1cmpne r5, r6, r7 ; bgtzt r15, target }
{ v1dotpus r5, r6, r7 ; bgtz r15, target }
{ v1sadau r5, r6, r7 ; bgtzt r15, target }
{ v2cmpeqi r5, r6, 5 ; bgtzt r15, target }
{ v2cmpltu r5, r6, r7 ; bgtz r15, target }
{ v2int_l r5, r6, r7 ; bgtzt r15, target }
{ v2packuc r5, r6, r7 ; bgtz r15, target }
{ v4addsc r5, r6, r7 ; bgtzt r15, target }
{ v4subsc r5, r6, r7 ; bgtzt r15, target }
{ cmples r5, r6, r7 ; bgtzt r15, target }
{ cmpltui r5, r6, 5 ; bgtzt r15, target }
{ fsingle_addsub2 r5, r6, r7 ; j target }
{ subxsc r5, r6, r7 ; bltzt r15, target }
{ v1cmpne r5, r6, r7 ; bltz r15, target }
{ v1int_l r5, r6, r7 ; bltz r15, target }
{ v1multu r5, r6, r7 ; bltz r15, target }
{ v1shrs r5, r6, r7 ; bltzt r15, target }
{ v2addsc r5, r6, r7 ; bltz r15, target }
{ v2dotp r5, r6, r7 ; bltzt r15, target }
{ v2maxsi r5, r6, 5 ; bltzt r15, target }
{ v2packh r5, r6, r7 ; bltz r15, target }
{ v2sadu r5, r6, r7 ; bltzt r15, target }
{ v2shrui r5, r6, 5 ; bltzt r15, target }
{ v4shlsc r5, r6, r7 ; bltz r15, target }
{ cmpeq r5, r6, r7 ; bltzt r15, target }
{ cmpltsi r5, r6, 5 ; bltz r15, target }
{ cmulaf r5, r6, r7 ; bltz r15, target }
{ moveli r5, 0x1234 ; bgez r15, target }
{ subxsc r5, r6, r7 ; bnez r15, target }
{ v1maxu r5, r6, r7 ; bnez r15, target }
{ v1mulu r5, r6, r7 ; bnez r15, target }
{ v1shrsi r5, r6, 5 ; bnez r15, target }
{ v2addi r5, r6, 5 ; bnezt r15, target }
{ v2mins r5, r6, r7 ; bnez r15, target }
{ v2sadu r5, r6, r7 ; bnez r15, target }
{ v2shru r5, r6, r7 ; bnez r15, target }
{ v4shrs r5, r6, r7 ; bnez r15, target }
{ cmpeq r5, r6, r7 ; bnez r15, target }
{ cmulf r5, r6, r7 ; bnez r15, target }
{ revbytes r5, r6 ; blbst r15, target }
{ shrs r5, r6, r7 ; blbst r15, target }
{ shruxi r5, r6, 5 ; blbs r15, target }
{ tblidxb3 r5, r6 ; blbst r15, target }
{ v1shl r5, r6, r7 ; blbs r15, target }
{ v2mnz r5, r6, r7 ; blbs r15, target }
{ v4add r5, r6, r7 ; blbs r15, target }
{ addx r5, r6, r7 ; blbs r15, target }
{ fsingle_sub1 r5, r6, r7 ; j target }
{ nor r5, r6, r7 ; blezt r15, target }
{ shl r5, r6, r7 ; blezt r15, target }
{ shrsi r5, r6, 5 ; blez r15, target }
{ tblidxb0 r5, r6 ; blbs r15, target }
{ v2mz r5, r6, r7 ; blbc r15, target }
{ and r5, r6, r7 ; bgtz r15, target }
{ mz r5, r6, r7 ; blbst r15, target }
{ shl r5, r6, r7 ; blbs r15, target }
{ bfexts r5, r6, 5, 7 ; jal target }
{ ori r5, r6, 5 ; bgtz r15, target }
{ infol 0x1234 ; bgez r15, target }
{ pcnt r5, r6 ; bnezt r15, target }
{ bfextu r5, r6, 5, 7 ; j target }
{ movei r5, 5 ; blbs r15, target }
{ v2avgs r5, r6, r7 ; jal target }
{ cmulh r5, r6, r7 ; jal target }
{ v2dotpa r5, r6, r7 ; j target }
{ rotli r5, r6, 5 ; jal target }
{ v4shrs r5, r6, r7 ; j target }
{ v2sub r5, r6, r7 ; j target }
{ and r5, r6, r7 ; j target }
{ nop ; blbst r15, target }
{ beqzt r15, target ; cmpltu r5, r6, r7 }
{ beqzt r15, target ; mul_hs_hs r5, r6, r7 }
{ beqzt r15, target ; shli r5, r6, 5 }
{ beqzt r15, target ; v1dotpusa r5, r6, r7 }
{ beqzt r15, target ; v2maxs r5, r6, r7 }
{ bgezt r15, target ; addli r5, r6, 0x1234 }
{ bgezt r15, target ; fdouble_pack2 r5, r6, r7 }
{ bgezt r15, target ; mulx r5, r6, r7 }
{ bgezt r15, target ; v1avgu r5, r6, r7 }
{ bgezt r15, target ; v1subuc r5, r6, r7 }
{ bgezt r15, target ; v2shru r5, r6, r7 }
{ bgtzt r15, target ; cmpne r5, r6, r7 }
{ bgtzt r15, target ; mul_hs_ls r5, r6, r7 }
{ bgtzt r15, target ; shlxi r5, r6, 5 }
{ bgtzt r15, target ; v1int_l r5, r6, r7 }
{ bgtzt r15, target ; v2mins r5, r6, r7 }
{ blbct r15, target ; addxi r5, r6, 5 }
{ blbct r15, target ; fdouble_unpack_max r5, r6, r7 }
{ blbct r15, target ; nop }
{ blbct r15, target ; v1cmpeqi r5, r6, 5 }
{ blbct r15, target ; v2addi r5, r6, 5 }
{ blbct r15, target ; v2sub r5, r6, r7 }
{ blbst r15, target ; cmula r5, r6, r7 }
{ blbst r15, target ; mul_hu_hu r5, r6, r7 }
{ blbst r15, target ; shrsi r5, r6, 5 }
{ blbst r15, target ; v1maxui r5, r6, 5 }
{ blbst r15, target ; v2mnz r5, r6, r7 }
{ blezt r15, target ; addxsc r5, r6, r7 }
{ blezt r15, target ; fnop }
{ blezt r15, target ; or r5, r6, r7 }
{ blezt r15, target ; v1cmpleu r5, r6, r7 }
{ blezt r15, target ; v2adiffs r5, r6, r7 }
{ blezt r15, target ; v4add r5, r6, r7 }
{ bltzt r15, target ; cmulf r5, r6, r7 }
{ bltzt r15, target ; mul_hu_lu r5, r6, r7 }
{ bltzt r15, target ; shrui r5, r6, 5 }
{ bltzt r15, target ; v1minui r5, r6, 5 }
{ bltzt r15, target ; v2muls r5, r6, r7 }
{ bnezt r15, target ; andi r5, r6, 5 }
{ bnezt r15, target ; fsingle_addsub2 r5, r6, r7 }
{ bnezt r15, target ; pcnt r5, r6 }
{ bnezt r15, target ; v1cmpltsi r5, r6, 5 }
{ bnezt r15, target ; v2cmpeq r5, r6, r7 }
{ bnezt r15, target ; v4int_h r5, r6, r7 }
{ beqz r15, target ; cmulfr r5, r6, r7 }
{ beqz r15, target ; mul_ls_ls r5, r6, r7 }
{ beqz r15, target ; shrux r5, r6, r7 }
{ beqz r15, target ; v1mnz r5, r6, r7 }
{ beqz r15, target ; v2mults r5, r6, r7 }
{ bgez r15, target ; bfexts r5, r6, 5, 7 }
{ bgez r15, target ; fsingle_mul1 r5, r6, r7 }
{ bgez r15, target ; revbits r5, r6 }
{ bgez r15, target ; v1cmpltu r5, r6, r7 }
{ bgez r15, target ; v2cmpeqi r5, r6, 5 }
{ bgez r15, target ; v4int_l r5, r6, r7 }
{ bgtz r15, target ; cmulhr r5, r6, r7 }
{ bgtz r15, target ; mul_lu_lu r5, r6, r7 }
{ bgtz r15, target ; shufflebytes r5, r6, r7 }
{ bgtz r15, target ; v1mulu r5, r6, r7 }
{ bgtz r15, target ; v2packh r5, r6, r7 }
{ blbc r15, target ; bfins r5, r6, 5, 7 }
{ blbc r15, target ; fsingle_pack1 r5, r6 }
{ blbc r15, target ; rotl r5, r6, r7 }
{ blbc r15, target ; v1cmpne r5, r6, r7 }
{ blbc r15, target ; v2cmpleu r5, r6, r7 }
{ blbc r15, target ; v4shl r5, r6, r7 }
{ blbs r15, target ; crc32_8 r5, r6, r7 }
{ blbs r15, target ; mula_hs_hu r5, r6, r7 }
{ blbs r15, target ; subx r5, r6, r7 }
{ blbs r15, target ; v1mz r5, r6, r7 }
{ blbs r15, target ; v2packuc r5, r6, r7 }
{ blez r15, target ; cmoveqz r5, r6, r7 }
{ blez r15, target ; fsingle_sub1 r5, r6, r7 }
{ blez r15, target ; shl r5, r6, r7 }
{ blez r15, target ; v1ddotpua r5, r6, r7 }
{ blez r15, target ; v2cmpltsi r5, r6, 5 }
{ blez r15, target ; v4shrs r5, r6, r7 }
{ bltz r15, target ; dblalign r5, r6, r7 }
{ bltz r15, target ; mula_hs_lu r5, r6, r7 }
{ bltz r15, target ; tblidxb0 r5, r6 }
{ bltz r15, target ; v1sadu r5, r6, r7 }
{ bltz r15, target ; v2sadau r5, r6, r7 }
{ bnez r15, target ; cmpeq r5, r6, r7 }
{ bnez r15, target ; infol 0x1234 }
{ bnez r15, target ; shl1add r5, r6, r7 }
{ bnez r15, target ; v1ddotpusa r5, r6, r7 }
{ bnez r15, target ; v2cmpltui r5, r6, 5 }
{ bnez r15, target ; v4sub r5, r6, r7 }
{ jal target ; cmples r5, r6, r7 }
{ jal target ; mnz r5, r6, r7 }
{ jal target ; shl2add r5, r6, r7 }
{ jal target ; v1dotpa r5, r6, r7 }
{ jal target ; v2dotp r5, r6, r7 }
{ jal target ; xor r5, r6, r7 }
{ j target ; dblalign6 r5, r6, r7 }
{ j target ; mula_hu_lu r5, r6, r7 }
{ j target ; tblidxb3 r5, r6 }
{ j target ; v1shrs r5, r6, r7 }
{ j target ; v2shl r5, r6, r7 }
cmpeqi r5, r6, 5
fetchand r5, r6, r7
ldna_add r5, r6, 5
mula_hu_lu r5, r6, r7
shlx r5, r6, r7
v1avgu r5, r6, r7
v1subuc r5, r6, r7
v2shru r5, r6, r7
{ add r15, r16, r17 ; addi r5, r6, 5 ; ld2s r25, r26 }
{ add r15, r16, r17 ; addxi r5, r6, 5 ; ld2u r25, r26 }
{ add r15, r16, r17 ; andi r5, r6, 5 ; ld2u r25, r26 }
{ add r15, r16, r17 ; cmoveqz r5, r6, r7 ; ld2s r25, r26 }
{ add r15, r16, r17 ; cmpeq r5, r6, r7 ; ld4s r25, r26 }
{ add r15, r16, r17 ; cmples r5, r6, r7 ; prefetch r25 }
{ add r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 }
{ add r15, r16, r17 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 }
{ add r15, r16, r17 ; ctz r5, r6 ; ld2s r25, r26 }
{ add r15, r16, r17 ; fnop ; prefetch_l3 r25 }
{ add r15, r16, r17 ; info 19 ; prefetch_l1 r25 }
{ add r15, r16, r17 ; ld r25, r26 ; mula_hs_hs r5, r6, r7 }
{ add r15, r16, r17 ; ld1s r25, r26 ; andi r5, r6, 5 }
{ add r15, r16, r17 ; ld1s r25, r26 ; shl1addx r5, r6, r7 }
{ add r15, r16, r17 ; ld1u r25, r26 ; move r5, r6 }
{ add r15, r16, r17 ; ld1u r25, r26 }
{ add r15, r16, r17 ; ld2s r25, r26 ; revbits r5, r6 }
{ add r15, r16, r17 ; ld2u r25, r26 ; cmpne r5, r6, r7 }
{ add r15, r16, r17 ; ld2u r25, r26 ; subx r5, r6, r7 }
{ add r15, r16, r17 ; ld4s r25, r26 ; mulx r5, r6, r7 }
{ add r15, r16, r17 ; ld4u r25, r26 ; cmpeqi r5, r6, 5 }
{ add r15, r16, r17 ; ld4u r25, r26 ; shli r5, r6, 5 }
{ add r15, r16, r17 ; move r5, r6 ; prefetch r25 }
{ add r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
{ add r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; ld4s r25, r26 }
{ add r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; ld4u r25, r26 }
{ add r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; ld2s r25, r26 }
{ add r15, r16, r17 ; mulax r5, r6, r7 ; ld2u r25, r26 }
{ add r15, r16, r17 ; mz r5, r6, r7 ; ld4u r25, r26 }
{ add r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l1 r25 }
{ add r15, r16, r17 ; pcnt r5, r6 ; prefetch_l1_fault r25 }
{ add r15, r16, r17 ; prefetch r25 ; mula_ls_ls r5, r6, r7 }
{ add r15, r16, r17 ; prefetch_l1 r25 ; cmoveqz r5, r6, r7 }
{ add r15, r16, r17 ; prefetch_l1 r25 ; shl2addx r5, r6, r7 }
{ add r15, r16, r17 ; prefetch_l1_fault r25 ; mul_hs_hs r5, r6, r7 }
{ add r15, r16, r17 ; prefetch_l2 r25 ; addi r5, r6, 5 }
{ add r15, r16, r17 ; prefetch_l2 r25 ; rotl r5, r6, r7 }
{ add r15, r16, r17 ; prefetch_l2_fault r25 ; fnop }
{ add r15, r16, r17 ; prefetch_l2_fault r25 ; tblidxb1 r5, r6 }
{ add r15, r16, r17 ; prefetch_l3 r25 ; nop }
{ add r15, r16, r17 ; prefetch_l3_fault r25 ; cmpleu r5, r6, r7 }
{ add r15, r16, r17 ; prefetch_l3_fault r25 ; shrsi r5, r6, 5 }
{ add r15, r16, r17 ; revbytes r5, r6 ; prefetch_l2 r25 }
{ add r15, r16, r17 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
{ add r15, r16, r17 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 }
{ add r15, r16, r17 ; shl2add r5, r6, r7 ; st1 r25, r26 }
{ add r15, r16, r17 ; shl3add r5, r6, r7 ; st4 r25, r26 }
{ add r15, r16, r17 ; shlx r5, r6, r7 }
{ add r15, r16, r17 ; shru r5, r6, r7 ; ld r25, r26 }
{ add r15, r16, r17 ; shufflebytes r5, r6, r7 }
{ add r15, r16, r17 ; st r25, r26 ; revbits r5, r6 }
{ add r15, r16, r17 ; st1 r25, r26 ; cmpne r5, r6, r7 }
{ add r15, r16, r17 ; st1 r25, r26 ; subx r5, r6, r7 }
{ add r15, r16, r17 ; st2 r25, r26 ; mulx r5, r6, r7 }
{ add r15, r16, r17 ; st4 r25, r26 ; cmpeqi r5, r6, 5 }
{ add r15, r16, r17 ; st4 r25, r26 ; shli r5, r6, 5 }
{ add r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l1 r25 }
{ add r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l1_fault r25 }
{ add r15, r16, r17 ; tblidxb3 r5, r6 ; prefetch_l2_fault r25 }
{ add r15, r16, r17 ; v1mulu r5, r6, r7 }
{ add r15, r16, r17 ; v2packh r5, r6, r7 }
{ add r15, r16, r17 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
{ add r5, r6, r7 ; addi r15, r16, 5 ; st r25, r26 }
{ add r5, r6, r7 ; addxi r15, r16, 5 ; st1 r25, r26 }
{ add r5, r6, r7 ; andi r15, r16, 5 ; st1 r25, r26 }
{ add r5, r6, r7 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
{ add r5, r6, r7 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
{ add r5, r6, r7 ; cmpltu r15, r16, r17 ; ld r25, r26 }
{ add r5, r6, r7 ; dblalign4 r15, r16, r17 }
{ add r5, r6, r7 ; ill ; ld2u r25, r26 }
{ add r5, r6, r7 ; jalr r15 ; ld2s r25, r26 }
{ add r5, r6, r7 ; jr r15 ; ld4s r25, r26 }
{ add r5, r6, r7 ; ld r25, r26 ; cmpeq r15, r16, r17 }
{ add r5, r6, r7 ; ld r25, r26 }
{ add r5, r6, r7 ; ld1s r25, r26 ; shli r15, r16, 5 }
{ add r5, r6, r7 ; ld1u r25, r26 ; rotl r15, r16, r17 }
{ add r5, r6, r7 ; ld2s r25, r26 ; jrp r15 }
{ add r5, r6, r7 ; ld2u r25, r26 ; cmpltsi r15, r16, 5 }
{ add r5, r6, r7 ; ld4s r25, r26 ; addx r15, r16, r17 }
{ add r5, r6, r7 ; ld4s r25, r26 ; shrui r15, r16, 5 }
{ add r5, r6, r7 ; ld4u r25, r26 ; shl1addx r15, r16, r17 }
{ add r5, r6, r7 ; lnk r15 ; prefetch_l1 r25 }
{ add r5, r6, r7 ; move r15, r16 ; prefetch_l1 r25 }
{ add r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l1 r25 }
{ add r5, r6, r7 ; nor r15, r16, r17 ; prefetch_l2 r25 }
{ add r5, r6, r7 ; prefetch r25 ; cmplts r15, r16, r17 }
{ add r5, r6, r7 ; prefetch_add_l2_fault r15, 5 }
{ add r5, r6, r7 ; prefetch_l1 r25 ; shl3add r15, r16, r17 }
{ add r5, r6, r7 ; prefetch_l1_fault r25 ; or r15, r16, r17 }
{ add r5, r6, r7 ; prefetch_l2 r25 ; jrp r15 }
{ add r5, r6, r7 ; prefetch_l2_fault r25 ; cmpltu r15, r16, r17 }
{ add r5, r6, r7 ; prefetch_l3 r25 ; and r15, r16, r17 }
{ add r5, r6, r7 ; prefetch_l3 r25 ; subx r15, r16, r17 }
{ add r5, r6, r7 ; prefetch_l3_fault r25 ; shl3add r15, r16, r17 }
{ add r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
{ add r5, r6, r7 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
{ add r5, r6, r7 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
{ add r5, r6, r7 ; shl3add r15, r16, r17 ; st r25, r26 }
{ add r5, r6, r7 ; shli r15, r16, 5 ; st2 r25, r26 }
{ add r5, r6, r7 ; shrsi r15, r16, 5 ; st2 r25, r26 }
{ add r5, r6, r7 ; shrui r15, r16, 5 }
{ add r5, r6, r7 ; st r25, r26 ; shl3add r15, r16, r17 }
{ add r5, r6, r7 ; st1 r25, r26 ; or r15, r16, r17 }
{ add r5, r6, r7 ; st2 r25, r26 ; jr r15 }
{ add r5, r6, r7 ; st4 r25, r26 ; cmplts r15, r16, r17 }
{ add r5, r6, r7 ; stnt1 r15, r16 }
{ add r5, r6, r7 ; subx r15, r16, r17 ; st r25, r26 }
{ add r5, r6, r7 ; v2cmpleu r15, r16, r17 }
{ add r5, r6, r7 ; xor r15, r16, r17 ; ld1u r25, r26 }
{ addi r15, r16, 5 ; addi r5, r6, 5 ; ld2s r25, r26 }
{ addi r15, r16, 5 ; addxi r5, r6, 5 ; ld2u r25, r26 }
{ addi r15, r16, 5 ; andi r5, r6, 5 ; ld2u r25, r26 }
{ addi r15, r16, 5 ; cmoveqz r5, r6, r7 ; ld2s r25, r26 }
{ addi r15, r16, 5 ; cmpeq r5, r6, r7 ; ld4s r25, r26 }
{ addi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch r25 }
{ addi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l1_fault r25 }
{ addi r15, r16, 5 ; cmpltu r5, r6, r7 ; prefetch_l2_fault r25 }
{ addi r15, r16, 5 ; ctz r5, r6 ; ld2s r25, r26 }
{ addi r15, r16, 5 ; fnop ; prefetch_l3 r25 }
{ addi r15, r16, 5 ; info 19 ; prefetch_l1 r25 }
{ addi r15, r16, 5 ; ld r25, r26 ; mula_hs_hs r5, r6, r7 }
{ addi r15, r16, 5 ; ld1s r25, r26 ; andi r5, r6, 5 }
{ addi r15, r16, 5 ; ld1s r25, r26 ; shl1addx r5, r6, r7 }
{ addi r15, r16, 5 ; ld1u r25, r26 ; move r5, r6 }
{ addi r15, r16, 5 ; ld1u r25, r26 }
{ addi r15, r16, 5 ; ld2s r25, r26 ; revbits r5, r6 }
{ addi r15, r16, 5 ; ld2u r25, r26 ; cmpne r5, r6, r7 }
{ addi r15, r16, 5 ; ld2u r25, r26 ; subx r5, r6, r7 }
{ addi r15, r16, 5 ; ld4s r25, r26 ; mulx r5, r6, r7 }
{ addi r15, r16, 5 ; ld4u r25, r26 ; cmpeqi r5, r6, 5 }
{ addi r15, r16, 5 ; ld4u r25, r26 ; shli r5, r6, 5 }
{ addi r15, r16, 5 ; move r5, r6 ; prefetch r25 }
{ addi r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; prefetch_l1 r25 }
{ addi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; ld4s r25, r26 }
{ addi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; ld4u r25, r26 }
{ addi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; ld2s r25, r26 }
{ addi r15, r16, 5 ; mulax r5, r6, r7 ; ld2u r25, r26 }
{ addi r15, r16, 5 ; mz r5, r6, r7 ; ld4u r25, r26 }
{ addi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l1 r25 }
{ addi r15, r16, 5 ; pcnt r5, r6 ; prefetch_l1_fault r25 }
{ addi r15, r16, 5 ; prefetch r25 ; mula_ls_ls r5, r6, r7 }
{ addi r15, r16, 5 ; prefetch_l1 r25 ; cmoveqz r5, r6, r7 }
{ addi r15, r16, 5 ; prefetch_l1 r25 ; shl2addx r5, r6, r7 }
{ addi r15, r16, 5 ; prefetch_l1_fault r25 ; mul_hs_hs r5, r6, r7 }
{ addi r15, r16, 5 ; prefetch_l2 r25 ; addi r5, r6, 5 }
{ addi r15, r16, 5 ; prefetch_l2 r25 ; rotl r5, r6, r7 }
{ addi r15, r16, 5 ; prefetch_l2_fault r25 ; fnop }
{ addi r15, r16, 5 ; prefetch_l2_fault r25 ; tblidxb1 r5, r6 }
{ addi r15, r16, 5 ; prefetch_l3 r25 ; nop }
{ addi r15, r16, 5 ; prefetch_l3_fault r25 ; cmpleu r5, r6, r7 }
{ addi r15, r16, 5 ; prefetch_l3_fault r25 ; shrsi r5, r6, 5 }
{ addi r15, r16, 5 ; revbytes r5, r6 ; prefetch_l2 r25 }
{ addi r15, r16, 5 ; rotli r5, r6, 5 ; prefetch_l3 r25 }
{ addi r15, r16, 5 ; shl1add r5, r6, r7 ; prefetch_l3_fault r25 }
{ addi r15, r16, 5 ; shl2add r5, r6, r7 ; st1 r25, r26 }
{ addi r15, r16, 5 ; shl3add r5, r6, r7 ; st4 r25, r26 }
{ addi r15, r16, 5 ; shlx r5, r6, r7 }
{ addi r15, r16, 5 ; shru r5, r6, r7 ; ld r25, r26 }
{ addi r15, r16, 5 ; shufflebytes r5, r6, r7 }
{ addi r15, r16, 5 ; st r25, r26 ; revbits r5, r6 }
{ addi r15, r16, 5 ; st1 r25, r26 ; cmpne r5, r6, r7 }
{ addi r15, r16, 5 ; st1 r25, r26 ; subx r5, r6, r7 }
{ addi r15, r16, 5 ; st2 r25, r26 ; mulx r5, r6, r7 }
{ addi r15, r16, 5 ; st4 r25, r26 ; cmpeqi r5, r6, 5 }
{ addi r15, r16, 5 ; st4 r25, r26 ; shli r5, r6, 5 }
{ addi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l1 r25 }
{ addi r15, r16, 5 ; tblidxb1 r5, r6 ; prefetch_l1_fault r25 }
{ addi r15, r16, 5 ; tblidxb3 r5, r6 ; prefetch_l2_fault r25 }
{ addi r15, r16, 5 ; v1mulu r5, r6, r7 }
{ addi r15, r16, 5 ; v2packh r5, r6, r7 }
{ addi r15, r16, 5 ; xor r5, r6, r7 ; prefetch_l3_fault r25 }
{ addi r5, r6, 5 ; addi r15, r16, 5 ; st r25, r26 }
{ addi r5, r6, 5 ; addxi r15, r16, 5 ; st1 r25, r26 }
{ addi r5, r6, 5 ; andi r15, r16, 5 ; st1 r25, r26 }
{ addi r5, r6, 5 ; cmpeqi r15, r16, 5 ; st4 r25, r26 }
{ addi r5, r6, 5 ; cmpleu r15, r16, r17 ; st4 r25, r26 }
{ addi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld r25, r26 }
{ addi r5, r6, 5 ; dblalign4 r15, r16, r17 }
{ addi r5, r6, 5 ; ill ; ld2u r25, r26 }
{ addi r5, r6, 5 ; jalr r15 ; ld2s r25, r26 }
{ addi r5, r6, 5 ; jr r15 ; ld4s r25, r26 }
{ addi r5, r6, 5 ; ld r25, r26 ; cmpeq r15, r16, r17 }
{ addi r5, r6, 5 ; ld r25, r26 }
{ addi r5, r6, 5 ; ld1s r25, r26 ; shli r15, r16, 5 }
{ addi r5, r6, 5 ; ld1u r25, r26 ; rotl r15, r16, r17 }
{ addi r5, r6, 5 ; ld2s r25, r26 ; jrp r15 }
{ addi r5, r6, 5 ; ld2u r25, r26 ; cmpltsi r15, r16, 5 }
{ addi r5, r6, 5 ; ld4s r25, r26 ; addx r15, r16, r17 }
{ addi r5, r6, 5 ; ld4s r25, r26 ; shrui r15, r16, 5 }
{ addi r5, r6, 5 ; ld4u r25, r26 ; shl1addx r15, r16, r17 }
{ addi r5, r6, 5 ; lnk r15 ; prefetch_l1 r25 }
{ addi r5, r6, 5 ; move r15, r16 ; prefetch_l1 r25 }
{ addi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l1 r25 }
{ addi r5, r6, 5 ; nor r15, r16, r17 ; prefetch_l2 r25 }
{ addi r5, r6, 5 ; prefetch r25 ; cmplts r15, r16, r17 }
{ addi r5, r6, 5 ; prefetch_add_l2_fault r15, 5 }
{ addi r5, r6, 5 ; prefetch_l1 r25 ; shl3add r15, r16, r17 }
{ addi r5, r6, 5 ; prefetch_l1_fault r25 ; or r15, r16, r17 }
{ addi r5, r6, 5 ; prefetch_l2 r25 ; jrp r15 }
{ addi r5, r6, 5 ; prefetch_l2_fault r25 ; cmpltu r15, r16, r17 }
{ addi r5, r6, 5 ; prefetch_l3 r25 ; and r15, r16, r17 }
{ addi r5, r6, 5 ; prefetch_l3 r25 ; subx r15, r16, r17 }
{ addi r5, r6, 5 ; prefetch_l3_fault r25 ; shl3add r15, r16, r17 }
{ addi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l1_fault r25 }
{ addi r5, r6, 5 ; shl1add r15, r16, r17 ; prefetch_l2 r25 }
{ addi r5, r6, 5 ; shl2add r15, r16, r17 ; prefetch_l3 r25 }
{ addi r5, r6, 5 ; shl3add r15, r16, r17 ; st r25, r26 }
{ addi r5, r6, 5 ; shli r15, r16, 5 ; st2 r25, r26 }
{ addi r5, r6, 5 ; shrsi r15, r16, 5 ; st2 r25, r26 }
{ addi r5, r6, 5 ; shrui r15, r16, 5 }
{ addi r5, r6, 5 ; st r25, r26 ; shl3add r15, r16, r17 }
{ addi r5, r6, 5 ; st1 r25, r26 ; or r15, r16, r17 }
{ addi r5, r6, 5 ; st2 r25, r26 ; jr r15 }
{ addi r5, r6, 5 ; st4 r25, r26 ; cmplts r15, r16, r17 }
{ addi r5, r6, 5 ; stnt1 r15, r16 }
{ addi r5, r6, 5 ; subx r15, r16, r17 ; st r25, r26 }
{ addi r5, r6, 5 ; v2cmpleu r15, r16, r17 }
{ addi r5, r6, 5 ; xor r15, r16, r17 ; ld1u r25, r26 }
{ addli r15, r16, 0x1234 ; cmpltui r5, r6, 5 }
{ addli r15, r16, 0x1234 ; mul_hs_hu r5, r6, r7 }
{ addli r15, r16, 0x1234 ; shlx r5, r6, r7 }
{ addli r15, r16, 0x1234 ; v1int_h r5, r6, r7 }
{ addli r15, r16, 0x1234 ; v2maxsi r5, r6, 5 }
{ addli r5, r6, 0x1234 ; addx r15, r16, r17 }
{ addli r5, r6, 0x1234 ; iret }
{ addli r5, r6, 0x1234 ; movei r15, 5 }
{ addli r5, r6, 0x1234 ; shruxi r15, r16, 5 }
{ addli r5, r6, 0x1234 ; v1shl r15, r16, r17 }
{ addli r5, r6, 0x1234 ; v4add r15, r16, r17 }
{ addx r15, r16, r17 ; addi r5, r6, 5 ; prefetch r25 }
{ addx r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l1 r25 }
{ addx r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l1 r25 }
{ addx r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch r25 }
{ addx r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 }
{ addx r15, r16, r17 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 }
{ addx r15, r16, r17 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 }
{ addx r15, r16, r17 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
{ addx r15, r16, r17 ; ctz r5, r6 ; prefetch r25 }
{ addx r15, r16, r17 ; fnop ; st2 r25, r26 }
{ addx r15, r16, r17 ; info 19 ; prefetch_l3 r25 }
{ addx r15, r16, r17 ; ld r25, r26 ; mulax r5, r6, r7 }
{ addx r15, r16, r17 ; ld1s r25, r26 ; cmpeq r5, r6, r7 }
{ addx r15, r16, r17 ; ld1s r25, r26 ; shl3addx r5, r6, r7 }
{ addx r15, r16, r17 ; ld1u r25, r26 ; mul_ls_ls r5, r6, r7 }
{ addx r15, r16, r17 ; ld2s r25, r26 ; addxi r5, r6, 5 }
{ addx r15, r16, r17 ; ld2s r25, r26 ; shl r5, r6, r7 }
{ addx r15, r16, r17 ; ld2u r25, r26 ; info 19 }
{ addx r15, r16, r17 ; ld2u r25, r26 ; tblidxb3 r5, r6 }
{ addx r15, r16, r17 ; ld4s r25, r26 ; or r5, r6, r7 }
{ addx r15, r16, r17 ; ld4u r25, r26 ; cmpltsi r5, r6, 5 }
{ addx r15, r16, r17 ; ld4u r25, r26 ; shrui r5, r6, 5 }
{ addx r15, r16, r17 ; move r5, r6 ; prefetch_l2_fault r25 }
{ addx r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; prefetch_l3 r25 }
{ addx r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 }
{ addx r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
{ addx r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch r25 }
{ addx r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l1 r25 }
{ addx r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l2 r25 }
{ addx r15, r16, r17 ; nor r5, r6, r7 ; prefetch_l3 r25 }
{ addx r15, r16, r17 ; pcnt r5, r6 ; prefetch_l3_fault r25 }
{ addx r15, r16, r17 ; prefetch r25 ; mz r5, r6, r7 }
{ addx r15, r16, r17 ; prefetch_l1 r25 ; cmples r5, r6, r7 }
{ addx r15, r16, r17 ; prefetch_l1 r25 ; shrs r5, r6, r7 }
{ addx r15, r16, r17 ; prefetch_l1_fault r25 ; mula_hs_hs r5, r6, r7 }
{ addx r15, r16, r17 ; prefetch_l2 r25 ; andi r5, r6, 5 }
{ addx r15, r16, r17 ; prefetch_l2 r25 ; shl1addx r5, r6, r7 }
{ addx r15, r16, r17 ; prefetch_l2_fault r25 ; move r5, r6 }
{ addx r15, r16, r17 ; prefetch_l2_fault r25 }
{ addx r15, r16, r17 ; prefetch_l3 r25 ; revbits r5, r6 }
{ addx r15, r16, r17 ; prefetch_l3_fault r25 ; cmpne r5, r6, r7 }
{ addx r15, r16, r17 ; prefetch_l3_fault r25 ; subx r5, r6, r7 }
{ addx r15, r16, r17 ; revbytes r5, r6 ; st r25, r26 }
{ addx r15, r16, r17 ; rotli r5, r6, 5 ; st2 r25, r26 }
{ addx r15, r16, r17 ; shl1add r5, r6, r7 ; st4 r25, r26 }
{ addx r15, r16, r17 ; shl2addx r5, r6, r7 ; ld r25, r26 }
{ addx r15, r16, r17 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
{ addx r15, r16, r17 ; shrs r5, r6, r7 ; ld1u r25, r26 }
{ addx r15, r16, r17 ; shru r5, r6, r7 ; ld2u r25, r26 }
{ addx r15, r16, r17 ; st r25, r26 ; addxi r5, r6, 5 }
{ addx r15, r16, r17 ; st r25, r26 ; shl r5, r6, r7 }
{ addx r15, r16, r17 ; st1 r25, r26 ; info 19 }
{ addx r15, r16, r17 ; st1 r25, r26 ; tblidxb3 r5, r6 }
{ addx r15, r16, r17 ; st2 r25, r26 ; or r5, r6, r7 }
{ addx r15, r16, r17 ; st4 r25, r26 ; cmpltsi r5, r6, 5 }
{ addx r15, r16, r17 ; st4 r25, r26 ; shrui r5, r6, 5 }
{ addx r15, r16, r17 ; subx r5, r6, r7 ; prefetch_l3 r25 }
{ addx r15, r16, r17 ; tblidxb1 r5, r6 ; prefetch_l3_fault r25 }
{ addx r15, r16, r17 ; tblidxb3 r5, r6 ; st1 r25, r26 }
{ addx r15, r16, r17 ; v1sadu r5, r6, r7 }
{ addx r15, r16, r17 ; v2sadau r5, r6, r7 }
{ addx r15, r16, r17 ; xor r5, r6, r7 ; st4 r25, r26 }
{ addx r5, r6, r7 ; addi r15, r16, 5 }
{ addx r5, r6, r7 ; addxli r15, r16, 0x1234 }
{ addx r5, r6, r7 ; cmpeq r15, r16, r17 ; ld r25, r26 }
{ addx r5, r6, r7 ; cmples r15, r16, r17 ; ld r25, r26 }
{ addx r5, r6, r7 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
{ addx r5, r6, r7 ; cmpltu r15, r16, r17 ; ld2u r25, r26 }
{ addx r5, r6, r7 ; exch4 r15, r16, r17 }
{ addx r5, r6, r7 ; ill ; prefetch_l1 r25 }
{ addx r5, r6, r7 ; jalr r15 ; prefetch r25 }
{ addx r5, r6, r7 ; jr r15 ; prefetch_l1_fault r25 }
{ addx r5, r6, r7 ; ld r25, r26 ; cmplts r15, r16, r17 }
{ addx r5, r6, r7 ; ld1s r25, r26 ; addx r15, r16, r17 }
{ addx r5, r6, r7 ; ld1s r25, r26 ; shrui r15, r16, 5 }
{ addx r5, r6, r7 ; ld1u r25, r26 ; shl1addx r15, r16, r17 }
{ addx r5, r6, r7 ; ld2s r25, r26 ; movei r15, 5 }
{ addx r5, r6, r7 ; ld2u r25, r26 ; ill }
{ addx r5, r6, r7 ; ld4s r25, r26 ; cmpeq r15, r16, r17 }
{ addx r5, r6, r7 ; ld4s r25, r26 }
{ addx r5, r6, r7 ; ld4u r25, r26 ; shl3addx r15, r16, r17 }
{ addx r5, r6, r7 ; lnk r15 ; prefetch_l3 r25 }
{ addx r5, r6, r7 ; move r15, r16 ; prefetch_l3 r25 }
{ addx r5, r6, r7 ; mz r15, r16, r17 ; prefetch_l3 r25 }
{ addx r5, r6, r7 ; nor r15, r16, r17 ; st r25, r26 }
{ addx r5, r6, r7 ; prefetch r25 ; fnop }
{ addx r5, r6, r7 ; prefetch_l1 r25 ; add r15, r16, r17 }
{ addx r5, r6, r7 ; prefetch_l1 r25 ; shrsi r15, r16, 5 }
{ addx r5, r6, r7 ; prefetch_l1_fault r25 ; shl1add r15, r16, r17 }
{ addx r5, r6, r7 ; prefetch_l2 r25 ; movei r15, 5 }
{ addx r5, r6, r7 ; prefetch_l2_fault r25 ; info 19 }
{ addx r5, r6, r7 ; prefetch_l3 r25 ; cmples r15, r16, r17 }
{ addx r5, r6, r7 ; prefetch_l3_fault r25 ; add r15, r16, r17 }
{ addx r5, r6, r7 ; prefetch_l3_fault r25 ; shrsi r15, r16, 5 }
{ addx r5, r6, r7 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
{ addx r5, r6, r7 ; shl1add r15, r16, r17 ; st r25, r26 }
{ addx r5, r6, r7 ; shl2add r15, r16, r17 ; st2 r25, r26 }
{ addx r5, r6, r7 ; shl3add r15, r16, r17 }
{ addx r5, r6, r7 ; shlxi r15, r16, 5 }
{ addx r5, r6, r7 ; shru r15, r16, r17 ; ld1s r25, r26 }
{ addx r5, r6, r7 ; st r25, r26 ; add r15, r16, r17 }
{ addx r5, r6, r7 ; st r25, r26 ; shrsi r15, r16, 5 }
{ addx r5, r6, r7 ; st1 r25, r26 ; shl1add r15, r16, r17 }
{ addx r5, r6, r7 ; st2 r25, r26 ; move r15, r16 }
{ addx r5, r6, r7 ; st4 r25, r26 ; fnop }
{ addx r5, r6, r7 ; stnt4 r15, r16 }
{ addx r5, r6, r7 ; subx r15, r16, r17 }
{ addx r5, r6, r7 ; v2cmpltui r15, r16, 5 }
{ addx r5, r6, r7 ; xor r15, r16, r17 ; ld4u r25, r26 }
{ addxi r15, r16, 5 ; addi r5, r6, 5 ; prefetch r25 }
{ addxi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l1 r25 }
{ addxi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l1 r25 }
{ addxi r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch r25 }
{ addxi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l1_fault r25 }
{ addxi r15, r16, 5 ; cmples r5, r6, r7 ; prefetch_l2_fault r25 }
{ addxi r15, r16, 5 ; cmplts r5, r6, r7 ; prefetch_l3_fault r25 }
{ addxi r15, r16, 5 ; cmpltu r5, r6, r7 ; st1 r25, r26 }
{ addxi r15, r16, 5 ; ctz r5, r6 ; prefetch r25 }
{ addxi r15, r16, 5 ; fnop ; st2 r25, r26 }
{ addxi r15, r16, 5 ; info 19 ; prefetch_l3 r25 }
{ addxi r15, r16, 5 ; ld r25, r26 ; mulax r5, r6, r7 }
{ addxi r15, r16, 5 ; ld1s r25, r26 ; cmpeq r5, r6, r7 }
{ addxi r15, r16, 5 ; ld1s r25, r26 ; shl3addx r5, r6, r7 }
{ addxi r15, r16, 5 ; ld1u r25, r26 ; mul_ls_ls r5, r6, r7 }
{ addxi r15, r16, 5 ; ld2s r25, r26 ; addxi r5, r6, 5 }
{ addxi r15, r16, 5 ; ld2s r25, r26 ; shl r5, r6, r7 }
{ addxi r15, r16, 5 ; ld2u r25, r26 ; info 19 }
{ addxi r15, r16, 5 ; ld2u r25, r26 ; tblidxb3 r5, r6 }
{ addxi r15, r16, 5 ; ld4s r25, r26 ; or r5, r6, r7 }
{ addxi r15, r16, 5 ; ld4u r25, r26 ; cmpltsi r5, r6, 5 }
{ addxi r15, r16, 5 ; ld4u r25, r26 ; shrui r5, r6, 5 }
{ addxi r15, r16, 5 ; move r5, r6 ; prefetch_l2_fault r25 }
{ addxi r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; prefetch_l3 r25 }
{ addxi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; prefetch_l1_fault r25 }
{ addxi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; prefetch_l2 r25 }
{ addxi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch r25 }
{ addxi r15, r16, 5 ; mulax r5, r6, r7 ; prefetch_l1 r25 }
{ addxi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l2 r25 }
{ addxi r15, r16, 5 ; nor r5, r6, r7 ; prefetch_l3 r25 }
{ addxi r15, r16, 5 ; pcnt r5, r6 ; prefetch_l3_fault r25 }
{ addxi r15, r16, 5 ; prefetch r25 ; mz r5, r6, r7 }
{ addxi r15, r16, 5 ; prefetch_l1 r25 ; cmples r5, r6, r7 }
{ addxi r15, r16, 5 ; prefetch_l1 r25 ; shrs r5, r6, r7 }
{ addxi r15, r16, 5 ; prefetch_l1_fault r25 ; mula_hs_hs r5, r6, r7 }
{ addxi r15, r16, 5 ; prefetch_l2 r25 ; andi r5, r6, 5 }
{ addxi r15, r16, 5 ; prefetch_l2 r25 ; shl1addx r5, r6, r7 }
{ addxi r15, r16, 5 ; prefetch_l2_fault r25 ; move r5, r6 }
{ addxi r15, r16, 5 ; prefetch_l2_fault r25 }
{ addxi r15, r16, 5 ; prefetch_l3 r25 ; revbits r5, r6 }
{ addxi r15, r16, 5 ; prefetch_l3_fault r25 ; cmpne r5, r6, r7 }
{ addxi r15, r16, 5 ; prefetch_l3_fault r25 ; subx r5, r6, r7 }
{ addxi r15, r16, 5 ; revbytes r5, r6 ; st r25, r26 }
{ addxi r15, r16, 5 ; rotli r5, r6, 5 ; st2 r25, r26 }
{ addxi r15, r16, 5 ; shl1add r5, r6, r7 ; st4 r25, r26 }
{ addxi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld r25, r26 }
{ addxi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld1u r25, r26 }
{ addxi r15, r16, 5 ; shrs r5, r6, r7 ; ld1u r25, r26 }
{ addxi r15, r16, 5 ; shru r5, r6, r7 ; ld2u r25, r26 }
{ addxi r15, r16, 5 ; st r25, r26 ; addxi r5, r6, 5 }
{ addxi r15, r16, 5 ; st r25, r26 ; shl r5, r6, r7 }
{ addxi r15, r16, 5 ; st1 r25, r26 ; info 19 }
{ addxi r15, r16, 5 ; st1 r25, r26 ; tblidxb3 r5, r6 }
{ addxi r15, r16, 5 ; st2 r25, r26 ; or r5, r6, r7 }
{ addxi r15, r16, 5 ; st4 r25, r26 ; cmpltsi r5, r6, 5 }
{ addxi r15, r16, 5 ; st4 r25, r26 ; shrui r5, r6, 5 }
{ addxi r15, r16, 5 ; subx r5, r6, r7 ; prefetch_l3 r25 }
{ addxi r15, r16, 5 ; tblidxb1 r5, r6 ; prefetch_l3_fault r25 }
{ addxi r15, r16, 5 ; tblidxb3 r5, r6 ; st1 r25, r26 }
{ addxi r15, r16, 5 ; v1sadu r5, r6, r7 }
{ addxi r15, r16, 5 ; v2sadau r5, r6, r7 }
{ addxi r15, r16, 5 ; xor r5, r6, r7 ; st4 r25, r26 }
{ addxi r5, r6, 5 ; addi r15, r16, 5 }
{ addxi r5, r6, 5 ; addxli r15, r16, 0x1234 }
{ addxi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld r25, r26 }
{ addxi r5, r6, 5 ; cmples r15, r16, r17 ; ld r25, r26 }
{ addxi r5, r6, 5 ; cmplts r15, r16, r17 ; ld1u r25, r26 }
{ addxi r5, r6, 5 ; cmpltu r15, r16, r17 ; ld2u r25, r26 }
{ addxi r5, r6, 5 ; exch4 r15, r16, r17 }
{ addxi r5, r6, 5 ; ill ; prefetch_l1 r25 }
{ addxi r5, r6, 5 ; jalr r15 ; prefetch r25 }
{ addxi r5, r6, 5 ; jr r15 ; prefetch_l1_fault r25 }
{ addxi r5, r6, 5 ; ld r25, r26 ; cmplts r15, r16, r17 }
{ addxi r5, r6, 5 ; ld1s r25, r26 ; addx r15, r16, r17 }
{ addxi r5, r6, 5 ; ld1s r25, r26 ; shrui r15, r16, 5 }
{ addxi r5, r6, 5 ; ld1u r25, r26 ; shl1addx r15, r16, r17 }
{ addxi r5, r6, 5 ; ld2s r25, r26 ; movei r15, 5 }
{ addxi r5, r6, 5 ; ld2u r25, r26 ; ill }
{ addxi r5, r6, 5 ; ld4s r25, r26 ; cmpeq r15, r16, r17 }
{ addxi r5, r6, 5 ; ld4s r25, r26 }
{ addxi r5, r6, 5 ; ld4u r25, r26 ; shl3addx r15, r16, r17 }
{ addxi r5, r6, 5 ; lnk r15 ; prefetch_l3 r25 }
{ addxi r5, r6, 5 ; move r15, r16 ; prefetch_l3 r25 }
{ addxi r5, r6, 5 ; mz r15, r16, r17 ; prefetch_l3 r25 }
{ addxi r5, r6, 5 ; nor r15, r16, r17 ; st r25, r26 }
{ addxi r5, r6, 5 ; prefetch r25 ; fnop }
{ addxi r5, r6, 5 ; prefetch_l1 r25 ; add r15, r16, r17 }
{ addxi r5, r6, 5 ; prefetch_l1 r25 ; shrsi r15, r16, 5 }
{ addxi r5, r6, 5 ; prefetch_l1_fault r25 ; shl1add r15, r16, r17 }
{ addxi r5, r6, 5 ; prefetch_l2 r25 ; movei r15, 5 }
{ addxi r5, r6, 5 ; prefetch_l2_fault r25 ; info 19 }
{ addxi r5, r6, 5 ; prefetch_l3 r25 ; cmples r15, r16, r17 }
{ addxi r5, r6, 5 ; prefetch_l3_fault r25 ; add r15, r16, r17 }
{ addxi r5, r6, 5 ; prefetch_l3_fault r25 ; shrsi r15, r16, 5 }
{ addxi r5, r6, 5 ; rotli r15, r16, 5 ; prefetch_l3_fault r25 }
{ addxi r5, r6, 5 ; shl1add r15, r16, r17 ; st r25, r26 }
{ addxi r5, r6, 5 ; shl2add r15, r16, r17 ; st2 r25, r26 }
{ addxi r5, r6, 5 ; shl3add r15, r16, r17 }
{ addxi r5, r6, 5 ; shlxi r15, r16, 5 }
{ addxi r5, r6, 5 ; shru r15, r16, r17 ; ld1s r25, r26 }
{ addxi r5, r6, 5 ; st r25, r26 ; add r15, r16, r17 }
{ addxi r5, r6, 5 ; st r25, r26 ; shrsi r15, r16, 5 }
{ addxi r5, r6, 5 ; st1 r25, r26 ; shl1add r15, r16, r17 }
{ addxi r5, r6, 5 ; st2 r25, r26 ; move r15, r16 }
{ addxi r5, r6, 5 ; st4 r25, r26 ; fnop }
{ addxi r5, r6, 5 ; stnt4 r15, r16 }
{ addxi r5, r6, 5 ; subx r15, r16, r17 }
{ addxi r5, r6, 5 ; v2cmpltui r15, r16, 5 }
{ addxi r5, r6, 5 ; xor r15, r16, r17 ; ld4u r25, r26 }
{ addxli r15, r16, 0x1234 ; cmulaf r5, r6, r7 }
{ addxli r15, r16, 0x1234 ; mul_hu_ls r5, r6, r7 }
{ addxli r15, r16, 0x1234 ; shru r5, r6, r7 }
{ addxli r15, r16, 0x1234 ; v1minu r5, r6, r7 }
{ addxli r15, r16, 0x1234 ; v2mulfsc r5, r6, r7 }
{ addxli r5, r6, 0x1234 ; and r15, r16, r17 }
{ addxli r5, r6, 0x1234 ; jrp r15 }
{ addxli r5, r6, 0x1234 ; nop }
{ addxli r5, r6, 0x1234 ; st2 r15, r16 }
{ addxli r5, r6, 0x1234 ; v1shru r15, r16, r17 }
{ addxli r5, r6, 0x1234 ; v4packsc r15, r16, r17 }
{ addxsc r15, r16, r17 ; cmulhr r5, r6, r7 }
{ addxsc r15, r16, r17 ; mul_lu_lu r5, r6, r7 }
{ addxsc r15, r16, r17 ; shufflebytes r5, r6, r7 }
{ addxsc r15, r16, r17 ; v1mulu r5, r6, r7 }
{ addxsc r15, r16, r17 ; v2packh r5, r6, r7 }
{ addxsc r5, r6, r7 ; cmpexch r15, r16, r17 }
{ addxsc r5, r6, r7 ; ld1u r15, r16 }
{ addxsc r5, r6, r7 ; prefetch r15 }
{ addxsc r5, r6, r7 ; st_add r15, r16, 5 }
{ addxsc r5, r6, r7 ; v2add r15, r16, r17 }
{ addxsc r5, r6, r7 ; v4shru r15, r16, r17 }
{ and r15, r16, r17 ; addi r5, r6, 5 ; st1 r25, r26 }
{ and r15, r16, r17 ; addxi r5, r6, 5 ; st2 r25, r26 }
{ and r15, r16, r17 ; andi r5, r6, 5 ; st2 r25, r26 }
{ and r15, r16, r17 ; cmoveqz r5, r6, r7 ; st1 r25, r26 }
{ and r15, r16, r17 ; cmpeq r5, r6, r7 ; st4 r25, r26 }
{ and r15, r16, r17 ; cmpleu r5, r6, r7 ; ld r25, r26 }
{ and r15, r16, r17 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 }
{ and r15, r16, r17 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
{ and r15, r16, r17 ; ctz r5, r6 ; st1 r25, r26 }
{ and r15, r16, r17 ; fsingle_pack1 r5, r6 ; ld1s r25, r26 }
{ and r15, r16, r17 ; ld r25, r26 ; add r5, r6, r7 }
{ and r15, r16, r17 ; ld r25, r26 ; revbytes r5, r6 }
{ and r15, r16, r17 ; ld1s r25, r26 ; ctz r5, r6 }
{ and r15, r16, r17 ; ld1s r25, r26 ; tblidxb0 r5, r6 }
{ and r15, r16, r17 ; ld1u r25, r26 ; mz r5, r6, r7 }
{ and r15, r16, r17 ; ld2s r25, r26 ; cmples r5, r6, r7 }
{ and r15, r16, r17 ; ld2s r25, r26 ; shrs r5, r6, r7 }
{ and r15, r16, r17 ; ld2u r25, r26 ; mula_hs_hs r5, r6, r7 }
{ and r15, r16, r17 ; ld4s r25, r26 ; andi r5, r6, 5 }
{ and r15, r16, r17 ; ld4s r25, r26 ; shl1addx r5, r6, r7 }
{ and r15, r16, r17 ; ld4u r25, r26 ; move r5, r6 }
{ and r15, r16, r17 ; ld4u r25, r26 }
{ and r15, r16, r17 ; movei r5, 5 ; ld r25, r26 }
{ and r15, r16, r17 ; mul_hs_ls r5, r6, r7 }
{ and r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st4 r25, r26 }
{ and r15, r16, r17 ; mula_hs_hs r5, r6, r7 }
{ and r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; st1 r25, r26 }
{ and r15, r16, r17 ; mulax r5, r6, r7 ; st2 r25, r26 }
{ and r15, r16, r17 ; mz r5, r6, r7 }
{ and r15, r16, r17 ; or r5, r6, r7 ; ld1s r25, r26 }
{ and r15, r16, r17 ; prefetch r25 ; addx r5, r6, r7 }
{ and r15, r16, r17 ; prefetch r25 ; rotli r5, r6, 5 }
{ and r15, r16, r17 ; prefetch_l1 r25 ; fsingle_pack1 r5, r6 }
{ and r15, r16, r17 ; prefetch_l1 r25 ; tblidxb2 r5, r6 }
{ and r15, r16, r17 ; prefetch_l1_fault r25 ; nor r5, r6, r7 }
{ and r15, r16, r17 ; prefetch_l2 r25 ; cmplts r5, r6, r7 }
{ and r15, r16, r17 ; prefetch_l2 r25 ; shru r5, r6, r7 }
{ and r15, r16, r17 ; prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 }
{ and r15, r16, r17 ; prefetch_l3 r25 ; cmoveqz r5, r6, r7 }
{ and r15, r16, r17 ; prefetch_l3 r25 ; shl2addx r5, r6, r7 }
{ and r15, r16, r17 ; prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 }
{ and r15, r16, r17 ; revbits r5, r6 ; ld1s r25, r26 }
{ and r15, r16, r17 ; rotl r5, r6, r7 ; ld2s r25, r26 }
{ and r15, r16, r17 ; shl r5, r6, r7 ; ld4s r25, r26 }
{ and r15, r16, r17 ; shl1addx r5, r6, r7 ; ld4u r25, r26 }
{ and r15, r16, r17 ; shl2addx r5, r6, r7 ; prefetch_l1 r25 }
{ and r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 }
{ and r15, r16, r17 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
{ and r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l3 r25 }
{ and r15, r16, r17 ; st r25, r26 ; cmples r5, r6, r7 }
{ and r15, r16, r17 ; st r25, r26 ; shrs r5, r6, r7 }
{ and r15, r16, r17 ; st1 r25, r26 ; mula_hs_hs r5, r6, r7 }
{ and r15, r16, r17 ; st2 r25, r26 ; andi r5, r6, 5 }
{ and r15, r16, r17 ; st2 r25, r26 ; shl1addx r5, r6, r7 }
{ and r15, r16, r17 ; st4 r25, r26 ; move r5, r6 }
{ and r15, r16, r17 ; st4 r25, r26 }
{ and r15, r16, r17 ; tblidxb0 r5, r6 ; ld r25, r26 }
{ and r15, r16, r17 ; tblidxb2 r5, r6 ; ld1u r25, r26 }
{ and r15, r16, r17 ; v1avgu r5, r6, r7 }
{ and r15, r16, r17 ; v1subuc r5, r6, r7 }
{ and r15, r16, r17 ; v2shru r5, r6, r7 }
{ and r5, r6, r7 ; add r15, r16, r17 ; ld4s r25, r26 }
{ and r5, r6, r7 ; addx r15, r16, r17 ; ld4u r25, r26 }
{ and r5, r6, r7 ; and r15, r16, r17 ; ld4u r25, r26 }
{ and r5, r6, r7 ; cmpeq r15, r16, r17 ; prefetch_l1 r25 }
{ and r5, r6, r7 ; cmples r15, r16, r17 ; prefetch_l1 r25 }
{ and r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
{ and r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
{ and r5, r6, r7 ; fetchor4 r15, r16, r17 }
{ and r5, r6, r7 ; ill ; st2 r25, r26 }
{ and r5, r6, r7 ; jalr r15 ; st1 r25, r26 }
{ and r5, r6, r7 ; jr r15 ; st4 r25, r26 }
{ and r5, r6, r7 ; ld r25, r26 ; jalrp r15 }
{ and r5, r6, r7 ; ld1s r25, r26 ; cmplts r15, r16, r17 }
{ and r5, r6, r7 ; ld1u r25, r26 ; addi r15, r16, 5 }
{ and r5, r6, r7 ; ld1u r25, r26 ; shru r15, r16, r17 }
{ and r5, r6, r7 ; ld2s r25, r26 ; shl1add r15, r16, r17 }
{ and r5, r6, r7 ; ld2u r25, r26 ; move r15, r16 }
{ and r5, r6, r7 ; ld4s r25, r26 ; fnop }
{ and r5, r6, r7 ; ld4u r25, r26 ; andi r15, r16, 5 }
{ and r5, r6, r7 ; ld4u r25, r26 ; xor r15, r16, r17 }
{ and r5, r6, r7 ; mfspr r16, 0x5 }
{ and r5, r6, r7 ; movei r15, 5 ; ld1s r25, r26 }
{ and r5, r6, r7 ; nop ; ld1s r25, r26 }
{ and r5, r6, r7 ; or r15, r16, r17 ; ld2s r25, r26 }
{ and r5, r6, r7 ; prefetch r25 ; mnz r15, r16, r17 }
{ and r5, r6, r7 ; prefetch_l1 r25 ; cmples r15, r16, r17 }
{ and r5, r6, r7 ; prefetch_l1_fault r25 ; add r15, r16, r17 }
{ and r5, r6, r7 ; prefetch_l1_fault r25 ; shrsi r15, r16, 5 }
{ and r5, r6, r7 ; prefetch_l2 r25 ; shl1add r15, r16, r17 }
{ and r5, r6, r7 ; prefetch_l2_fault r25 ; movei r15, 5 }
{ and r5, r6, r7 ; prefetch_l3 r25 ; info 19 }
{ and r5, r6, r7 ; prefetch_l3_fault r25 ; cmples r15, r16, r17 }
{ and r5, r6, r7 ; rotl r15, r16, r17 ; ld r25, r26 }
{ and r5, r6, r7 ; shl r15, r16, r17 ; ld1u r25, r26 }
{ and r5, r6, r7 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
{ and r5, r6, r7 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
{ and r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch r25 }
{ and r5, r6, r7 ; shrs r15, r16, r17 ; prefetch r25 }
{ and r5, r6, r7 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
{ and r5, r6, r7 ; st r25, r26 ; cmples r15, r16, r17 }
{ and r5, r6, r7 ; st1 r25, r26 ; add r15, r16, r17 }
{ and r5, r6, r7 ; st1 r25, r26 ; shrsi r15, r16, 5 }
{ and r5, r6, r7 ; st2 r25, r26 ; shl r15, r16, r17 }
{ and r5, r6, r7 ; st4 r25, r26 ; mnz r15, r16, r17 }
{ and r5, r6, r7 ; sub r15, r16, r17 ; ld4s r25, r26 }
{ and r5, r6, r7 ; v1cmpleu r15, r16, r17 }
{ and r5, r6, r7 ; v2mnz r15, r16, r17 }
{ and r5, r6, r7 ; xor r15, r16, r17 ; st r25, r26 }
{ andi r15, r16, 5 ; addi r5, r6, 5 ; st1 r25, r26 }
{ andi r15, r16, 5 ; addxi r5, r6, 5 ; st2 r25, r26 }
{ andi r15, r16, 5 ; andi r5, r6, 5 ; st2 r25, r26 }
{ andi r15, r16, 5 ; cmoveqz r5, r6, r7 ; st1 r25, r26 }
{ andi r15, r16, 5 ; cmpeq r5, r6, r7 ; st4 r25, r26 }
{ andi r15, r16, 5 ; cmpleu r5, r6, r7 ; ld r25, r26 }
{ andi r15, r16, 5 ; cmpltsi r5, r6, 5 ; ld1u r25, r26 }
{ andi r15, r16, 5 ; cmpne r5, r6, r7 ; ld2s r25, r26 }
{ andi r15, r16, 5 ; ctz r5, r6 ; st1 r25, r26 }
{ andi r15, r16, 5 ; fsingle_pack1 r5, r6 ; ld1s r25, r26 }
{ andi r15, r16, 5 ; ld r25, r26 ; add r5, r6, r7 }
{ andi r15, r16, 5 ; ld r25, r26 ; revbytes r5, r6 }
{ andi r15, r16, 5 ; ld1s r25, r26 ; ctz r5, r6 }
{ andi r15, r16, 5 ; ld1s r25, r26 ; tblidxb0 r5, r6 }
{ andi r15, r16, 5 ; ld1u r25, r26 ; mz r5, r6, r7 }
{ andi r15, r16, 5 ; ld2s r25, r26 ; cmples r5, r6, r7 }
{ andi r15, r16, 5 ; ld2s r25, r26 ; shrs r5, r6, r7 }
{ andi r15, r16, 5 ; ld2u r25, r26 ; mula_hs_hs r5, r6, r7 }
{ andi r15, r16, 5 ; ld4s r25, r26 ; andi r5, r6, 5 }
{ andi r15, r16, 5 ; ld4s r25, r26 ; shl1addx r5, r6, r7 }
{ andi r15, r16, 5 ; ld4u r25, r26 ; move r5, r6 }
{ andi r15, r16, 5 ; ld4u r25, r26 }
{ andi r15, r16, 5 ; movei r5, 5 ; ld r25, r26 }
{ andi r15, r16, 5 ; mul_hs_ls r5, r6, r7 }
{ andi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; st4 r25, r26 }
{ andi r15, r16, 5 ; mula_hs_hs r5, r6, r7 }
{ andi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; st1 r25, r26 }
{ andi r15, r16, 5 ; mulax r5, r6, r7 ; st2 r25, r26 }
{ andi r15, r16, 5 ; mz r5, r6, r7 }
{ andi r15, r16, 5 ; or r5, r6, r7 ; ld1s r25, r26 }
{ andi r15, r16, 5 ; prefetch r25 ; addx r5, r6, r7 }
{ andi r15, r16, 5 ; prefetch r25 ; rotli r5, r6, 5 }
{ andi r15, r16, 5 ; prefetch_l1 r25 ; fsingle_pack1 r5, r6 }
{ andi r15, r16, 5 ; prefetch_l1 r25 ; tblidxb2 r5, r6 }
{ andi r15, r16, 5 ; prefetch_l1_fault r25 ; nor r5, r6, r7 }
{ andi r15, r16, 5 ; prefetch_l2 r25 ; cmplts r5, r6, r7 }
{ andi r15, r16, 5 ; prefetch_l2 r25 ; shru r5, r6, r7 }
{ andi r15, r16, 5 ; prefetch_l2_fault r25 ; mula_ls_ls r5, r6, r7 }
{ andi r15, r16, 5 ; prefetch_l3 r25 ; cmoveqz r5, r6, r7 }
{ andi r15, r16, 5 ; prefetch_l3 r25 ; shl2addx r5, r6, r7 }
{ andi r15, r16, 5 ; prefetch_l3_fault r25 ; mul_hs_hs r5, r6, r7 }
{ andi r15, r16, 5 ; revbits r5, r6 ; ld1s r25, r26 }
{ andi r15, r16, 5 ; rotl r5, r6, r7 ; ld2s r25, r26 }
{ andi r15, r16, 5 ; shl r5, r6, r7 ; ld4s r25, r26 }
{ andi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld4u r25, r26 }
{ andi r15, r16, 5 ; shl2addx r5, r6, r7 ; prefetch_l1 r25 }
{ andi r15, r16, 5 ; shl3addx r5, r6, r7 ; prefetch_l2 r25 }
{ andi r15, r16, 5 ; shrs r5, r6, r7 ; prefetch_l2 r25 }
{ andi r15, r16, 5 ; shru r5, r6, r7 ; prefetch_l3 r25 }
{ andi r15, r16, 5 ; st r25, r26 ; cmples r5, r6, r7 }
{ andi r15, r16, 5 ; st r25, r26 ; shrs r5, r6, r7 }
{ andi r15, r16, 5 ; st1 r25, r26 ; mula_hs_hs r5, r6, r7 }
{ andi r15, r16, 5 ; st2 r25, r26 ; andi r5, r6, 5 }
{ andi r15, r16, 5 ; st2 r25, r26 ; shl1addx r5, r6, r7 }
{ andi r15, r16, 5 ; st4 r25, r26 ; move r5, r6 }
{ andi r15, r16, 5 ; st4 r25, r26 }
{ andi r15, r16, 5 ; tblidxb0 r5, r6 ; ld r25, r26 }
{ andi r15, r16, 5 ; tblidxb2 r5, r6 ; ld1u r25, r26 }
{ andi r15, r16, 5 ; v1avgu r5, r6, r7 }
{ andi r15, r16, 5 ; v1subuc r5, r6, r7 }
{ andi r15, r16, 5 ; v2shru r5, r6, r7 }
{ andi r5, r6, 5 ; add r15, r16, r17 ; ld4s r25, r26 }
{ andi r5, r6, 5 ; addx r15, r16, r17 ; ld4u r25, r26 }
{ andi r5, r6, 5 ; and r15, r16, r17 ; ld4u r25, r26 }
{ andi r5, r6, 5 ; cmpeq r15, r16, r17 ; prefetch_l1 r25 }
{ andi r5, r6, 5 ; cmples r15, r16, r17 ; prefetch_l1 r25 }
{ andi r5, r6, 5 ; cmplts r15, r16, r17 ; prefetch_l2 r25 }
{ andi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch_l3 r25 }
{ andi r5, r6, 5 ; fetchor4 r15, r16, r17 }
{ andi r5, r6, 5 ; ill ; st2 r25, r26 }
{ andi r5, r6, 5 ; jalr r15 ; st1 r25, r26 }
{ andi r5, r6, 5 ; jr r15 ; st4 r25, r26 }
{ andi r5, r6, 5 ; ld r25, r26 ; jalrp r15 }
{ andi r5, r6, 5 ; ld1s r25, r26 ; cmplts r15, r16, r17 }
{ andi r5, r6, 5 ; ld1u r25, r26 ; addi r15, r16, 5 }
{ andi r5, r6, 5 ; ld1u r25, r26 ; shru r15, r16, r17 }
{ andi r5, r6, 5 ; ld2s r25, r26 ; shl1add r15, r16, r17 }
{ andi r5, r6, 5 ; ld2u r25, r26 ; move r15, r16 }
{ andi r5, r6, 5 ; ld4s r25, r26 ; fnop }
{ andi r5, r6, 5 ; ld4u r25, r26 ; andi r15, r16, 5 }
{ andi r5, r6, 5 ; ld4u r25, r26 ; xor r15, r16, r17 }
{ andi r5, r6, 5 ; mfspr r16, 0x5 }
{ andi r5, r6, 5 ; movei r15, 5 ; ld1s r25, r26 }
{ andi r5, r6, 5 ; nop ; ld1s r25, r26 }
{ andi r5, r6, 5 ; or r15, r16, r17 ; ld2s r25, r26 }
{ andi r5, r6, 5 ; prefetch r25 ; mnz r15, r16, r17 }
{ andi r5, r6, 5 ; prefetch_l1 r25 ; cmples r15, r16, r17 }
{ andi r5, r6, 5 ; prefetch_l1_fault r25 ; add r15, r16, r17 }
{ andi r5, r6, 5 ; prefetch_l1_fault r25 ; shrsi r15, r16, 5 }
{ andi r5, r6, 5 ; prefetch_l2 r25 ; shl1add r15, r16, r17 }
{ andi r5, r6, 5 ; prefetch_l2_fault r25 ; movei r15, 5 }
{ andi r5, r6, 5 ; prefetch_l3 r25 ; info 19 }
{ andi r5, r6, 5 ; prefetch_l3_fault r25 ; cmples r15, r16, r17 }
{ andi r5, r6, 5 ; rotl r15, r16, r17 ; ld r25, r26 }
{ andi r5, r6, 5 ; shl r15, r16, r17 ; ld1u r25, r26 }
{ andi r5, r6, 5 ; shl1addx r15, r16, r17 ; ld2s r25, r26 }
{ andi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld4s r25, r26 }
{ andi r5, r6, 5 ; shl3addx r15, r16, r17 ; prefetch r25 }
{ andi r5, r6, 5 ; shrs r15, r16, r17 ; prefetch r25 }
{ andi r5, r6, 5 ; shru r15, r16, r17 ; prefetch_l1_fault r25 }
{ andi r5, r6, 5 ; st r25, r26 ; cmples r15, r16, r17 }
{ andi r5, r6, 5 ; st1 r25, r26 ; add r15, r16, r17 }
{ andi r5, r6, 5 ; st1 r25, r26 ; shrsi r15, r16, 5 }
{ andi r5, r6, 5 ; st2 r25, r26 ; shl r15, r16, r17 }
{ andi r5, r6, 5 ; st4 r25, r26 ; mnz r15, r16, r17 }
{ andi r5, r6, 5 ; sub r15, r16, r17 ; ld4s r25, r26 }
{ andi r5, r6, 5 ; v1cmpleu r15, r16, r17 }
{ andi r5, r6, 5 ; v2mnz r15, r16, r17 }
{ andi r5, r6, 5 ; xor r15, r16, r17 ; st r25, r26 }
{ bfexts r5, r6, 5, 7 ; finv r15 }
{ bfexts r5, r6, 5, 7 ; ldnt4s_add r15, r16, 5 }
{ bfexts r5, r6, 5, 7 ; shl3addx r15, r16, r17 }
{ bfexts r5, r6, 5, 7 ; v1cmpne r15, r16, r17 }
{ bfexts r5, r6, 5, 7 ; v2shl r15, r16, r17 }
{ bfextu r5, r6, 5, 7 ; cmpltu r15, r16, r17 }
{ bfextu r5, r6, 5, 7 ; ld4s r15, r16 }
{ bfextu r5, r6, 5, 7 ; prefetch_add_l3_fault r15, 5 }
{ bfextu r5, r6, 5, 7 ; stnt4 r15, r16 }
{ bfextu r5, r6, 5, 7 ; v2cmpleu r15, r16, r17 }
{ bfins r5, r6, 5, 7 ; add r15, r16, r17 }
{ bfins r5, r6, 5, 7 ; info 19 }
{ bfins r5, r6, 5, 7 ; mfspr r16, 0x5 }
{ bfins r5, r6, 5, 7 ; shru r15, r16, r17 }
{ bfins r5, r6, 5, 7 ; v1minui r15, r16, 5 }
{ bfins r5, r6, 5, 7 ; v2shrui r15, r16, 5 }
{ clz r5, r6 ; addi r15, r16, 5 ; ld2s r25, r26 }
{ clz r5, r6 ; addxi r15, r16, 5 ; ld2u r25, r26 }
{ clz r5, r6 ; andi r15, r16, 5 ; ld2u r25, r26 }
{ clz r5, r6 ; cmpeqi r15, r16, 5 ; ld4u r25, r26 }
{ clz r5, r6 ; cmpleu r15, r16, r17 ; ld4u r25, r26 }
{ clz r5, r6 ; cmpltsi r15, r16, 5 ; prefetch_l1 r25 }
{ clz r5, r6 ; cmpne r15, r16, r17 ; prefetch_l1_fault r25 }
{ clz r5, r6 ; fnop ; prefetch_l3_fault r25 }
{ clz r5, r6 ; info 19 ; st r25, r26 }
{ clz r5, r6 ; jalrp r15 ; prefetch_l3_fault r25 }
{ clz r5, r6 ; jrp r15 ; st1 r25, r26 }
{ clz r5, r6 ; ld r25, r26 ; shl2addx r15, r16, r17 }
{ clz r5, r6 ; ld1s r25, r26 ; nor r15, r16, r17 }
{ clz r5, r6 ; ld1u r25, r26 ; jalrp r15 }
{ clz r5, r6 ; ld2s r25, r26 ; cmpleu r15, r16, r17 }
{ clz r5, r6 ; ld2u r25, r26 ; add r15, r16, r17 }
{ clz r5, r6 ; ld2u r25, r26 ; shrsi r15, r16, 5 }
{ clz r5, r6 ; ld4s r25, r26 ; shl r15, r16, r17 }
{ clz r5, r6 ; ld4u r25, r26 ; mnz r15, r16, r17 }
{ clz r5, r6 ; ldnt4u r15, r16 }
{ clz r5, r6 ; mnz r15, r16, r17 ; st2 r25, r26 }
{ clz r5, r6 ; movei r15, 5 }
{ clz r5, r6 ; nop }
{ clz r5, r6 ; prefetch r15 }
{ clz r5, r6 ; prefetch r25 ; shrs r15, r16, r17 }
{ clz r5, r6 ; prefetch_l1 r25 ; mz r15, r16, r17 }
{ clz r5, r6 ; prefetch_l1_fault r25 ; jalr r15 }
{ clz r5, r6 ; prefetch_l2 r25 ; cmpleu r15, r16, r17 }
{ clz r5, r6 ; prefetch_l2_fault r25 ; addi r15, r16, 5 }
{ clz r5, r6 ; prefetch_l2_fault r25 ; shru r15, r16, r17 }
{ clz r5, r6 ; prefetch_l3 r25 ; shl1addx r15, r16, r17 }
{ clz r5, r6 ; prefetch_l3_fault r25 ; mz r15, r16, r17 }
{ clz r5, r6 ; rotl r15, r16, r17 ; st4 r25, r26 }
{ clz r5, r6 ; shl16insli r15, r16, 0x1234 }
{ clz r5, r6 ; shl2add r15, r16, r17 ; ld1s r25, r26 }
{ clz r5, r6 ; shl3add r15, r16, r17 ; ld2s r25, r26 }
{ clz r5, r6 ; shli r15, r16, 5 ; ld4s r25, r26 }
{ clz r5, r6 ; shrsi r15, r16, 5 ; ld4s r25, r26 }
{ clz r5, r6 ; shrui r15, r16, 5 ; prefetch r25 }
{ clz r5, r6 ; st r25, r26 ; mz r15, r16, r17 }
{ clz r5, r6 ; st1 r25, r26 ; jalr r15 }
{ clz r5, r6 ; st2 r25, r26 ; cmples r15, r16, r17 }
{ clz r5, r6 ; st4 r15, r16 }
{ clz r5, r6 ; st4 r25, r26 ; shrs r15, r16, r17 }
{ clz r5, r6 ; subx r15, r16, r17 ; ld2s r25, r26 }
{ clz r5, r6 ; v1shrsi r15, r16, 5 }
{ clz r5, r6 ; v4int_l r15, r16, r17 }
{ cmoveqz r5, r6, r7 ; add r15, r16, r17 ; prefetch_l2_fault r25 }
{ cmoveqz r5, r6, r7 ; addx r15, r16, r17 ; prefetch_l3 r25 }
{ cmoveqz r5, r6, r7 ; and r15, r16, r17 ; prefetch_l3 r25 }
{ cmoveqz r5, r6, r7 ; cmpeq r15, r16, r17 ; st r25, r26 }
{ cmoveqz r5, r6, r7 ; cmples r15, r16, r17 ; st r25, r26 }
{ cmoveqz r5, r6, r7 ; cmplts r15, r16, r17 ; st2 r25, r26 }
{ cmoveqz r5, r6, r7 ; cmpltu r15, r16, r17 }
{ cmoveqz r5, r6, r7 ; fnop ; ld1u r25, r26 }
{ cmoveqz r5, r6, r7 ; info 19 ; ld2s r25, r26 }
{ cmoveqz r5, r6, r7 ; jalrp r15 ; ld1u r25, r26 }
{ cmoveqz r5, r6, r7 ; jrp r15 ; ld2u r25, r26 }
{ cmoveqz r5, r6, r7 ; ld r25, r26 ; movei r15, 5 }
{ cmoveqz r5, r6, r7 ; ld1s r25, r26 ; info 19 }
{ cmoveqz r5, r6, r7 ; ld1u r25, r26 ; cmpeqi r15, r16, 5 }
{ cmoveqz r5, r6, r7 ; ld1u_add r15, r16, 5 }
{ cmoveqz r5, r6, r7 ; ld2s r25, r26 ; shli r15, r16, 5 }
{ cmoveqz r5, r6, r7 ; ld2u r25, r26 ; rotl r15, r16, r17 }
{ cmoveqz r5, r6, r7 ; ld4s r25, r26 ; jrp r15 }
{ cmoveqz r5, r6, r7 ; ld4u r25, r26 ; cmpltsi r15, r16, 5 }
{ cmoveqz r5, r6, r7 ; ldnt r15, r16 }
{ cmoveqz r5, r6, r7 ; mnz r15, r16, r17 ; ld4s r25, r26 }
{ cmoveqz r5, r6, r7 ; movei r15, 5 ; prefetch r25 }
{ cmoveqz r5, r6, r7 ; nop ; prefetch r25 }
{ cmoveqz r5, r6, r7 ; or r15, r16, r17 ; prefetch_l1_fault r25 }
{ cmoveqz r5, r6, r7 ; prefetch r25 ; or r15, r16, r17 }
{ cmoveqz r5, r6, r7 ; prefetch_l1 r25 ; fnop }
{ cmoveqz r5, r6, r7 ; prefetch_l1_fault r25 ; cmpeq r15, r16, r17 }
{ cmoveqz r5, r6, r7 ; prefetch_l1_fault r25 }
{ cmoveqz r5, r6, r7 ; prefetch_l2 r25 ; shli r15, r16, 5 }
{ cmoveqz r5, r6, r7 ; prefetch_l2_fault r25 ; rotli r15, r16, 5 }
{ cmoveqz r5, r6, r7 ; prefetch_l3 r25 ; mnz r15, r16, r17 }
{ cmoveqz r5, r6, r7 ; prefetch_l3_fault r25 ; fnop }
{ cmoveqz r5, r6, r7 ; rotl r15, r16, r17 ; ld4u r25, r26 }
{ cmoveqz r5, r6, r7 ; shl r15, r16, r17 ; prefetch_l1 r25 }
{ cmoveqz r5, r6, r7 ; shl1addx r15, r16, r17 ; prefetch_l1_fault r25 }
{ cmoveqz r5, r6, r7 ; shl2addx r15, r16, r17 ; prefetch_l2_fault r25 }
{ cmoveqz r5, r6, r7 ; shl3addx r15, r16, r17 ; prefetch_l3_fault r25 }
{ cmoveqz r5, r6, r7 ; shrs r15, r16, r17 ; prefetch_l3_fault r25 }
{ cmoveqz r5, r6, r7 ; shru r15, r16, r17 ; st1 r25, r26 }
{ cmoveqz r5, r6, r7 ; st r25, r26 ; fnop }
{ cmoveqz r5, r6, r7 ; st1 r25, r26 ; cmpeq r15, r16, r17 }
{ cmoveqz r5, r6, r7 ; st1 r25, r26 }
{ cmoveqz r5, r6, r7 ; st2 r25, r26 ; shl3addx r15, r16, r17 }
{ cmoveqz r5, r6, r7 ; st4 r25, r26 ; or r15, r16, r17 }
{ cmoveqz r5, r6, r7 ; sub r15, r16, r17 ; prefetch_l2_fault r25 }
{ cmoveqz r5, r6, r7 ; v1int_h r15, r16, r17 }
{ cmoveqz r5, r6, r7 ; v2shli r15, r16, 5 }
{ cmovnez r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
{ cmovnez r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
{ cmovnez r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 }
{ cmovnez r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
{ cmovnez r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
{ cmovnez r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
{ cmovnez r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
{ cmovnez r5, r6, r7 ; fetchaddgez r15, r16, r17 }
{ cmovnez r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
{ cmovnez r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
{ cmovnez r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
{ cmovnez r5, r6, r7 ; ld r25, r26 ; cmpne r15, r16, r17 }
{ cmovnez r5, r6, r7 ; ld1s r25, r26 ; andi r15, r16, 5 }
{ cmovnez r5, r6, r7 ; ld1s r25, r26 ; xor r15, r16, r17 }
{ cmovnez r5, r6, r7 ; ld1u r25, r26 ; shl3add r15, r16, r17 }
{ cmovnez r5, r6, r7 ; ld2s r25, r26 ; nor r15, r16, r17 }
{ cmovnez r5, r6, r7 ; ld2u r25, r26 ; jalrp r15 }
{ cmovnez r5, r6, r7 ; ld4s r25, r26 ; cmpleu r15, r16, r17 }
{ cmovnez r5, r6, r7 ; ld4u r25, r26 ; add r15, r16, r17 }
{ cmovnez r5, r6, r7 ; ld4u r25, r26 ; shrsi r15, r16, 5 }
{ cmovnez r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
{ cmovnez r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
{ cmovnez r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
{ cmovnez r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
{ cmovnez r5, r6, r7 ; prefetch r25 ; jalr r15 }
{ cmovnez r5, r6, r7 ; prefetch_l1 r25 ; addxi r15, r16, 5 }
{ cmovnez r5, r6, r7 ; prefetch_l1 r25 ; sub r15, r16, r17 }
{ cmovnez r5, r6, r7 ; prefetch_l1_fault r25 ; shl2addx r15, r16, r17 }
{ cmovnez r5, r6, r7 ; prefetch_l2 r25 ; nor r15, r16, r17 }
{ cmovnez r5, r6, r7 ; prefetch_l2_fault r25 ; jr r15 }
{ cmovnez r5, r6, r7 ; prefetch_l3 r25 ; cmpltsi r15, r16, 5 }
{ cmovnez r5, r6, r7 ; prefetch_l3_fault r25 ; addxi r15, r16, 5 }
{ cmovnez r5, r6, r7 ; prefetch_l3_fault r25 ; sub r15, r16, r17 }
{ cmovnez r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
{ cmovnez r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
{ cmovnez r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
{ cmovnez r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
{ cmovnez r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
{ cmovnez r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
{ cmovnez r5, r6, r7 ; st r25, r26 ; addxi r15, r16, 5 }
{ cmovnez r5, r6, r7 ; st r25, r26 ; sub r15, r16, r17 }
{ cmovnez r5, r6, r7 ; st1 r25, r26 ; shl2addx r15, r16, r17 }
{ cmovnez r5, r6, r7 ; st2 r25, r26 ; nop }
{ cmovnez r5, r6, r7 ; st4 r25, r26 ; jalr r15 }
{ cmovnez r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
{ cmovnez r5, r6, r7 ; v1addi r15, r16, 5 }
{ cmovnez r5, r6, r7 ; v2int_l r15, r16, r17 }
{ cmovnez r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
{ cmpeq r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l2 r25 }
{ cmpeq r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 }
{ cmpeq r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l2_fault r25 }
{ cmpeq r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l2 r25 }
{ cmpeq r15, r16, r17 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
{ cmpeq r15, r16, r17 ; cmples r5, r6, r7 ; st r25, r26 }
{ cmpeq r15, r16, r17 ; cmplts r5, r6, r7 ; st2 r25, r26 }
{ cmpeq r15, r16, r17 ; cmpltu r5, r6, r7 }
{ cmpeq r15, r16, r17 ; ctz r5, r6 ; prefetch_l2 r25 }
{ cmpeq r15, r16, r17 ; fsingle_add1 r5, r6, r7 }
{ cmpeq r15, r16, r17 ; info 19 ; st1 r25, r26 }
{ cmpeq r15, r16, r17 ; ld r25, r26 ; nop }
{ cmpeq r15, r16, r17 ; ld1s r25, r26 ; cmpleu r5, r6, r7 }
{ cmpeq r15, r16, r17 ; ld1s r25, r26 ; shrsi r5, r6, 5 }
{ cmpeq r15, r16, r17 ; ld1u r25, r26 ; mula_hu_hu r5, r6, r7 }
{ cmpeq r15, r16, r17 ; ld2s r25, r26 ; clz r5, r6 }
{ cmpeq r15, r16, r17 ; ld2s r25, r26 ; shl2add r5, r6, r7 }
{ cmpeq r15, r16, r17 ; ld2u r25, r26 ; movei r5, 5 }
{ cmpeq r15, r16, r17 ; ld4s r25, r26 ; add r5, r6, r7 }
{ cmpeq r15, r16, r17 ; ld4s r25, r26 ; revbytes r5, r6 }
{ cmpeq r15, r16, r17 ; ld4u r25, r26 ; ctz r5, r6 }
{ cmpeq r15, r16, r17 ; ld4u r25, r26 ; tblidxb0 r5, r6 }
{ cmpeq r15, r16, r17 ; move r5, r6 ; st r25, r26 }
{ cmpeq r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st1 r25, r26 }
{ cmpeq r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
{ cmpeq r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 }
{ cmpeq r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l2 r25 }
{ cmpeq r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l2_fault r25 }
{ cmpeq r15, r16, r17 ; mz r5, r6, r7 ; prefetch_l3_fault r25 }
{ cmpeq r15, r16, r17 ; nor r5, r6, r7 ; st1 r25, r26 }
{ cmpeq r15, r16, r17 ; pcnt r5, r6 ; st2 r25, r26 }
{ cmpeq r15, r16, r17 ; prefetch r25 ; or r5, r6, r7 }
{ cmpeq r15, r16, r17 ; prefetch_l1 r25 ; cmpltsi r5, r6, 5 }
{ cmpeq r15, r16, r17 ; prefetch_l1 r25 ; shrui r5, r6, 5 }
{ cmpeq r15, r16, r17 ; prefetch_l1_fault r25 ; mula_lu_lu r5, r6, r7 }
{ cmpeq r15, r16, r17 ; prefetch_l2 r25 ; cmovnez r5, r6, r7 }
{ cmpeq r15, r16, r17 ; prefetch_l2 r25 ; shl3add r5, r6, r7 }
{ cmpeq r15, r16, r17 ; prefetch_l2_fault r25 ; mul_hu_hu r5, r6, r7 }
{ cmpeq r15, r16, r17 ; prefetch_l3 r25 ; addx r5, r6, r7 }
{ cmpeq r15, r16, r17 ; prefetch_l3 r25 ; rotli r5, r6, 5 }
{ cmpeq r15, r16, r17 ; prefetch_l3_fault r25 ; fsingle_pack1 r5, r6 }
{ cmpeq r15, r16, r17 ; prefetch_l3_fault r25 ; tblidxb2 r5, r6 }
{ cmpeq r15, r16, r17 ; revbytes r5, r6 ; st4 r25, r26 }
{ cmpeq r15, r16, r17 ; shl r5, r6, r7 ; ld r25, r26 }
{ cmpeq r15, r16, r17 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
{ cmpeq r15, r16, r17 ; shl2addx r5, r6, r7 ; ld2s r25, r26 }
{ cmpeq r15, r16, r17 ; shl3addx r5, r6, r7 ; ld4s r25, r26 }
{ cmpeq r15, r16, r17 ; shrs r5, r6, r7 ; ld4s r25, r26 }
{ cmpeq r15, r16, r17 ; shru r5, r6, r7 ; prefetch r25 }
{ cmpeq r15, r16, r17 ; st r25, r26 ; clz r5, r6 }
{ cmpeq r15, r16, r17 ; st r25, r26 ; shl2add r5, r6, r7 }
{ cmpeq r15, r16, r17 ; st1 r25, r26 ; movei r5, 5 }
{ cmpeq r15, r16, r17 ; st2 r25, r26 ; add r5, r6, r7 }
{ cmpeq r15, r16, r17 ; st2 r25, r26 ; revbytes r5, r6 }
{ cmpeq r15, r16, r17 ; st4 r25, r26 ; ctz r5, r6 }
{ cmpeq r15, r16, r17 ; st4 r25, r26 ; tblidxb0 r5, r6 }
{ cmpeq r15, r16, r17 ; subx r5, r6, r7 ; st1 r25, r26 }
{ cmpeq r15, r16, r17 ; tblidxb1 r5, r6 ; st2 r25, r26 }
{ cmpeq r15, r16, r17 ; tblidxb3 r5, r6 }
{ cmpeq r15, r16, r17 ; v1shrs r5, r6, r7 }
{ cmpeq r15, r16, r17 ; v2shl r5, r6, r7 }
{ cmpeq r5, r6, r7 ; add r15, r16, r17 ; ld r25, r26 }
{ cmpeq r5, r6, r7 ; addx r15, r16, r17 ; ld1s r25, r26 }
{ cmpeq r5, r6, r7 ; and r15, r16, r17 ; ld1s r25, r26 }
{ cmpeq r5, r6, r7 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
{ cmpeq r5, r6, r7 ; cmples r15, r16, r17 ; ld2s r25, r26 }
{ cmpeq r5, r6, r7 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
{ cmpeq r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch r25 }
{ cmpeq r5, r6, r7 ; fetchaddgez r15, r16, r17 }
{ cmpeq r5, r6, r7 ; ill ; prefetch_l2_fault r25 }
{ cmpeq r5, r6, r7 ; jalr r15 ; prefetch_l2 r25 }
{ cmpeq r5, r6, r7 ; jr r15 ; prefetch_l3 r25 }
{ cmpeq r5, r6, r7 ; ld r25, r26 ; cmpne r15, r16, r17 }
{ cmpeq r5, r6, r7 ; ld1s r25, r26 ; andi r15, r16, 5 }
{ cmpeq r5, r6, r7 ; ld1s r25, r26 ; xor r15, r16, r17 }
{ cmpeq r5, r6, r7 ; ld1u r25, r26 ; shl3add r15, r16, r17 }
{ cmpeq r5, r6, r7 ; ld2s r25, r26 ; nor r15, r16, r17 }
{ cmpeq r5, r6, r7 ; ld2u r25, r26 ; jalrp r15 }
{ cmpeq r5, r6, r7 ; ld4s r25, r26 ; cmpleu r15, r16, r17 }
{ cmpeq r5, r6, r7 ; ld4u r25, r26 ; add r15, r16, r17 }
{ cmpeq r5, r6, r7 ; ld4u r25, r26 ; shrsi r15, r16, 5 }
{ cmpeq r5, r6, r7 ; lnk r15 ; st1 r25, r26 }
{ cmpeq r5, r6, r7 ; move r15, r16 ; st1 r25, r26 }
{ cmpeq r5, r6, r7 ; mz r15, r16, r17 ; st1 r25, r26 }
{ cmpeq r5, r6, r7 ; nor r15, r16, r17 ; st4 r25, r26 }
{ cmpeq r5, r6, r7 ; prefetch r25 ; jalr r15 }
{ cmpeq r5, r6, r7 ; prefetch_l1 r25 ; addxi r15, r16, 5 }
{ cmpeq r5, r6, r7 ; prefetch_l1 r25 ; sub r15, r16, r17 }
{ cmpeq r5, r6, r7 ; prefetch_l1_fault r25 ; shl2addx r15, r16, r17 }
{ cmpeq r5, r6, r7 ; prefetch_l2 r25 ; nor r15, r16, r17 }
{ cmpeq r5, r6, r7 ; prefetch_l2_fault r25 ; jr r15 }
{ cmpeq r5, r6, r7 ; prefetch_l3 r25 ; cmpltsi r15, r16, 5 }
{ cmpeq r5, r6, r7 ; prefetch_l3_fault r25 ; addxi r15, r16, 5 }
{ cmpeq r5, r6, r7 ; prefetch_l3_fault r25 ; sub r15, r16, r17 }
{ cmpeq r5, r6, r7 ; rotli r15, r16, 5 ; st2 r25, r26 }
{ cmpeq r5, r6, r7 ; shl1add r15, r16, r17 ; st4 r25, r26 }
{ cmpeq r5, r6, r7 ; shl2addx r15, r16, r17 ; ld r25, r26 }
{ cmpeq r5, r6, r7 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
{ cmpeq r5, r6, r7 ; shrs r15, r16, r17 ; ld1u r25, r26 }
{ cmpeq r5, r6, r7 ; shru r15, r16, r17 ; ld2u r25, r26 }
{ cmpeq r5, r6, r7 ; st r25, r26 ; addxi r15, r16, 5 }
{ cmpeq r5, r6, r7 ; st r25, r26 ; sub r15, r16, r17 }
{ cmpeq r5, r6, r7 ; st1 r25, r26 ; shl2addx r15, r16, r17 }
{ cmpeq r5, r6, r7 ; st2 r25, r26 ; nop }
{ cmpeq r5, r6, r7 ; st4 r25, r26 ; jalr r15 }
{ cmpeq r5, r6, r7 ; sub r15, r16, r17 ; ld r25, r26 }
{ cmpeq r5, r6, r7 ; v1addi r15, r16, 5 }
{ cmpeq r5, r6, r7 ; v2int_l r15, r16, r17 }
{ cmpeq r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
{ cmpeqi r15, r16, 5 ; addi r5, r6, 5 ; prefetch_l2 r25 }
{ cmpeqi r15, r16, 5 ; addxi r5, r6, 5 ; prefetch_l2_fault r25 }
{ cmpeqi r15, r16, 5 ; andi r5, r6, 5 ; prefetch_l2_fault r25 }
{ cmpeqi r15, r16, 5 ; cmoveqz r5, r6, r7 ; prefetch_l2 r25 }
{ cmpeqi r15, r16, 5 ; cmpeq r5, r6, r7 ; prefetch_l3 r25 }
{ cmpeqi r15, r16, 5 ; cmples r5, r6, r7 ; st r25, r26 }
{ cmpeqi r15, r16, 5 ; cmplts r5, r6, r7 ; st2 r25, r26 }
{ cmpeqi r15, r16, 5 ; cmpltu r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; ctz r5, r6 ; prefetch_l2 r25 }
{ cmpeqi r15, r16, 5 ; fsingle_add1 r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; info 19 ; st1 r25, r26 }
{ cmpeqi r15, r16, 5 ; ld r25, r26 ; nop }
{ cmpeqi r15, r16, 5 ; ld1s r25, r26 ; cmpleu r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; ld1s r25, r26 ; shrsi r5, r6, 5 }
{ cmpeqi r15, r16, 5 ; ld1u r25, r26 ; mula_hu_hu r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; ld2s r25, r26 ; clz r5, r6 }
{ cmpeqi r15, r16, 5 ; ld2s r25, r26 ; shl2add r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; ld2u r25, r26 ; movei r5, 5 }
{ cmpeqi r15, r16, 5 ; ld4s r25, r26 ; add r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; ld4s r25, r26 ; revbytes r5, r6 }
{ cmpeqi r15, r16, 5 ; ld4u r25, r26 ; ctz r5, r6 }
{ cmpeqi r15, r16, 5 ; ld4u r25, r26 ; tblidxb0 r5, r6 }
{ cmpeqi r15, r16, 5 ; move r5, r6 ; st r25, r26 }
{ cmpeqi r15, r16, 5 ; mul_hs_hs r5, r6, r7 ; st1 r25, r26 }
{ cmpeqi r15, r16, 5 ; mul_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
{ cmpeqi r15, r16, 5 ; mula_hs_hs r5, r6, r7 ; prefetch_l3_fault r25 }
{ cmpeqi r15, r16, 5 ; mula_ls_ls r5, r6, r7 ; prefetch_l2 r25 }
{ cmpeqi r15, r16, 5 ; mulax r5, r6, r7 ; prefetch_l2_fault r25 }
{ cmpeqi r15, r16, 5 ; mz r5, r6, r7 ; prefetch_l3_fault r25 }
{ cmpeqi r15, r16, 5 ; nor r5, r6, r7 ; st1 r25, r26 }
{ cmpeqi r15, r16, 5 ; pcnt r5, r6 ; st2 r25, r26 }
{ cmpeqi r15, r16, 5 ; prefetch r25 ; or r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; prefetch_l1 r25 ; cmpltsi r5, r6, 5 }
{ cmpeqi r15, r16, 5 ; prefetch_l1 r25 ; shrui r5, r6, 5 }
{ cmpeqi r15, r16, 5 ; prefetch_l1_fault r25 ; mula_lu_lu r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; prefetch_l2 r25 ; cmovnez r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; prefetch_l2 r25 ; shl3add r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; prefetch_l2_fault r25 ; mul_hu_hu r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; prefetch_l3 r25 ; addx r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; prefetch_l3 r25 ; rotli r5, r6, 5 }
{ cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 ; fsingle_pack1 r5, r6 }
{ cmpeqi r15, r16, 5 ; prefetch_l3_fault r25 ; tblidxb2 r5, r6 }
{ cmpeqi r15, r16, 5 ; revbytes r5, r6 ; st4 r25, r26 }
{ cmpeqi r15, r16, 5 ; shl r5, r6, r7 ; ld r25, r26 }
{ cmpeqi r15, r16, 5 ; shl1addx r5, r6, r7 ; ld1s r25, r26 }
{ cmpeqi r15, r16, 5 ; shl2addx r5, r6, r7 ; ld2s r25, r26 }
{ cmpeqi r15, r16, 5 ; shl3addx r5, r6, r7 ; ld4s r25, r26 }
{ cmpeqi r15, r16, 5 ; shrs r5, r6, r7 ; ld4s r25, r26 }
{ cmpeqi r15, r16, 5 ; shru r5, r6, r7 ; prefetch r25 }
{ cmpeqi r15, r16, 5 ; st r25, r26 ; clz r5, r6 }
{ cmpeqi r15, r16, 5 ; st r25, r26 ; shl2add r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; st1 r25, r26 ; movei r5, 5 }
{ cmpeqi r15, r16, 5 ; st2 r25, r26 ; add r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; st2 r25, r26 ; revbytes r5, r6 }
{ cmpeqi r15, r16, 5 ; st4 r25, r26 ; ctz r5, r6 }
{ cmpeqi r15, r16, 5 ; st4 r25, r26 ; tblidxb0 r5, r6 }
{ cmpeqi r15, r16, 5 ; subx r5, r6, r7 ; st1 r25, r26 }
{ cmpeqi r15, r16, 5 ; tblidxb1 r5, r6 ; st2 r25, r26 }
{ cmpeqi r15, r16, 5 ; tblidxb3 r5, r6 }
{ cmpeqi r15, r16, 5 ; v1shrs r5, r6, r7 }
{ cmpeqi r15, r16, 5 ; v2shl r5, r6, r7 }
{ cmpeqi r5, r6, 5 ; add r15, r16, r17 ; ld r25, r26 }
{ cmpeqi r5, r6, 5 ; addx r15, r16, r17 ; ld1s r25, r26 }
{ cmpeqi r5, r6, 5 ; and r15, r16, r17 ; ld1s r25, r26 }
{ cmpeqi r5, r6, 5 ; cmpeq r15, r16, r17 ; ld2s r25, r26 }
{ cmpeqi r5, r6, 5 ; cmples r15, r16, r17 ; ld2s r25, r26 }
{ cmpeqi r5, r6, 5 ; cmplts r15, r16, r17 ; ld4s r25, r26 }
{ cmpeqi r5, r6, 5 ; cmpltu r15, r16, r17 ; prefetch r25 }
{ cmpeqi r5, r6, 5 ; fetchaddgez r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; ill ; prefetch_l2_fault r25 }
{ cmpeqi r5, r6, 5 ; jalr r15 ; prefetch_l2 r25 }
{ cmpeqi r5, r6, 5 ; jr r15 ; prefetch_l3 r25 }
{ cmpeqi r5, r6, 5 ; ld r25, r26 ; cmpne r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; ld1s r25, r26 ; andi r15, r16, 5 }
{ cmpeqi r5, r6, 5 ; ld1s r25, r26 ; xor r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; ld1u r25, r26 ; shl3add r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; ld2s r25, r26 ; nor r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; ld2u r25, r26 ; jalrp r15 }
{ cmpeqi r5, r6, 5 ; ld4s r25, r26 ; cmpleu r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; ld4u r25, r26 ; add r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; ld4u r25, r26 ; shrsi r15, r16, 5 }
{ cmpeqi r5, r6, 5 ; lnk r15 ; st1 r25, r26 }
{ cmpeqi r5, r6, 5 ; move r15, r16 ; st1 r25, r26 }
{ cmpeqi r5, r6, 5 ; mz r15, r16, r17 ; st1 r25, r26 }
{ cmpeqi r5, r6, 5 ; nor r15, r16, r17 ; st4 r25, r26 }
{ cmpeqi r5, r6, 5 ; prefetch r25 ; jalr r15 }
{ cmpeqi r5, r6, 5 ; prefetch_l1 r25 ; addxi r15, r16, 5 }
{ cmpeqi r5, r6, 5 ; prefetch_l1 r25 ; sub r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; prefetch_l1_fault r25 ; shl2addx r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; prefetch_l2 r25 ; nor r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; prefetch_l2_fault r25 ; jr r15 }
{ cmpeqi r5, r6, 5 ; prefetch_l3 r25 ; cmpltsi r15, r16, 5 }
{ cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 ; addxi r15, r16, 5 }
{ cmpeqi r5, r6, 5 ; prefetch_l3_fault r25 ; sub r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; rotli r15, r16, 5 ; st2 r25, r26 }
{ cmpeqi r5, r6, 5 ; shl1add r15, r16, r17 ; st4 r25, r26 }
{ cmpeqi r5, r6, 5 ; shl2addx r15, r16, r17 ; ld r25, r26 }
{ cmpeqi r5, r6, 5 ; shl3addx r15, r16, r17 ; ld1u r25, r26 }
{ cmpeqi r5, r6, 5 ; shrs r15, r16, r17 ; ld1u r25, r26 }
{ cmpeqi r5, r6, 5 ; shru r15, r16, r17 ; ld2u r25, r26 }
{ cmpeqi r5, r6, 5 ; st r25, r26 ; addxi r15, r16, 5 }
{ cmpeqi r5, r6, 5 ; st r25, r26 ; sub r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; st1 r25, r26 ; shl2addx r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; st2 r25, r26 ; nop }
{ cmpeqi r5, r6, 5 ; st4 r25, r26 ; jalr r15 }
{ cmpeqi r5, r6, 5 ; sub r15, r16, r17 ; ld r25, r26 }
{ cmpeqi r5, r6, 5 ; v1addi r15, r16, 5 }
{ cmpeqi r5, r6, 5 ; v2int_l r15, r16, r17 }
{ cmpeqi r5, r6, 5 ; xor r15, r16, r17 ; prefetch_l1_fault r25 }
{ cmpexch r15, r16, r17 ; cmulh r5, r6, r7 }
{ cmpexch r15, r16, r17 ; mul_ls_lu r5, r6, r7 }
{ cmpexch r15, r16, r17 ; shruxi r5, r6, 5 }
{ cmpexch r15, r16, r17 ; v1multu r5, r6, r7 }
{ cmpexch r15, r16, r17 ; v2mz r5, r6, r7 }
{ cmpexch4 r15, r16, r17 ; bfextu r5, r6, 5, 7 }
{ cmpexch4 r15, r16, r17 ; fsingle_mul2 r5, r6, r7 }
{ cmpexch4 r15, r16, r17 ; revbytes r5, r6 }
{ cmpexch4 r15, r16, r17 ; v1cmpltui r5, r6, 5 }
{ cmpexch4 r15, r16, r17 ; v2cmples r5, r6, r7 }
{ cmpexch4 r15, r16, r17 ; v4packsc r5, r6, r7 }
{ cmples r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
{ cmples r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
{ cmples r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
{ cmples r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 }
{ cmples r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
{ cmples r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
{ cmples r15, r16, r17 ; cmplts r5, r6, r7 }
{ cmples r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
{ cmples r15, r16, r17 ; ctz r5, r6 ; prefetch_l3 r25 }
{ cmples r15, r16, r17 ; fsingle_mul1 r5, r6, r7 }
{ cmples r15, r16, r17 ; info 19 ; st4 r25, r26 }
{ cmples r15, r16, r17 ; ld r25, r26 ; or r5, r6, r7 }
{ cmples r15, r16, r17 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 }
{ cmples r15, r16, r17 ; ld1s r25, r26 ; shrui r5, r6, 5 }
{ cmples r15, r16, r17 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 }
{ cmples r15, r16, r17 ; ld2s r25, r26 ; cmovnez r5, r6, r7 }
{ cmples r15, r16, r17 ; ld2s r25, r26 ; shl3add r5, r6, r7 }
{ cmples r15, r16, r17 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 }
{ cmples r15, r16, r17 ; ld4s r25, r26 ; addx r5, r6, r7 }
{ cmples r15, r16, r17 ; ld4s r25, r26 ; rotli r5, r6, 5 }
{ cmples r15, r16, r17 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 }
{ cmples r15, r16, r17 ; ld4u r25, r26 ; tblidxb2 r5, r6 }
{ cmples r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
{ cmples r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 }
{ cmples r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st r25, r26 }
{ cmples r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 }
{ cmples r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
{ cmples r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 }
{ cmples r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
{ cmples r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
{ cmples r15, r16, r17 ; pcnt r5, r6 }
{ cmples r15, r16, r17 ; prefetch r25 ; revbits r5, r6 }
{ cmples r15, r16, r17 ; prefetch_l1 r25 ; cmpne r5, r6, r7 }
{ cmples r15, r16, r17 ; prefetch_l1 r25 ; subx r5, r6, r7 }
{ cmples r15, r16, r17 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 }
{ cmples r15, r16, r17 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 }
{ cmples r15, r16, r17 ; prefetch_l2 r25 ; shli r5, r6, 5 }
{ cmples r15, r16, r17 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 }
{ cmples r15, r16, r17 ; prefetch_l3 r25 ; and r5, r6, r7 }
{ cmples r15, r16, r17 ; prefetch_l3 r25 ; shl1add r5, r6, r7 }
{ cmples r15, r16, r17 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 }
{ cmples r15, r16, r17 ; prefetch_l3_fault r25 ; xor r5, r6, r7 }
{ cmples r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
{ cmples r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
{ cmples r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
{ cmples r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
{ cmples r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
{ cmples r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
{ cmples r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
{ cmples r15, r16, r17 ; st r25, r26 ; cmovnez r5, r6, r7 }
{ cmples r15, r16, r17 ; st r25, r26 ; shl3add r5, r6, r7 }
{ cmples r15, r16, r17 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 }
{ cmples r15, r16, r17 ; st2 r25, r26 ; addx r5, r6, r7 }
{ cmples r15, r16, r17 ; st2 r25, r26 ; rotli r5, r6, 5 }
{ cmples r15, r16, r17 ; st4 r25, r26 ; fsingle_pack1 r5, r6 }
{ cmples r15, r16, r17 ; st4 r25, r26 ; tblidxb2 r5, r6 }
{ cmples r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
{ cmples r15, r16, r17 ; tblidxb1 r5, r6 }
{ cmples r15, r16, r17 ; v1addi r5, r6, 5 }
{ cmples r15, r16, r17 ; v1shru r5, r6, r7 }
{ cmples r15, r16, r17 ; v2shlsc r5, r6, r7 }
{ cmples r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
{ cmples r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
{ cmples r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
{ cmples r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
{ cmples r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
{ cmples r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
{ cmples r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
{ cmples r5, r6, r7 ; fetchand r15, r16, r17 }
{ cmples r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
{ cmples r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
{ cmples r5, r6, r7 ; jr r15 ; st r25, r26 }
{ cmples r5, r6, r7 ; ld r25, r26 ; ill }
{ cmples r5, r6, r7 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 }
{ cmples r5, r6, r7 ; ld1s_add r15, r16, 5 }
{ cmples r5, r6, r7 ; ld1u r25, r26 ; shli r15, r16, 5 }
{ cmples r5, r6, r7 ; ld2s r25, r26 ; rotl r15, r16, r17 }
{ cmples r5, r6, r7 ; ld2u r25, r26 ; jrp r15 }
{ cmples r5, r6, r7 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 }
{ cmples r5, r6, r7 ; ld4u r25, r26 ; addx r15, r16, r17 }
{ cmples r5, r6, r7 ; ld4u r25, r26 ; shrui r15, r16, 5 }
{ cmples r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
{ cmples r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
{ cmples r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
{ cmples r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
{ cmples r5, r6, r7 ; prefetch r25 ; jr r15 }
{ cmples r5, r6, r7 ; prefetch_l1 r25 ; andi r15, r16, 5 }
{ cmples r5, r6, r7 ; prefetch_l1 r25 ; xor r15, r16, r17 }
{ cmples r5, r6, r7 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 }
{ cmples r5, r6, r7 ; prefetch_l2 r25 ; rotl r15, r16, r17 }
{ cmples r5, r6, r7 ; prefetch_l2_fault r25 ; lnk r15 }
{ cmples r5, r6, r7 ; prefetch_l3 r25 ; cmpne r15, r16, r17 }
{ cmples r5, r6, r7 ; prefetch_l3_fault r25 ; andi r15, r16, 5 }
{ cmples r5, r6, r7 ; prefetch_l3_fault r25 ; xor r15, r16, r17 }
{ cmples r5, r6, r7 ; rotli r15, r16, 5 }
{ cmples r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
{ cmples r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
{ cmples r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
{ cmples r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
{ cmples r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
{ cmples r5, r6, r7 ; st r25, r26 ; andi r15, r16, 5 }
{ cmples r5, r6, r7 ; st r25, r26 ; xor r15, r16, r17 }
{ cmples r5, r6, r7 ; st1 r25, r26 ; shl3addx r15, r16, r17 }
{ cmples r5, r6, r7 ; st2 r25, r26 ; or r15, r16, r17 }
{ cmples r5, r6, r7 ; st4 r25, r26 ; jr r15 }
{ cmples r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
{ cmples r5, r6, r7 ; v1cmpeq r15, r16, r17 }
{ cmples r5, r6, r7 ; v2maxsi r15, r16, 5 }
{ cmples r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
{ cmpleu r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
{ cmpleu r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
{ cmpleu r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
{ cmpleu r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 }
{ cmpleu r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
{ cmpleu r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
{ cmpleu r15, r16, r17 ; cmplts r5, r6, r7 }
{ cmpleu r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
{ cmpleu r15, r16, r17 ; ctz r5, r6 ; prefetch_l3 r25 }
{ cmpleu r15, r16, r17 ; fsingle_mul1 r5, r6, r7 }
{ cmpleu r15, r16, r17 ; info 19 ; st4 r25, r26 }
{ cmpleu r15, r16, r17 ; ld r25, r26 ; or r5, r6, r7 }
{ cmpleu r15, r16, r17 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 }
{ cmpleu r15, r16, r17 ; ld1s r25, r26 ; shrui r5, r6, 5 }
{ cmpleu r15, r16, r17 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 }
{ cmpleu r15, r16, r17 ; ld2s r25, r26 ; cmovnez r5, r6, r7 }
{ cmpleu r15, r16, r17 ; ld2s r25, r26 ; shl3add r5, r6, r7 }
{ cmpleu r15, r16, r17 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 }
{ cmpleu r15, r16, r17 ; ld4s r25, r26 ; addx r5, r6, r7 }
{ cmpleu r15, r16, r17 ; ld4s r25, r26 ; rotli r5, r6, 5 }
{ cmpleu r15, r16, r17 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 }
{ cmpleu r15, r16, r17 ; ld4u r25, r26 ; tblidxb2 r5, r6 }
{ cmpleu r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
{ cmpleu r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 }
{ cmpleu r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st r25, r26 }
{ cmpleu r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 }
{ cmpleu r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
{ cmpleu r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 }
{ cmpleu r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
{ cmpleu r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
{ cmpleu r15, r16, r17 ; pcnt r5, r6 }
{ cmpleu r15, r16, r17 ; prefetch r25 ; revbits r5, r6 }
{ cmpleu r15, r16, r17 ; prefetch_l1 r25 ; cmpne r5, r6, r7 }
{ cmpleu r15, r16, r17 ; prefetch_l1 r25 ; subx r5, r6, r7 }
{ cmpleu r15, r16, r17 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 }
{ cmpleu r15, r16, r17 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 }
{ cmpleu r15, r16, r17 ; prefetch_l2 r25 ; shli r5, r6, 5 }
{ cmpleu r15, r16, r17 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 }
{ cmpleu r15, r16, r17 ; prefetch_l3 r25 ; and r5, r6, r7 }
{ cmpleu r15, r16, r17 ; prefetch_l3 r25 ; shl1add r5, r6, r7 }
{ cmpleu r15, r16, r17 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 }
{ cmpleu r15, r16, r17 ; prefetch_l3_fault r25 ; xor r5, r6, r7 }
{ cmpleu r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
{ cmpleu r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
{ cmpleu r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
{ cmpleu r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
{ cmpleu r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
{ cmpleu r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
{ cmpleu r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
{ cmpleu r15, r16, r17 ; st r25, r26 ; cmovnez r5, r6, r7 }
{ cmpleu r15, r16, r17 ; st r25, r26 ; shl3add r5, r6, r7 }
{ cmpleu r15, r16, r17 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 }
{ cmpleu r15, r16, r17 ; st2 r25, r26 ; addx r5, r6, r7 }
{ cmpleu r15, r16, r17 ; st2 r25, r26 ; rotli r5, r6, 5 }
{ cmpleu r15, r16, r17 ; st4 r25, r26 ; fsingle_pack1 r5, r6 }
{ cmpleu r15, r16, r17 ; st4 r25, r26 ; tblidxb2 r5, r6 }
{ cmpleu r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
{ cmpleu r15, r16, r17 ; tblidxb1 r5, r6 }
{ cmpleu r15, r16, r17 ; v1addi r5, r6, 5 }
{ cmpleu r15, r16, r17 ; v1shru r5, r6, r7 }
{ cmpleu r15, r16, r17 ; v2shlsc r5, r6, r7 }
{ cmpleu r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
{ cmpleu r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
{ cmpleu r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
{ cmpleu r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
{ cmpleu r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
{ cmpleu r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
{ cmpleu r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
{ cmpleu r5, r6, r7 ; fetchand r15, r16, r17 }
{ cmpleu r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
{ cmpleu r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
{ cmpleu r5, r6, r7 ; jr r15 ; st r25, r26 }
{ cmpleu r5, r6, r7 ; ld r25, r26 ; ill }
{ cmpleu r5, r6, r7 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 }
{ cmpleu r5, r6, r7 ; ld1s_add r15, r16, 5 }
{ cmpleu r5, r6, r7 ; ld1u r25, r26 ; shli r15, r16, 5 }
{ cmpleu r5, r6, r7 ; ld2s r25, r26 ; rotl r15, r16, r17 }
{ cmpleu r5, r6, r7 ; ld2u r25, r26 ; jrp r15 }
{ cmpleu r5, r6, r7 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 }
{ cmpleu r5, r6, r7 ; ld4u r25, r26 ; addx r15, r16, r17 }
{ cmpleu r5, r6, r7 ; ld4u r25, r26 ; shrui r15, r16, 5 }
{ cmpleu r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
{ cmpleu r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
{ cmpleu r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
{ cmpleu r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
{ cmpleu r5, r6, r7 ; prefetch r25 ; jr r15 }
{ cmpleu r5, r6, r7 ; prefetch_l1 r25 ; andi r15, r16, 5 }
{ cmpleu r5, r6, r7 ; prefetch_l1 r25 ; xor r15, r16, r17 }
{ cmpleu r5, r6, r7 ; prefetch_l1_fault r25 ; shl3addx r15, r16, r17 }
{ cmpleu r5, r6, r7 ; prefetch_l2 r25 ; rotl r15, r16, r17 }
{ cmpleu r5, r6, r7 ; prefetch_l2_fault r25 ; lnk r15 }
{ cmpleu r5, r6, r7 ; prefetch_l3 r25 ; cmpne r15, r16, r17 }
{ cmpleu r5, r6, r7 ; prefetch_l3_fault r25 ; andi r15, r16, 5 }
{ cmpleu r5, r6, r7 ; prefetch_l3_fault r25 ; xor r15, r16, r17 }
{ cmpleu r5, r6, r7 ; rotli r15, r16, 5 }
{ cmpleu r5, r6, r7 ; shl1addx r15, r16, r17 ; ld r25, r26 }
{ cmpleu r5, r6, r7 ; shl2addx r15, r16, r17 ; ld1u r25, r26 }
{ cmpleu r5, r6, r7 ; shl3addx r15, r16, r17 ; ld2u r25, r26 }
{ cmpleu r5, r6, r7 ; shrs r15, r16, r17 ; ld2u r25, r26 }
{ cmpleu r5, r6, r7 ; shru r15, r16, r17 ; ld4u r25, r26 }
{ cmpleu r5, r6, r7 ; st r25, r26 ; andi r15, r16, 5 }
{ cmpleu r5, r6, r7 ; st r25, r26 ; xor r15, r16, r17 }
{ cmpleu r5, r6, r7 ; st1 r25, r26 ; shl3addx r15, r16, r17 }
{ cmpleu r5, r6, r7 ; st2 r25, r26 ; or r15, r16, r17 }
{ cmpleu r5, r6, r7 ; st4 r25, r26 ; jr r15 }
{ cmpleu r5, r6, r7 ; sub r15, r16, r17 ; ld1u r25, r26 }
{ cmpleu r5, r6, r7 ; v1cmpeq r15, r16, r17 }
{ cmpleu r5, r6, r7 ; v2maxsi r15, r16, 5 }
{ cmpleu r5, r6, r7 ; xor r15, r16, r17 ; prefetch_l2_fault r25 }
{ cmplts r15, r16, r17 ; addi r5, r6, 5 ; prefetch_l3 r25 }
{ cmplts r15, r16, r17 ; addxi r5, r6, 5 ; prefetch_l3_fault r25 }
{ cmplts r15, r16, r17 ; andi r5, r6, 5 ; prefetch_l3_fault r25 }
{ cmplts r15, r16, r17 ; cmoveqz r5, r6, r7 ; prefetch_l3 r25 }
{ cmplts r15, r16, r17 ; cmpeq r5, r6, r7 ; st r25, r26 }
{ cmplts r15, r16, r17 ; cmples r5, r6, r7 ; st2 r25, r26 }
{ cmplts r15, r16, r17 ; cmplts r5, r6, r7 }
{ cmplts r15, r16, r17 ; cmpne r5, r6, r7 ; ld r25, r26 }
{ cmplts r15, r16, r17 ; ctz r5, r6 ; prefetch_l3 r25 }
{ cmplts r15, r16, r17 ; fsingle_mul1 r5, r6, r7 }
{ cmplts r15, r16, r17 ; info 19 ; st4 r25, r26 }
{ cmplts r15, r16, r17 ; ld r25, r26 ; or r5, r6, r7 }
{ cmplts r15, r16, r17 ; ld1s r25, r26 ; cmpltsi r5, r6, 5 }
{ cmplts r15, r16, r17 ; ld1s r25, r26 ; shrui r5, r6, 5 }
{ cmplts r15, r16, r17 ; ld1u r25, r26 ; mula_lu_lu r5, r6, r7 }
{ cmplts r15, r16, r17 ; ld2s r25, r26 ; cmovnez r5, r6, r7 }
{ cmplts r15, r16, r17 ; ld2s r25, r26 ; shl3add r5, r6, r7 }
{ cmplts r15, r16, r17 ; ld2u r25, r26 ; mul_hu_hu r5, r6, r7 }
{ cmplts r15, r16, r17 ; ld4s r25, r26 ; addx r5, r6, r7 }
{ cmplts r15, r16, r17 ; ld4s r25, r26 ; rotli r5, r6, 5 }
{ cmplts r15, r16, r17 ; ld4u r25, r26 ; fsingle_pack1 r5, r6 }
{ cmplts r15, r16, r17 ; ld4u r25, r26 ; tblidxb2 r5, r6 }
{ cmplts r15, r16, r17 ; move r5, r6 ; st2 r25, r26 }
{ cmplts r15, r16, r17 ; mul_hs_hs r5, r6, r7 ; st4 r25, r26 }
{ cmplts r15, r16, r17 ; mul_ls_ls r5, r6, r7 ; st r25, r26 }
{ cmplts r15, r16, r17 ; mula_hs_hs r5, r6, r7 ; st1 r25, r26 }
{ cmplts r15, r16, r17 ; mula_ls_ls r5, r6, r7 ; prefetch_l3 r25 }
{ cmplts r15, r16, r17 ; mulax r5, r6, r7 ; prefetch_l3_fault r25 }
{ cmplts r15, r16, r17 ; mz r5, r6, r7 ; st1 r25, r26 }
{ cmplts r15, r16, r17 ; nor r5, r6, r7 ; st4 r25, r26 }
{ cmplts r15, r16, r17 ; pcnt r5, r6 }
{ cmplts r15, r16, r17 ; prefetch r25 ; revbits r5, r6 }
{ cmplts r15, r16, r17 ; prefetch_l1 r25 ; cmpne r5, r6, r7 }
{ cmplts r15, r16, r17 ; prefetch_l1 r25 ; subx r5, r6, r7 }
{ cmplts r15, r16, r17 ; prefetch_l1_fault r25 ; mulx r5, r6, r7 }
{ cmplts r15, r16, r17 ; prefetch_l2 r25 ; cmpeqi r5, r6, 5 }
{ cmplts r15, r16, r17 ; prefetch_l2 r25 ; shli r5, r6, 5 }
{ cmplts r15, r16, r17 ; prefetch_l2_fault r25 ; mul_lu_lu r5, r6, r7 }
{ cmplts r15, r16, r17 ; prefetch_l3 r25 ; and r5, r6, r7 }
{ cmplts r15, r16, r17 ; prefetch_l3 r25 ; shl1add r5, r6, r7 }
{ cmplts r15, r16, r17 ; prefetch_l3_fault r25 ; mnz r5, r6, r7 }
{ cmplts r15, r16, r17 ; prefetch_l3_fault r25 ; xor r5, r6, r7 }
{ cmplts r15, r16, r17 ; rotl r5, r6, r7 ; ld r25, r26 }
{ cmplts r15, r16, r17 ; shl r5, r6, r7 ; ld1u r25, r26 }
{ cmplts r15, r16, r17 ; shl1addx r5, r6, r7 ; ld2s r25, r26 }
{ cmplts r15, r16, r17 ; shl2addx r5, r6, r7 ; ld4s r25, r26 }
{ cmplts r15, r16, r17 ; shl3addx r5, r6, r7 ; prefetch r25 }
{ cmplts r15, r16, r17 ; shrs r5, r6, r7 ; prefetch r25 }
{ cmplts r15, r16, r17 ; shru r5, r6, r7 ; prefetch_l1_fault r25 }
{ cmplts r15, r16, r17 ; st r25, r26 ; cmovnez r5, r6, r7 }
{ cmplts r15, r16, r17 ; st r25, r26 ; shl3add r5, r6, r7 }
{ cmplts r15, r16, r17 ; st1 r25, r26 ; mul_hu_hu r5, r6, r7 }
{ cmplts r15, r16, r17 ; st2 r25, r26 ; addx r5, r6, r7 }
{ cmplts r15, r16, r17 ; st2 r25, r26 ; rotli r5, r6, 5 }
{ cmplts r15, r16, r17 ; st4 r25, r26 ; fsingle_pack1 r5, r6 }
{ cmplts r15, r16, r17 ; st4 r25, r26 ; tblidxb2 r5, r6 }
{ cmplts r15, r16, r17 ; subx r5, r6, r7 ; st4 r25, r26 }
{ cmplts r15, r16, r17 ; tblidxb1 r5, r6 }
{ cmplts r15, r16, r17 ; v1addi r5, r6, 5 }
{ cmplts r15, r16, r17 ; v1shru r5, r6, r7 }
{ cmplts r15, r16, r17 ; v2shlsc r5, r6, r7 }
{ cmplts r5, r6, r7 ; add r15, r16, r17 ; ld1u r25, r26 }
{ cmplts r5, r6, r7 ; addx r15, r16, r17 ; ld2s r25, r26 }
{ cmplts r5, r6, r7 ; and r15, r16, r17 ; ld2s r25, r26 }
{ cmplts r5, r6, r7 ; cmpeq r15, r16, r17 ; ld4s r25, r26 }
{ cmplts r5, r6, r7 ; cmples r15, r16, r17 ; ld4s r25, r26 }
{ cmplts r5, r6, r7 ; cmplts r15, r16, r17 ; prefetch r25 }
{ cmplts r5, r6, r7 ; cmpltu r15, r16, r17 ; prefetch_l1_fault r25 }
{ cmplts r5, r6, r7 ; fetchand r15, r16, r17 }
{ cmplts r5, r6, r7 ; ill ; prefetch_l3_fault r25 }
{ cmplts r5, r6, r7 ; jalr r15 ; prefetch_l3 r25 }
{ cmplts r5, r6, r7 ; jr r15 ; st r25, r26 }
{ cmplts r5, r6, r7 ; ld r25, r26 ; ill }
{ cmplts r5, r6, r7 ; ld1s r25, r26 ; cmpeqi r15, r16, 5 }
{ cmplts r5, r6, r7 ; ld1s_add r15, r16, 5 }
{ cmplts r5, r6, r7 ; ld1u r25, r26 ; shli r15, r16, 5 }
{ cmplts r5, r6, r7 ; ld2s r25, r26 ; rotl r15, r16, r17 }
{ cmplts r5, r6, r7 ; ld2u r25, r26 ; jrp r15 }
{ cmplts r5, r6, r7 ; ld4s r25, r26 ; cmpltsi r15, r16, 5 }
{ cmplts r5, r6, r7 ; ld4u r25, r26 ; addx r15, r16, r17 }
{ cmplts r5, r6, r7 ; ld4u r25, r26 ; shrui r15, r16, 5 }
{ cmplts r5, r6, r7 ; lnk r15 ; st4 r25, r26 }
{ cmplts r5, r6, r7 ; move r15, r16 ; st4 r25, r26 }
{ cmplts r5, r6, r7 ; mz r15, r16, r17 ; st4 r25, r26 }
{ cmplts r5, r6, r7 ; or r15, r16, r17 ; ld r25, r26 }
{ cmplts r5, r6, r7 ; prefetch r25 ; jr r15 }
{ cmplts r5, r6, r7 ; prefetch_l1 r25 ; andi r15, r16, 5 }
{