| commit | 42019af621005a274d1a658f4c752a98fe5bab8e | [log] [tgz] |
|---|---|---|
| author | Luis Machado <luis.machado@arm.com> | Tue Apr 04 17:20:46 2023 +0100 |
| committer | Luis Machado <luis.machado@arm.com> | Wed Oct 04 16:23:40 2023 +0100 |
| tree | e1ffbb608ef942726edb6a813fde7c2b5f4ac384 | |
| parent | 6762e153a9e4e450b1a9904f9c96ec9f9b4cbc31 [diff] |
sme2: Enable SME2 for AArch64 gdb on Linux SME2 defines a new 512-bit register named ZT0, and it is only available if SME is also supported. The ZT0 state is valid only if the SVCR ZA bit is enabled. Otherwise its contents are empty (0). The target description is dynamic and gets generated at runtime based on the availability of the feature. Validated under Fast Models. Reviewed-by: Thiago Jung Bauermann <thiago.bauermann@linaro.org>