)]}'
{
  "commit": "4c337f2dd3df1f97d9dc17ace5708f5cdc4512dc",
  "tree": "6c91cd6023e585e830560f323112b2bc68652069",
  "parents": [
    "be2e4e65380f625f01648678798aaecf5a66bc48"
  ],
  "author": {
    "name": "Mike Frysinger",
    "email": "vapier@gentoo.org",
    "time": "Thu Dec 22 21:53:51 2022 -0500"
  },
  "committer": {
    "name": "Mike Frysinger",
    "email": "vapier@gentoo.org",
    "time": "Thu Dec 22 21:55:47 2022 -0500"
  },
  "message": "sim: mcore: replace custom \"word\" type with int32_t\n\nThis is a 32-bit architecture with 32-bit registers, so replace the\ncustom \"word\" long int typedef with an explicit int32_t.  This is\na correctness fix since long will be 64-bits on most 64-bit hosts.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "40bd77d850da7f0df4ddd77cf42e6f0b247eac6a",
      "old_mode": 33188,
      "old_path": "sim/mcore/interp.c",
      "new_id": "8465f56d2d7c043e572f8deb9f267db2d3ce2571",
      "new_mode": 33188,
      "new_path": "sim/mcore/interp.c"
    },
    {
      "type": "modify",
      "old_id": "23e7ae64b05c5f6cb6c8360611a69565cd86131b",
      "old_mode": 33188,
      "old_path": "sim/mcore/sim-main.h",
      "new_id": "7290e02131eca5d1dbeed22a4d876fa7803575dc",
      "new_mode": 33188,
      "new_path": "sim/mcore/sim-main.h"
    }
  ]
}