tree c1bd390a4f96d3ac0632de6ce917683fccf56667
parent 586c62819f6eb9a77978628afd53ba12c91a11e7
author Richard Sandiford <richard.sandiford@arm.com> 1680170951 +0100
committer Richard Sandiford <richard.sandiford@arm.com> 1680170951 +0100

aarch64: Add support for predicate-as-counter registers

SME2 adds a new format for the existing SVE predicate registers:
predicates as counters rather than predicates as masks.  In assembly
code, operands that interpret predicates as counters are written
pn<N> rather than p<N>.

This patch adds support for these registers and extends some
existing instructions to support them.  Since the new forms
are just a programmer convenience, there's no need to make them
more restrictive than the earlier predicate-as-mask forms.