opcodes: cris: move desc & opc files from sim/
All other cgen ports keep their generated desc & opc files under
opcodes/, so move the cris files over too. The cris-opc.c file,
while not generated, is already here to complement.
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 11896df..263529e 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,14 @@
+2021-05-24 Mike Frysinger <vapier@gentoo.org>
+
+ * Makefile.am (HFILES): Add cris-desc.h & cris-opc.h.
+ (TARGET_LIBOPCODES_CFILES): Add cris-desc.c.
+ (CGEN_CPUS): Add cris.
+ (CRIS_DEPS): Define.
+ (stamp-cris): New rule.
+ * cgen.sh: Handle desc action.
+ * configure.ac (bfd_cris_arch): Add cris-desc.lo.
+ * Makefile.in, configure: Regenerate.
+
2021-05-18 Job Noorman <mtvec@pm.me>
PR 27814
diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index 04980f3..ddae8bd 100644
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -60,6 +60,7 @@
HFILES = \
aarch64-asm.h aarch64-dis.h aarch64-opc.h aarch64-tbl.h \
bpf-desc.h bpf-opc.h \
+ cris-desc.h cris-opc.h \
epiphany-desc.h epiphany-opc.h \
fr30-desc.h fr30-opc.h \
frv-desc.h frv-opc.h \
@@ -108,6 +109,7 @@
cgen-opc.c \
cr16-dis.c \
cr16-opc.c \
+ cris-desc.c \
cris-dis.c \
cris-opc.c \
crx-dis.c \
@@ -371,10 +373,11 @@
$(CGENDIR)/opc-opinst.scm \
cgen-asm.in cgen-dis.in cgen-ibld.in
-CGEN_CPUS = epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt or1k xc16x xstormy16
+CGEN_CPUS = cris epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt or1k xc16x xstormy16
if CGEN_MAINT
BPF_DEPS = stamp-bpf
+CRIS_DEPS = stamp-cris
EPIPHANY_DEPS = stamp-epiphany
FR30_DEPS = stamp-fr30
FRV_DEPS = stamp-frv
@@ -390,6 +393,7 @@
XSTORMY16_DEPS = stamp-xstormy16
else
BPF_DEPS =
+CRIS_DEPS =
EPIPHANY_DEPS =
FR30_DEPS =
FRV_DEPS =
@@ -431,6 +435,15 @@
$(MAKE) run-cgen arch=bpf prefix=bpf \
archfile=$(CPUDIR)/bpf.cpu opcfile=$(CPUDIR)/bpf.opc
+$(srcdir)/cris-desc.h $(srcdir)/cris-desc.c $(srcdir)/cris-opc.h: $(CRIS_DEPS)
+ @true
+
+stamp-cris: $(CGENDEPS) $(CPUDIR)/cris.cpu
+ $(SHELL) $(srcdir)/cgen.sh desc $(srcdir) $(CGEN) \
+ $(CGENDIR) "$(CGENFLAGS)" cris cris $(CPUDIR)/cris.cpu /dev/null \
+ "$(options)" "$(extrafiles)"
+ touch $@
+
$(srcdir)/epiphany-desc.h $(srcdir)/epiphany-desc.c $(srcdir)/epiphany-opc.h \
$(srcdir)/epiphany-opc.c $(srcdir)/epiphany-ibld.c \
$(srcdir)/epiphany-opinst.c $(srcdir)/epiphany-asm.c \
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index b2965ba..23a52bc 100644
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -450,6 +450,7 @@
HFILES = \
aarch64-asm.h aarch64-dis.h aarch64-opc.h aarch64-tbl.h \
bpf-desc.h bpf-opc.h \
+ cris-desc.h cris-opc.h \
epiphany-desc.h epiphany-opc.h \
fr30-desc.h fr30-opc.h \
frv-desc.h frv-opc.h \
@@ -499,6 +500,7 @@
cgen-opc.c \
cr16-dis.c \
cr16-opc.c \
+ cris-desc.c \
cris-dis.c \
cris-opc.c \
crx-dis.c \
@@ -729,9 +731,11 @@
$(CGENDIR)/opc-opinst.scm \
cgen-asm.in cgen-dis.in cgen-ibld.in
-CGEN_CPUS = epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt or1k xc16x xstormy16
+CGEN_CPUS = cris epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt or1k xc16x xstormy16
@CGEN_MAINT_FALSE@BPF_DEPS =
@CGEN_MAINT_TRUE@BPF_DEPS = stamp-bpf
+@CGEN_MAINT_FALSE@CRIS_DEPS =
+@CGEN_MAINT_TRUE@CRIS_DEPS = stamp-cris
@CGEN_MAINT_FALSE@EPIPHANY_DEPS =
@CGEN_MAINT_TRUE@EPIPHANY_DEPS = stamp-epiphany
@CGEN_MAINT_FALSE@FR30_DEPS =
@@ -915,6 +919,7 @@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cgen-opc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cr16-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cr16-opc.Plo@am__quote@
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cris-desc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cris-dis.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cris-opc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/crx-dis.Plo@am__quote@
@@ -1417,6 +1422,15 @@
$(MAKE) run-cgen arch=bpf prefix=bpf \
archfile=$(CPUDIR)/bpf.cpu opcfile=$(CPUDIR)/bpf.opc
+$(srcdir)/cris-desc.h $(srcdir)/cris-desc.c $(srcdir)/cris-opc.h: $(CRIS_DEPS)
+ @true
+
+stamp-cris: $(CGENDEPS) $(CPUDIR)/cris.cpu
+ $(SHELL) $(srcdir)/cgen.sh desc $(srcdir) $(CGEN) \
+ $(CGENDIR) "$(CGENFLAGS)" cris cris $(CPUDIR)/cris.cpu /dev/null \
+ "$(options)" "$(extrafiles)"
+ touch $@
+
$(srcdir)/epiphany-desc.h $(srcdir)/epiphany-desc.c $(srcdir)/epiphany-opc.h \
$(srcdir)/epiphany-opc.c $(srcdir)/epiphany-ibld.c \
$(srcdir)/epiphany-opinst.c $(srcdir)/epiphany-asm.c \
diff --git a/opcodes/cgen.sh b/opcodes/cgen.sh
index bdcc56d..cf6a5f1 100644
--- a/opcodes/cgen.sh
+++ b/opcodes/cgen.sh
@@ -175,6 +175,40 @@
rm -f ${tmp}-asm.in1 ${tmp}-dis.in1
;;
+desc)
+ # For ports that only generate the desc module & opc header.
+ rm -f ${tmp}-desc.h1 ${tmp}-desc.h
+ rm -f ${tmp}-desc.c1 ${tmp}-desc.c
+ rm -f ${tmp}-opc.h1 ${tmp}-opc.h
+
+ ${cgen} ${cgendir}/cgen-opc.scm \
+ -s ${cgendir} \
+ ${cgenflags} \
+ -OPC ${opcfile} \
+ -f "${archflags}" \
+ -m all \
+ -a ${archfile} \
+ -i all \
+ -H ${tmp}-desc.h1 \
+ -C ${tmp}-desc.c1 \
+ -O ${tmp}-opc.h1
+
+ sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
+ -e "s/@prefix@/${prefix}/g" \
+ < ${tmp}-desc.h1 > ${tmp}-desc.h
+ ${rootdir}/move-if-change ${tmp}-desc.h ${srcdir}/${arch}-desc.h
+ sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
+ -e "s/@prefix@/${prefix}/g" \
+ < ${tmp}-desc.c1 > ${tmp}-desc.c
+ ${rootdir}/move-if-change ${tmp}-desc.c ${srcdir}/${arch}-desc.c
+ sed -e "s/@ARCH@/${ARCH}/g" -e "s/@arch@/${arch}/g" \
+ -e "s/@prefix@/${prefix}/g" \
+ < ${tmp}-opc.h1 > ${tmp}-opc.h
+ ${rootdir}/move-if-change ${tmp}-opc.h ${srcdir}/${arch}-opc.h
+
+ rm -f ${tmp}-desc.h1 ${tmp}-desc.c1 ${tmp}-opc.h1
+ ;;
+
*)
echo "$0: bad action: ${action}" >&2
exit 1
diff --git a/opcodes/configure b/opcodes/configure
index 922a939..470231e 100755
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -12216,7 +12216,7 @@
bfd_avr_arch) ta="$ta avr-dis.lo" ;;
bfd_bfin_arch) ta="$ta bfin-dis.lo" ;;
bfd_cr16_arch) ta="$ta cr16-dis.lo cr16-opc.lo" ;;
- bfd_cris_arch) ta="$ta cris-dis.lo cris-opc.lo cgen-bitset.lo" ;;
+ bfd_cris_arch) ta="$ta cris-desc.lo cris-dis.lo cris-opc.lo cgen-bitset.lo" ;;
bfd_crx_arch) ta="$ta crx-dis.lo crx-opc.lo" ;;
bfd_csky_arch) ta="$ta csky-dis.lo" ;;
bfd_d10v_arch) ta="$ta d10v-dis.lo d10v-opc.lo" ;;
diff --git a/opcodes/configure.ac b/opcodes/configure.ac
index 911c9c6..e564f06 100644
--- a/opcodes/configure.ac
+++ b/opcodes/configure.ac
@@ -277,7 +277,7 @@
bfd_avr_arch) ta="$ta avr-dis.lo" ;;
bfd_bfin_arch) ta="$ta bfin-dis.lo" ;;
bfd_cr16_arch) ta="$ta cr16-dis.lo cr16-opc.lo" ;;
- bfd_cris_arch) ta="$ta cris-dis.lo cris-opc.lo cgen-bitset.lo" ;;
+ bfd_cris_arch) ta="$ta cris-desc.lo cris-dis.lo cris-opc.lo cgen-bitset.lo" ;;
bfd_crx_arch) ta="$ta crx-dis.lo crx-opc.lo" ;;
bfd_csky_arch) ta="$ta csky-dis.lo" ;;
bfd_d10v_arch) ta="$ta d10v-dis.lo d10v-opc.lo" ;;
diff --git a/sim/cris/cris-desc.c b/opcodes/cris-desc.c
similarity index 100%
rename from sim/cris/cris-desc.c
rename to opcodes/cris-desc.c
diff --git a/sim/cris/cris-desc.h b/opcodes/cris-desc.h
similarity index 100%
rename from sim/cris/cris-desc.h
rename to opcodes/cris-desc.h
diff --git a/sim/cris/cris-opc.h b/opcodes/cris-opc.h
similarity index 100%
rename from sim/cris/cris-opc.h
rename to opcodes/cris-opc.h
diff --git a/sim/cris/ChangeLog b/sim/cris/ChangeLog
index 4e7b919..5482e08 100644
--- a/sim/cris/ChangeLog
+++ b/sim/cris/ChangeLog
@@ -1,3 +1,12 @@
+2021-05-24 Mike Frysinger <vapier@gentoo.org>
+
+ * cris-desc.c, cris-desc.h, cris-opc.h: Moved to opcodes/.
+ * Makefile.in (SIM_OBJS): Delete cris-desc.o.
+ (SIM_EXTRA_DEPS): Delete cris-desc.h.
+ (cris-clean): Delete stamp-desc.
+ (stamps): Likewise.
+ (stamp-desc): Delete rule.
+
2021-05-23 Mike Frysinger <vapier@gentoo.org>
* sim-if.c (sim_open): Delete "x" after PRI macros.
diff --git a/sim/cris/Makefile.in b/sim/cris/Makefile.in
index 3dcdbb2..d5e8a88 100644
--- a/sim/cris/Makefile.in
+++ b/sim/cris/Makefile.in
@@ -29,14 +29,13 @@
sim-if.o arch.o \
$(CRISV10F_OBJS) \
$(CRISV32F_OBJS) \
- traps.o \
- cris-desc.o
+ traps.o
# Extra headers included by sim-main.h.
# FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS.
SIM_EXTRA_DEPS = \
$(CGEN_INCLUDE_DEPS) $(srccom)/cgen-ops.h \
- arch.h cpuall.h cris-sim.h cris-desc.h engv10.h engv32.h
+ arch.h cpuall.h cris-sim.h engv10.h engv32.h
SIM_EXTRA_CLEAN = cris-clean
@@ -97,7 +96,7 @@
rm -f mloopv$${v}f.c engv$${v}.h stamp-v$${v}fmloop; \
rm -f stamp-v$${v}fcpu; \
done
- -rm -f stamp-arch stamp-desc
+ -rm -f stamp-arch
-rm -f tmp-*
# cgen support, enable with --enable-cgen-maint
@@ -106,7 +105,7 @@
@CGEN_MAINT@CGEN_MAINT =
# Useful when making CGEN-generated files manually, without --enable-cgen-maint.
-stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc
+stamps: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu
stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/cris.cpu Makefile
$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=crisv10,crisv32 \
@@ -135,10 +134,3 @@
mv decodev32.c.tmp $(srcdir)/decodev32.c
touch stamp-v32fcpu
cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h: $(CGEN_MAINT) stamp-v32fcpu
-
-stamp-desc: $(CGEN_READ_SCM) $(CGEN_DESC_SCM) $(CPU_DIR)/cris.cpu Makefile
- $(MAKE) cgen-desc $(CGEN_FLAGS_TO_PASS) \
- archfile=$(CPU_DIR)/cris.cpu \
- cpu=cris mach=all
- touch stamp-desc
-cris-desc.c cris-desc.h cris-opc.h: $(CGEN_MAINT) stamp-desc
