tree 08a1659e6fd20bf694e567e54bc08df8e066f3b0
parent 8acbe8ffa02f62eb9371b8626576f83fcd6989af
author Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com> 1543858304 +0000
committer Richard Earnshaw <Richard.Earnshaw@arm.com> 1543858473 +0000

[aarch64] - Only use MOV for disassembly when shifter op is LSL #0

ARM Architecture Reference Manual for the profile ARMv8-A, Issue C.a,
states that MOV (register) is an alias of the ORR (shifted register)
iff shift == '00' && imm6 == '000000' && Rn == '11111'.  However, mov
is currently preferred for a broader range of orr instructions, which
is incorrect.

2018-12-03  Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com>

opcodes:
	PR 23193
        PR 19721
        * aarch64-tbl.h (aarch64_opcode_table): Only disassemble an ORR
	encoding as MOV if the shift operation is a left shift of zero.

gas:
	PR 23193
	PR 19721
	* testsuite/gas/aarch64/pr19721.s: Add new test cases.
	* testsuite/gas/aarch64/pr19721.d: Correct existing test
	cases and add new ones.