)]}'
{
  "commit": "5abb5d3f67d6469cbb21978df09187f1ae93f5ea",
  "tree": "51c95396255e9c45b881db9eec885112fd1058fd",
  "parents": [
    "61a457e5da46bad626bc3b6985a58fb5ae41842d"
  ],
  "author": {
    "name": "Alan Modra",
    "email": "amodra@gmail.com",
    "time": "Thu Oct 13 16:10:15 2022 +1030"
  },
  "committer": {
    "name": "Alan Modra",
    "email": "amodra@gmail.com",
    "time": "Fri Oct 14 22:07:18 2022 +1030"
  },
  "message": "PowerPC SPE disassembly and tests\n\nWhere sub and subf forms of an instruction exist we generally\ndisassemble to the extended insn sub form rather than the underlying\nmachine subf instruction.  Do so for SPE evsubw and evsubiw too.\n\nspe_ambiguous.d always was a bit too optimistic.  There is no sensible\nway to disassemble identical bytes back to different and original\nsource.  Instead change the test to check -Mraw results.\n\ngas/\n\t* testsuite/gas/ppc/ppc.exp: Run spe_ambiguous test.\n\t* testsuite/gas/ppc/spe.d: Expect evsubw and evsubiw rather than\n\tevsubfw and evsubifw.\n\t* testsuite/gas/ppc/spe_ambiguous.s: Test evnor form equivalent\n\tto evnot.\n\t* testsuite/gas/ppc/spe_ambiguous.d: Test Mraw.\nopcodes/\n\t* ppc-opc.c (powerpc_opcodes): Move evsubw before evsubfw and\n\tevsubiw before evsubifw and mark EXT.\n",
  "tree_diff": [
    {
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    {
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      "old_mode": 33188,
      "old_path": "opcodes/ppc-opc.c",
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}