)]}'
{
  "commit": "5fbe0f28ae6dec9736e504cf79cdb76a9fa09dc9",
  "tree": "d450d20185ff54500524e11e6fd4c8d1928f298b",
  "parents": [
    "eb34d29be8766b7466becebdd94e8121e88a44d4"
  ],
  "author": {
    "name": "Jan Beulich",
    "email": "jbeulich@suse.com",
    "time": "Thu Jul 22 13:09:21 2021 +0200"
  },
  "committer": {
    "name": "Jan Beulich",
    "email": "jbeulich@suse.com",
    "time": "Thu Jul 22 13:09:21 2021 +0200"
  },
  "message": "x86: drop dq{b,d}_mode\n\nTheir sole use is for {,V}EXTRACTPS / {,V}P{EXT,INS}RB respectively; for\nconsistency also limit use of dqw_mode to Jdqw. 64-bit disassembly\nreflecting REX.W / VEX.W is not in line with the assembler\u0027s opcode\ntable having NoRex64 / VexWIG in all respective templates, i.e. assembly\ninput isn\u0027t being honored there either. Obviously the 0FC5 encodings of\n{,V}PEXTRW then also need adjustment for consistency reasons.\n",
  "tree_diff": [
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      "new_mode": 33188,
      "new_path": "gas/testsuite/gas/i386/x86-64-avx-wig.d"
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}