RISC-V: Add support for ssdbltrp and smdbltrp extension.
This implements the ssdbltrp extensons, version 1.0[1] and the smdbltrp
extensions, version1.0[2].
[1] https://github.com/riscv/riscv-isa-manual/blob/main/src/ssdbltrp.adoc
[2] https://github.com/riscv/riscv-isa-manual/blob/main/src/smdbltrp.adoc
bfd/ChangeLog:
* elfxx-riscv.c: Add 'ssdbltrp' and 'smdbltrp' to the list of konwn
standard extensions.
gas/ChangeLog:
* NEWS: Updated.
* testsuite/gas/riscv/imply.d: Ditto.
* testsuite/gas/riscv/imply.s: Ditto.
* testsuite/gas/riscv/march-help.l: Ditto.
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 45da83e..a6511f6 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1262,6 +1262,7 @@
{"smcntrpmf", "+zicsr", check_implicit_always},
{"smstateen", "+ssstateen", check_implicit_always},
{"smepmp", "+zicsr", check_implicit_always},
+ {"smdbltrp", "+zicsr", check_implicit_always},
{"ssaia", "+zicsr", check_implicit_always},
{"sscsrind", "+zicsr", check_implicit_always},
@@ -1272,6 +1273,7 @@
{"sstvala", "+zicsr", check_implicit_always},
{"sstvecd", "+zicsr", check_implicit_always},
{"ssu64xl", "+zicsr", check_implicit_always},
+ {"ssdbltrp", "+zicsr", check_implicit_always},
{"svade", "+zicsr", check_implicit_always},
{"svadu", "+zicsr", check_implicit_always},
@@ -1448,6 +1450,7 @@
{"smepmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smrnmi", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
+ {"smdbltrp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ssaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ssccptr", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"sscsrind", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
@@ -1458,6 +1461,7 @@
{"sstvala", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"sstvecd", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ssu64xl", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
+ {"ssdbltrp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"svade", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"svadu", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"svbare", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
diff --git a/gas/NEWS b/gas/NEWS
index 23eda33..269b63e 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -9,8 +9,8 @@
* On x86 emulation support (for secondary targets) was dropped.
-* Add support for RISC-V Zcmp (cm.mva01s, cm.mvsa01), Smrnmi, CORE-V
- (xcvbitmanip, xcvsimd) extensions with version 1.0 and more SiFive
+* Add support for RISC-V Zcmp (cm.mva01s, cm.mvsa01), Smrnmi, S[sm]dbltrp,
+ CORE-V (xcvbitmanip, xcvsimd) extensions with version 1.0 and more SiFive
extensions (xsfvqmaccdod, xsfvqmaccqoq and xsfvfnrclipxfqf).
Changes in 2.43:
diff --git a/gas/testsuite/gas/riscv/imply.d b/gas/testsuite/gas/riscv/imply.d
index 26eff8c..474694d 100644
--- a/gas/testsuite/gas/riscv/imply.d
+++ b/gas/testsuite/gas/riscv/imply.d
@@ -80,6 +80,7 @@
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smcntrpmf1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smstateen1p0_ssstateen1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smepmp1p0
+[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_smdbltrp1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_ssaia1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sscsrind1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sscofpmf1p0
@@ -89,6 +90,7 @@
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sstvala1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_sstvecd1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_ssu64xl1p0
+[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_ssdbltrp1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_svade1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_svadu1p0
[0-9a-f]+ l .text 0+000 \$xrv32i2p1_zicsr2p0_svbare1p0
diff --git a/gas/testsuite/gas/riscv/imply.s b/gas/testsuite/gas/riscv/imply.s
index dabb08d..790c6f3 100644
--- a/gas/testsuite/gas/riscv/imply.s
+++ b/gas/testsuite/gas/riscv/imply.s
@@ -90,6 +90,8 @@
imply smcntrpmf
imply smstateen
imply smepmp
+imply smdbltrp
+
imply ssaia
imply sscsrind
imply sscofpmf
@@ -99,6 +101,7 @@
imply sstvala
imply sstvecd
imply ssu64xl
+imply ssdbltrp
imply svade
imply svadu
diff --git a/gas/testsuite/gas/riscv/march-help.l b/gas/testsuite/gas/riscv/march-help.l
index 71cccb7..fd11740 100644
--- a/gas/testsuite/gas/riscv/march-help.l
+++ b/gas/testsuite/gas/riscv/march-help.l
@@ -117,6 +117,7 @@
smepmp 1.0
smrnmi 1.0
smstateen 1.0
+ smdbltrp 1.0
ssaia 1.0
ssccptr 1.0
sscsrind 1.0
@@ -127,6 +128,7 @@
sstvala 1.0
sstvecd 1.0
ssu64xl 1.0
+ ssdbltrp 1.0
svade 1.0
svadu 1.0
svbare 1.0
