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gnu / binutils-gdb / 746723ba6c1b36d6ec88de3f772a80a8d2de6e4d / . / gas / config / tc-score7.c
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/* tc-score7.c -- Assembler for Score7
Copyright (C) 2009-2021 Free Software Foundation, Inc.
Contributed by:
Brain.lin (brain.lin@sunplusct.com)
Mei Ligang (ligang@sunnorth.com.cn)
Pei-Lin Tsai (pltsai@sunplus.com)
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "as.h"
#include "config.h"
#include "subsegs.h"
#include "safe-ctype.h"
#include "opcode/score-inst.h"
#include "libiberty.h"
#ifdef OBJ_ELF
#include "elf/score.h"
#include "dwarf2dbg.h"
#endif
static void s7_do_ldst_insn (char *);
static void s7_do_crdcrscrsimm5 (char *);
static void s7_do_ldst_unalign (char *);
static void s7_do_ldst_atomic (char *);
static void s7_do_ldst_cop (char *);
static void s7_do_macro_li_rdi32 (char *);
static void s7_do_macro_la_rdi32 (char *);
static void s7_do_macro_rdi32hi (char *);
static void s7_do_macro_rdi32lo (char *);
static void s7_do_macro_mul_rdrsrs (char *);
static void s7_do_macro_ldst_label (char *);
static void s7_do_branch (char *);
static void s7_do_jump (char *);
static void s7_do_empty (char *);
static void s7_do_rdrsrs (char *);
static void s7_do_rdsi16 (char *);
static void s7_do_rdrssi14 (char *);
static void s7_do_sub_rdsi16 (char *);
static void s7_do_sub_rdrssi14 (char *);
static void s7_do_rdrsi5 (char *);
static void s7_do_rdrsi14 (char *);
static void s7_do_rdi16 (char *);
static void s7_do_xrsi5 (char *);
static void s7_do_rdrs (char *);
static void s7_do_rdxrs (char *);
static void s7_do_rsrs (char *);
static void s7_do_rdcrs (char *);
static void s7_do_rdsrs (char *);
static void s7_do_rd (char *);
static void s7_do_rs (char *);
static void s7_do_i15 (char *);
static void s7_do_xi5x (char *);
static void s7_do_ceinst (char *);
static void s7_do_cache (char *);
static void s7_do16_rdrs (char *);
static void s7_do16_rs (char *);
static void s7_do16_xrs (char *);
static void s7_do16_mv_rdrs (char *);
static void s7_do16_hrdrs (char *);
static void s7_do16_rdhrs (char *);
static void s7_do16_rdi4 (char *);
static void s7_do16_rdi5 (char *);
static void s7_do16_xi5 (char *);
static void s7_do16_ldst_insn (char *);
static void s7_do16_ldst_imm_insn (char *);
static void s7_do16_push_pop (char *);
static void s7_do16_branch (char *);
static void s7_do16_jump (char *);
static void s7_do_rdi16_pic (char *);
static void s7_do_addi_s_pic (char *);
static void s7_do_addi_u_pic (char *);
static void s7_do_lw_pic (char *);
#define s7_GP 28
#define s7_PIC_CALL_REG 29
#define s7_MAX_LITERAL_POOL_SIZE 1024
#define s7_FAIL 0x80000000
#define s7_SUCCESS 0
#define s7_INSN_SIZE 4
#define s7_INSN16_SIZE 2
#define s7_RELAX_INST_NUM 3
/* For score5u : div/mul will pop warning message, mmu/alw/asw will pop error message. */
#define s7_BAD_ARGS _("bad arguments to instruction")
#define s7_ERR_FOR_SCORE5U_MUL_DIV _("div / mul are reserved instructions")
#define s7_ERR_FOR_SCORE5U_MMU _("This architecture doesn't support mmu")
#define s7_ERR_FOR_SCORE5U_ATOMIC _("This architecture doesn't support atomic instruction")
#define s7_BAD_SKIP_COMMA s7_BAD_ARGS
#define s7_BAD_GARBAGE _("garbage following instruction");
#define s7_skip_whitespace(str) while (*(str) == ' ') ++(str)
/* The name of the readonly data section. */
#define s7_RDATA_SECTION_NAME (OUTPUT_FLAVOR == bfd_target_aout_flavour \
? ".data" \
: OUTPUT_FLAVOR == bfd_target_ecoff_flavour \
? ".rdata" \
: OUTPUT_FLAVOR == bfd_target_coff_flavour \
? ".rdata" \
: OUTPUT_FLAVOR == bfd_target_elf_flavour \
? ".rodata" \
: (abort (), ""))
#define s7_RELAX_ENCODE(old, new, type, reloc1, reloc2, opt) \
((relax_substateT) \
(((old) << 23) \
| ((new) << 16) \
| ((type) << 9) \
| ((reloc1) << 5) \
| ((reloc2) << 1) \
| ((opt) ? 1 : 0)))
#define s7_RELAX_OLD(i) (((i) >> 23) & 0x7f)
#define s7_RELAX_NEW(i) (((i) >> 16) & 0x7f)
#define s7_RELAX_TYPE(i) (((i) >> 9) & 0x7f)
#define s7_RELAX_RELOC1(i) ((valueT) ((i) >> 5) & 0xf)
#define s7_RELAX_RELOC2(i) ((valueT) ((i) >> 1) & 0xf)
#define s7_RELAX_OPT(i) ((i) & 1)
#define s7_RELAX_OPT_CLEAR(i) ((i) & ~1)
#define s7_SET_INSN_ERROR(s) (s7_inst.error = (s))
#define s7_INSN_IS_PCE_P(s) (strstr (str, "||") != NULL)
#define s7_GET_INSN_CLASS(type) (s7_get_insn_class_from_type (type))
#define s7_GET_INSN_SIZE(type) ((s7_GET_INSN_CLASS (type) == INSN_CLASS_16) \
? s7_INSN16_SIZE : s7_INSN_SIZE)
#define s7_INSN_NAME_LEN 16
/* Relax will need some padding for alignment. */
#define s7_RELAX_PAD_BYTE 3
#define s7_USE_GLOBAL_POINTER_OPT 1
/* Enumeration matching entries in table above. */
enum s7_score_reg_type
{
s7_REG_TYPE_SCORE = 0,
#define REG_TYPE_FIRST s7_REG_TYPE_SCORE
s7_REG_TYPE_SCORE_SR = 1,
s7_REG_TYPE_SCORE_CR = 2,
s7_REG_TYPE_MAX = 3
};
enum s7_score_pic_level
{
s7_NO_PIC,
s7_PIC
};
static enum s7_score_pic_level s7_score_pic = s7_NO_PIC;
enum s7_insn_type_for_dependency
{
s7_D_pce,
s7_D_cond_br,
s7_D_cond_mv,
s7_D_cached,
s7_D_cachei,
s7_D_ldst,
s7_D_ldcombine,
s7_D_mtcr,
s7_D_mfcr,
s7_D_mfsr,
s7_D_mftlb,
s7_D_mtptlb,
s7_D_mtrtlb,
s7_D_stlb,
s7_D_all_insn
};
struct s7_insn_to_dependency
{
const char *insn_name;
enum s7_insn_type_for_dependency type;
};
struct s7_data_dependency
{
enum s7_insn_type_for_dependency pre_insn_type;
char pre_reg[6];
enum s7_insn_type_for_dependency cur_insn_type;
char cur_reg[6];
int bubblenum_7;
int bubblenum_5;
int warn_or_error; /* warning - 0; error - 1 */
};
static const struct s7_insn_to_dependency s7_insn_to_dependency_table[] =
{
/* pce instruction. */
{"pce", s7_D_pce},
/* conditional branch instruction. */
{"bcs", s7_D_cond_br},
{"bcc", s7_D_cond_br},
{"bgtu", s7_D_cond_br},
{"bleu", s7_D_cond_br},
{"beq", s7_D_cond_br},
{"bne", s7_D_cond_br},
{"bgt", s7_D_cond_br},
{"ble", s7_D_cond_br},
{"bge", s7_D_cond_br},
{"blt", s7_D_cond_br},
{"bmi", s7_D_cond_br},
{"bpl", s7_D_cond_br},
{"bvs", s7_D_cond_br},
{"bvc", s7_D_cond_br},
{"bcsl", s7_D_cond_br},
{"bccl", s7_D_cond_br},
{"bgtul", s7_D_cond_br},
{"bleul", s7_D_cond_br},
{"beql", s7_D_cond_br},
{"bnel", s7_D_cond_br},
{"bgtl", s7_D_cond_br},
{"blel", s7_D_cond_br},
{"bgel", s7_D_cond_br},
{"bltl", s7_D_cond_br},
{"bmil", s7_D_cond_br},
{"bpll", s7_D_cond_br},
{"bvsl", s7_D_cond_br},
{"bvcl", s7_D_cond_br},
{"bcs!", s7_D_cond_br},
{"bcc!", s7_D_cond_br},
{"bgtu!", s7_D_cond_br},
{"bleu!", s7_D_cond_br},
{"beq!", s7_D_cond_br},
{"bne!", s7_D_cond_br},
{"bgt!", s7_D_cond_br},
{"ble!", s7_D_cond_br},
{"bge!", s7_D_cond_br},
{"blt!", s7_D_cond_br},
{"bmi!", s7_D_cond_br},
{"bpl!", s7_D_cond_br},
{"bvs!", s7_D_cond_br},
{"bvc!", s7_D_cond_br},
{"brcs", s7_D_cond_br},
{"brcc", s7_D_cond_br},
{"brgtu", s7_D_cond_br},
{"brleu", s7_D_cond_br},
{"breq", s7_D_cond_br},
{"brne", s7_D_cond_br},
{"brgt", s7_D_cond_br},
{"brle", s7_D_cond_br},
{"brge", s7_D_cond_br},
{"brlt", s7_D_cond_br},
{"brmi", s7_D_cond_br},
{"brpl", s7_D_cond_br},
{"brvs", s7_D_cond_br},
{"brvc", s7_D_cond_br},
{"brcsl", s7_D_cond_br},
{"brccl", s7_D_cond_br},
{"brgtul", s7_D_cond_br},
{"brleul", s7_D_cond_br},
{"breql", s7_D_cond_br},
{"brnel", s7_D_cond_br},
{"brgtl", s7_D_cond_br},
{"brlel", s7_D_cond_br},
{"brgel", s7_D_cond_br},
{"brltl", s7_D_cond_br},
{"brmil", s7_D_cond_br},
{"brpll", s7_D_cond_br},
{"brvsl", s7_D_cond_br},
{"brvcl", s7_D_cond_br},
{"brcs!", s7_D_cond_br},
{"brcc!", s7_D_cond_br},
{"brgtu!", s7_D_cond_br},
{"brleu!", s7_D_cond_br},
{"breq!", s7_D_cond_br},
{"brne!", s7_D_cond_br},
{"brgt!", s7_D_cond_br},
{"brle!", s7_D_cond_br},
{"brge!", s7_D_cond_br},
{"brlt!", s7_D_cond_br},
{"brmi!", s7_D_cond_br},
{"brpl!", s7_D_cond_br},
{"brvs!", s7_D_cond_br},
{"brvc!", s7_D_cond_br},
{"brcsl!", s7_D_cond_br},
{"brccl!", s7_D_cond_br},
{"brgtul!", s7_D_cond_br},
{"brleul!", s7_D_cond_br},
{"breql!", s7_D_cond_br},
{"brnel!", s7_D_cond_br},
{"brgtl!", s7_D_cond_br},
{"brlel!", s7_D_cond_br},
{"brgel!", s7_D_cond_br},
{"brltl!", s7_D_cond_br},
{"brmil!", s7_D_cond_br},
{"brpll!", s7_D_cond_br},
{"brvsl!", s7_D_cond_br},
{"brvcl!", s7_D_cond_br},
/* conditional move instruction. */
{"mvcs", s7_D_cond_mv},
{"mvcc", s7_D_cond_mv},
{"mvgtu", s7_D_cond_mv},
{"mvleu", s7_D_cond_mv},
{"mveq", s7_D_cond_mv},
{"mvne", s7_D_cond_mv},
{"mvgt", s7_D_cond_mv},
{"mvle", s7_D_cond_mv},
{"mvge", s7_D_cond_mv},
{"mvlt", s7_D_cond_mv},
{"mvmi", s7_D_cond_mv},
{"mvpl", s7_D_cond_mv},
{"mvvs", s7_D_cond_mv},
{"mvvc", s7_D_cond_mv},
/* move special instruction. */
{"mtcr", s7_D_mtcr},
{"mftlb", s7_D_mftlb},
{"mtptlb", s7_D_mtptlb},
{"mtrtlb", s7_D_mtrtlb},
{"stlb", s7_D_stlb},
{"mfcr", s7_D_mfcr},
{"mfsr", s7_D_mfsr},
/* cache instruction. */
{"cache 8", s7_D_cached},
{"cache 9", s7_D_cached},
{"cache 10", s7_D_cached},
{"cache 11", s7_D_cached},
{"cache 12", s7_D_cached},
{"cache 13", s7_D_cached},
{"cache 14", s7_D_cached},
{"cache 24", s7_D_cached},
{"cache 26", s7_D_cached},
{"cache 27", s7_D_cached},
{"cache 29", s7_D_cached},
{"cache 30", s7_D_cached},
{"cache 31", s7_D_cached},
{"cache 0", s7_D_cachei},
{"cache 1", s7_D_cachei},
{"cache 2", s7_D_cachei},
{"cache 3", s7_D_cachei},
{"cache 4", s7_D_cachei},
{"cache 16", s7_D_cachei},
{"cache 17", s7_D_cachei},
/* load/store instruction. */
{"lb", s7_D_ldst},
{"lbu", s7_D_ldst},
{"lbu!", s7_D_ldst},
{"lbup!", s7_D_ldst},
{"lh", s7_D_ldst},
{"lhu", s7_D_ldst},
{"lh!", s7_D_ldst},
{"lhp!", s7_D_ldst},
{"lw", s7_D_ldst},
{"lw!", s7_D_ldst},
{"lwp!", s7_D_ldst},
{"sb", s7_D_ldst},
{"sb!", s7_D_ldst},
{"sbp!", s7_D_ldst},
{"sh", s7_D_ldst},
{"sh!", s7_D_ldst},
{"shp!", s7_D_ldst},
{"sw", s7_D_ldst},
{"sw!", s7_D_ldst},
{"swp!", s7_D_ldst},
{"alw", s7_D_ldst},
{"asw", s7_D_ldst},
{"push!", s7_D_ldst},
{"pushhi!", s7_D_ldst},
{"pop!", s7_D_ldst},
{"pophi!", s7_D_ldst},
{"ldc1", s7_D_ldst},
{"ldc2", s7_D_ldst},
{"ldc3", s7_D_ldst},
{"stc1", s7_D_ldst},
{"stc2", s7_D_ldst},
{"stc3", s7_D_ldst},
{"scb", s7_D_ldst},
{"scw", s7_D_ldst},
{"sce", s7_D_ldst},
/* load combine instruction. */
{"lcb", s7_D_ldcombine},
{"lcw", s7_D_ldcombine},
{"lce", s7_D_ldcombine},
};
static const struct s7_data_dependency s7_data_dependency_table[] =
{
/* Condition register. */
{s7_D_mtcr, "cr1", s7_D_pce, "", 2, 1, 0},
{s7_D_mtcr, "cr1", s7_D_cond_br, "", 1, 0, 1},
{s7_D_mtcr, "cr1", s7_D_cond_mv, "", 1, 0, 1},
/* Status register. */
{s7_D_mtcr, "cr0", s7_D_all_insn, "", 5, 4, 0},
/* CCR register. */
{s7_D_mtcr, "cr4", s7_D_all_insn, "", 6, 5, 0},
/* EntryHi/EntryLo register. */
{s7_D_mftlb, "", s7_D_mtptlb, "", 1, 1, 1},
{s7_D_mftlb, "", s7_D_mtrtlb, "", 1, 1, 1},
{s7_D_mftlb, "", s7_D_stlb, "", 1, 1,1},
{s7_D_mftlb, "", s7_D_mfcr, "cr11", 1, 1, 1},
{s7_D_mftlb, "", s7_D_mfcr, "cr12", 1, 1, 1},
/* Index register. */
{s7_D_stlb, "", s7_D_mtptlb, "", 1, 1, 1},
{s7_D_stlb, "", s7_D_mftlb, "", 1, 1, 1},
{s7_D_stlb, "", s7_D_mfcr, "cr8", 2, 2, 1},
/* Cache. */
{s7_D_cached, "", s7_D_ldst, "", 1, 1, 0},
{s7_D_cached, "", s7_D_ldcombine, "", 1, 1, 0},
{s7_D_cachei, "", s7_D_all_insn, "", 5, 4, 0},
/* Load combine. */
{s7_D_ldcombine, "", s7_D_mfsr, "sr1", 3, 3, 1},
};
/* Used to contain constructed error messages. */
static char s7_err_msg[255];
static int s7_fix_data_dependency = 0;
static int s7_warn_fix_data_dependency = 1;
static int s7_in_my_get_expression = 0;
/* Default, pop warning message when using r1. */
static int s7_nor1 = 1;
/* Default will do instruction relax, -O0 will set s7_g_opt = 0. */
static unsigned int s7_g_opt = 1;
/* The size of the small data section. */
static unsigned int s7_g_switch_value = 8;
static segT s7_pdr_seg;
struct s7_score_it
{
char name[s7_INSN_NAME_LEN];
unsigned long instruction;
unsigned long relax_inst;
int size;
int relax_size;
enum score_insn_type type;
char str[s7_MAX_LITERAL_POOL_SIZE];
const char *error;
int bwarn;
char reg[s7_INSN_NAME_LEN];
struct
{
bfd_reloc_code_real_type type;
expressionS exp;
int pc_rel;
}reloc;
};
static struct s7_score_it s7_inst;
typedef struct proc
{
symbolS *isym;
unsigned long reg_mask;
unsigned long reg_offset;
unsigned long fpreg_mask;
unsigned long leaf;
unsigned long frame_offset;
unsigned long frame_reg;
unsigned long pc_reg;
} s7_procS;
static s7_procS s7_cur_proc;
static s7_procS *s7_cur_proc_ptr;
static int s7_numprocs;
/* Structure for a hash table entry for a register. */
struct s7_reg_entry
{
const char *name;
int number;
};
static const struct s7_reg_entry s7_score_rn_table[] =
{
{"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3},
{"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7},
{"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11},
{"r12", 12}, {"r13", 13}, {"r14", 14}, {"r15", 15},
{"r16", 16}, {"r17", 17}, {"r18", 18}, {"r19", 19},
{"r20", 20}, {"r21", 21}, {"r22", 22}, {"r23", 23},
{"r24", 24}, {"r25", 25}, {"r26", 26}, {"r27", 27},
{"r28", 28}, {"r29", 29}, {"r30", 30}, {"r31", 31},
{NULL, 0}
};
static const struct s7_reg_entry s7_score_srn_table[] =
{
{"sr0", 0}, {"sr1", 1}, {"sr2", 2},
{NULL, 0}
};
static const struct s7_reg_entry s7_score_crn_table[] =
{
{"cr0", 0}, {"cr1", 1}, {"cr2", 2}, {"cr3", 3},
{"cr4", 4}, {"cr5", 5}, {"cr6", 6}, {"cr7", 7},
{"cr8", 8}, {"cr9", 9}, {"cr10", 10}, {"cr11", 11},
{"cr12", 12}, {"cr13", 13}, {"cr14", 14}, {"cr15", 15},
{"cr16", 16}, {"cr17", 17}, {"cr18", 18}, {"cr19", 19},
{"cr20", 20}, {"cr21", 21}, {"cr22", 22}, {"cr23", 23},
{"cr24", 24}, {"cr25", 25}, {"cr26", 26}, {"cr27", 27},
{"cr28", 28}, {"cr29", 29}, {"cr30", 30}, {"cr31", 31},
{NULL, 0}
};
struct s7_reg_map
{
const struct s7_reg_entry *names;
int max_regno;
htab_t htab;
const char *expected;
};
static struct s7_reg_map s7_all_reg_maps[] =
{
{s7_score_rn_table, 31, NULL, N_("S+core register expected")},
{s7_score_srn_table, 2, NULL, N_("S+core special-register expected")},
{s7_score_crn_table, 31, NULL, N_("S+core co-processor register expected")},
};
static htab_t s7_score_ops_hsh = NULL;
static htab_t s7_dependency_insn_hsh = NULL;
struct s7_datafield_range
{
int data_type;
int bits;
int range[2];
};
static struct s7_datafield_range s7_score_df_range[] =
{
{_IMM4, 4, {0, (1 << 4) - 1}}, /* ( 0 ~ 15 ) */
{_IMM5, 5, {0, (1 << 5) - 1}}, /* ( 0 ~ 31 ) */
{_IMM8, 8, {0, (1 << 8) - 1}}, /* ( 0 ~ 255 ) */
{_IMM14, 14, {0, (1 << 14) - 1}}, /* ( 0 ~ 16383) */
{_IMM15, 15, {0, (1 << 15) - 1}}, /* ( 0 ~ 32767) */
{_IMM16, 16, {0, (1 << 16) - 1}}, /* ( 0 ~ 65535) */
{_SIMM10, 10, {-(1 << 9), (1 << 9) - 1}}, /* ( -512 ~ 511 ) */
{_SIMM12, 12, {-(1 << 11), (1 << 11) - 1}}, /* ( -2048 ~ 2047 ) */
{_SIMM14, 14, {-(1 << 13), (1 << 13) - 1}}, /* ( -8192 ~ 8191 ) */
{_SIMM15, 15, {-(1 << 14), (1 << 14) - 1}}, /* (-16384 ~ 16383) */
{_SIMM16, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */
{_SIMM14_NEG, 14, {-(1 << 13), (1 << 13) - 1}}, /* ( -8191 ~ 8192 ) */
{_IMM16_NEG, 16, {0, (1 << 16) - 1}}, /* (-65535 ~ 0 ) */
{_SIMM16_NEG, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */
{_IMM20, 20, {0, (1 << 20) - 1}},
{_IMM25, 25, {0, (1 << 25) - 1}},
{_DISP8div2, 8, {-(1 << 8), (1 << 8) - 1}}, /* ( -256 ~ 255 ) */
{_DISP11div2, 11, {0, 0}},
{_DISP19div2, 19, {-(1 << 19), (1 << 19) - 1}}, /* (-524288 ~ 524287) */
{_DISP24div2, 24, {0, 0}},
{_VALUE, 32, {0, ((unsigned int)1 << 31) - 1}},
{_VALUE_HI16, 16, {0, (1 << 16) - 1}},
{_VALUE_LO16, 16, {0, (1 << 16) - 1}},
{_VALUE_LDST_LO16, 16, {0, (1 << 16) - 1}},
{_SIMM16_LA, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */
{_IMM5_RSHIFT_1, 5, {0, (1 << 6) - 1}}, /* ( 0 ~ 63 ) */
{_IMM5_RSHIFT_2, 5, {0, (1 << 7) - 1}}, /* ( 0 ~ 127 ) */
{_SIMM16_LA_POS, 16, {0, (1 << 15) - 1}}, /* ( 0 ~ 32767) */
{_IMM5_RANGE_8_31, 5, {8, 31}}, /* But for cop0 the valid data : (8 ~ 31). */
{_IMM10_RSHIFT_2, 10, {-(1 << 11), (1 << 11) - 1}}, /* For ldc#, stc#. */
{_SIMM10, 10, {0, (1 << 10) - 1}}, /* ( -1024 ~ 1023 ) */
{_SIMM12, 12, {0, (1 << 12) - 1}}, /* ( -2048 ~ 2047 ) */
{_SIMM14, 14, {0, (1 << 14) - 1}}, /* ( -8192 ~ 8191 ) */
{_SIMM15, 15, {0, (1 << 15) - 1}}, /* (-16384 ~ 16383) */
{_SIMM16, 16, {0, (1 << 16) - 1}}, /* (-65536 ~ 65536) */
{_SIMM14_NEG, 14, {0, (1 << 16) - 1}}, /* ( -8191 ~ 8192 ) */
{_IMM16_NEG, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */
{_SIMM16_NEG, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */
{_IMM20, 20, {0, (1 << 20) - 1}}, /* (-32768 ~ 32767) */
{_IMM25, 25, {0, (1 << 25) - 1}}, /* (-32768 ~ 32767) */
{_GP_IMM15, 15, {0, (1 << 15) - 1}}, /* ( 0 ~ 65535) */
{_GP_IMM14, 14, {0, (1 << 14) - 1}}, /* ( 0 ~ 65535) */
{_SIMM16_pic, 16, {-(1 << 15), (1 << 15) - 1}}, /* (-32768 ~ 32767) */
{_IMM16_LO16_pic, 16, {0, (1 << 16) - 1}}, /* ( 65535 ~ 0 ) */
{_IMM16_pic, 16, {0, (1 << 16) - 1}}, /* ( 0 ~ 65535) */
};
struct s7_asm_opcode
{
/* Instruction name. */
const char *template_name;
/* Instruction Opcode. */
bfd_vma value;
/* Instruction bit mask. */
bfd_vma bitmask;
/* Relax instruction opcode. 0x8000 imply no relaxation. */
bfd_vma relax_value;
/* Instruction type. */
enum score_insn_type type;
/* Function to call to parse args. */
void (*parms) (char *);
};
static const struct s7_asm_opcode s7_score_ldst_insns[] =
{
{"lw", 0x20000000, 0x3e000000, 0x2008, Rd_rvalueRs_SI15, s7_do_ldst_insn},
{"lw", 0x06000000, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s7_do_ldst_insn},
{"lw", 0x0e000000, 0x3e000007, 0x200a, Rd_rvalueRs_postSI12, s7_do_ldst_insn},
{"lh", 0x22000000, 0x3e000000, 0x2009, Rd_rvalueRs_SI15, s7_do_ldst_insn},
{"lh", 0x06000001, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s7_do_ldst_insn},
{"lh", 0x0e000001, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s7_do_ldst_insn},
{"lhu", 0x24000000, 0x3e000000, 0x8000, Rd_rvalueRs_SI15, s7_do_ldst_insn},
{"lhu", 0x06000002, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s7_do_ldst_insn},
{"lhu", 0x0e000002, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s7_do_ldst_insn},
{"lb", 0x26000000, 0x3e000000, 0x8000, Rd_rvalueRs_SI15, s7_do_ldst_insn},
{"lb", 0x06000003, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s7_do_ldst_insn},
{"lb", 0x0e000003, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s7_do_ldst_insn},
{"sw", 0x28000000, 0x3e000000, 0x200c, Rd_lvalueRs_SI15, s7_do_ldst_insn},
{"sw", 0x06000004, 0x3e000007, 0x200e, Rd_lvalueRs_preSI12, s7_do_ldst_insn},
{"sw", 0x0e000004, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, s7_do_ldst_insn},
{"sh", 0x2a000000, 0x3e000000, 0x200d, Rd_lvalueRs_SI15, s7_do_ldst_insn},
{"sh", 0x06000005, 0x3e000007, 0x8000, Rd_lvalueRs_preSI12, s7_do_ldst_insn},
{"sh", 0x0e000005, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, s7_do_ldst_insn},
{"lbu", 0x2c000000, 0x3e000000, 0x200b, Rd_rvalueRs_SI15, s7_do_ldst_insn},
{"lbu", 0x06000006, 0x3e000007, 0x8000, Rd_rvalueRs_preSI12, s7_do_ldst_insn},
{"lbu", 0x0e000006, 0x3e000007, 0x8000, Rd_rvalueRs_postSI12, s7_do_ldst_insn},
{"sb", 0x2e000000, 0x3e000000, 0x200f, Rd_lvalueRs_SI15, s7_do_ldst_insn},
{"sb", 0x06000007, 0x3e000007, 0x8000, Rd_lvalueRs_preSI12, s7_do_ldst_insn},
{"sb", 0x0e000007, 0x3e000007, 0x8000, Rd_lvalueRs_postSI12, s7_do_ldst_insn},
};
static const struct s7_asm_opcode s7_score_insns[] =
{
{"abs", 0x3800000a, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"abs.s", 0x3800004b, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"add", 0x00000010, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"add.c", 0x00000011, 0x3e0003ff, 0x2000, Rd_Rs_Rs, s7_do_rdrsrs},
{"add.s", 0x38000048, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"addc", 0x00000012, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"addc.c", 0x00000013, 0x3e0003ff, 0x0009, Rd_Rs_Rs, s7_do_rdrsrs},
{"addi", 0x02000000, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_rdsi16},
{"addi.c", 0x02000001, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_rdsi16},
{"addis", 0x0a000000, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_rdi16},
{"addis.c", 0x0a000001, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_rdi16},
{"addri", 0x10000000, 0x3e000001, 0x8000, Rd_Rs_SI14, s7_do_rdrssi14},
{"addri.c", 0x10000001, 0x3e000001, 0x8000, Rd_Rs_SI14, s7_do_rdrssi14},
{"addc!", 0x0009, 0x700f, 0x00000013, Rd_Rs, s7_do16_rdrs},
{"add!", 0x2000, 0x700f, 0x00000011, Rd_Rs, s7_do16_rdrs},
{"addei!", 0x6000 , 0x7087, 0x02000001, Rd_I4, s7_do16_rdi4},
{"subi", 0x02000000, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_sub_rdsi16},
{"subi.c", 0x02000001, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_sub_rdsi16},
{"subri", 0x10000000, 0x3e000001, 0x8000, Rd_Rs_SI14, s7_do_sub_rdrssi14},
{"subri.c", 0x10000001, 0x3e000001, 0x8000, Rd_Rs_SI14, s7_do_sub_rdrssi14},
{"and", 0x00000020, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"and.c", 0x00000021, 0x3e0003ff, 0x2004, Rd_Rs_Rs, s7_do_rdrsrs},
{"andi", 0x02080000, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16},
{"andi.c", 0x02080001, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16},
{"andis", 0x0a080000, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16},
{"andis.c", 0x0a080001, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16},
{"andri", 0x18000000, 0x3e000001, 0x8000, Rd_Rs_I14, s7_do_rdrsi14},
{"andri.c", 0x18000001, 0x3e000001, 0x8000, Rd_Rs_I14, s7_do_rdrsi14},
{"and!", 0x2004, 0x700f, 0x00000021, Rd_Rs, s7_do16_rdrs},
{"bcs", 0x08000000, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bcc", 0x08000400, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bcnz", 0x08003800, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bcsl", 0x08000001, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bccl", 0x08000401, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bcnzl", 0x08003801, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bcs!", 0x4000, 0x7f00, 0x08000000, PC_DISP8div2, s7_do16_branch},
{"bcc!", 0x4100, 0x7f00, 0x08000400, PC_DISP8div2, s7_do16_branch},
{"bcnz!", 0x4e00, 0x7f00, 0x08003800, PC_DISP8div2, s7_do16_branch},
{"beq", 0x08001000, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"beql", 0x08001001, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"beq!", 0x4400, 0x7f00, 0x08001000, PC_DISP8div2, s7_do16_branch},
{"bgtu", 0x08000800, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bgt", 0x08001800, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bge", 0x08002000, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bgtul", 0x08000801, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bgtl", 0x08001801, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bgel", 0x08002001, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bgtu!", 0x4200, 0x7f00, 0x08000800, PC_DISP8div2, s7_do16_branch},
{"bgt!", 0x4600, 0x7f00, 0x08001800, PC_DISP8div2, s7_do16_branch},
{"bge!", 0x4800, 0x7f00, 0x08002000, PC_DISP8div2, s7_do16_branch},
{"bitclr.c", 0x00000029, 0x3e0003ff, 0x6004, Rd_Rs_I5, s7_do_rdrsi5},
{"bitrev", 0x3800000c, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"bitset.c", 0x0000002b, 0x3e0003ff, 0x6005, Rd_Rs_I5, s7_do_rdrsi5},
{"bittst.c", 0x0000002d, 0x3e0003ff, 0x6006, x_Rs_I5, s7_do_xrsi5},
{"bittgl.c", 0x0000002f, 0x3e0003ff, 0x6007, Rd_Rs_I5, s7_do_rdrsi5},
{"bitclr!", 0x6004, 0x7007, 0x00000029, Rd_I5, s7_do16_rdi5},
{"bitset!", 0x6005, 0x7007, 0x0000002b, Rd_I5, s7_do16_rdi5},
{"bittst!", 0x6006, 0x7007, 0x0000002d, Rd_I5, s7_do16_rdi5},
{"bittgl!", 0x6007, 0x7007, 0x0000002f, Rd_I5, s7_do16_rdi5},
{"bleu", 0x08000c00, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"ble", 0x08001c00, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"blt", 0x08002400, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bleul", 0x08000c01, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"blel", 0x08001c01, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bltl", 0x08002401, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bl", 0x08003c01, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bleu!", 0x4300, 0x7f00, 0x08000c00, PC_DISP8div2, s7_do16_branch},
{"ble!", 0x4700, 0x7f00, 0x08001c00, PC_DISP8div2, s7_do16_branch},
{"blt!", 0x4900, 0x7f00, 0x08002400, PC_DISP8div2, s7_do16_branch},
{"bmi", 0x08002800, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bmil", 0x08002801, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bmi!", 0x00004a00, 0x00007f00, 0x08002800, PC_DISP8div2, s7_do16_branch},
{"bne", 0x08001400, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bnel", 0x08001401, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bne!", 0x4500, 0x7f00, 0x08001400, PC_DISP8div2, s7_do16_branch},
{"bpl", 0x08002c00, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bpll", 0x08002c01, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bpl!", 0x4b00, 0x7f00, 0x08002c00, PC_DISP8div2, s7_do16_branch},
{"brcs", 0x00000008, 0x3e007fff, 0x0004, x_Rs_x, s7_do_rs},
{"brcc", 0x00000408, 0x3e007fff, 0x0104, x_Rs_x, s7_do_rs},
{"brgtu", 0x00000808, 0x3e007fff, 0x0204, x_Rs_x, s7_do_rs},
{"brleu", 0x00000c08, 0x3e007fff, 0x0304, x_Rs_x, s7_do_rs},
{"breq", 0x00001008, 0x3e007fff, 0x0404, x_Rs_x, s7_do_rs},
{"brne", 0x00001408, 0x3e007fff, 0x0504, x_Rs_x, s7_do_rs},
{"brgt", 0x00001808, 0x3e007fff, 0x0604, x_Rs_x, s7_do_rs},
{"brle", 0x00001c08, 0x3e007fff, 0x0704, x_Rs_x, s7_do_rs},
{"brge", 0x00002008, 0x3e007fff, 0x0804, x_Rs_x, s7_do_rs},
{"brlt", 0x00002408, 0x3e007fff, 0x0904, x_Rs_x, s7_do_rs},
{"brmi", 0x00002808, 0x3e007fff, 0x0a04, x_Rs_x, s7_do_rs},
{"brpl", 0x00002c08, 0x3e007fff, 0x0b04, x_Rs_x, s7_do_rs},
{"brvs", 0x00003008, 0x3e007fff, 0x0c04, x_Rs_x, s7_do_rs},
{"brvc", 0x00003408, 0x3e007fff, 0x0d04, x_Rs_x, s7_do_rs},
{"brcnz", 0x00003808, 0x3e007fff, 0x0e04, x_Rs_x, s7_do_rs},
{"br", 0x00003c08, 0x3e007fff, 0x0f04, x_Rs_x, s7_do_rs},
{"brcsl", 0x00000009, 0x3e007fff, 0x000c, x_Rs_x, s7_do_rs},
{"brccl", 0x00000409, 0x3e007fff, 0x010c, x_Rs_x, s7_do_rs},
{"brgtul", 0x00000809, 0x3e007fff, 0x020c, x_Rs_x, s7_do_rs},
{"brleul", 0x00000c09, 0x3e007fff, 0x030c, x_Rs_x, s7_do_rs},
{"breql", 0x00001009, 0x3e007fff, 0x040c, x_Rs_x, s7_do_rs},
{"brnel", 0x00001409, 0x3e007fff, 0x050c, x_Rs_x, s7_do_rs},
{"brgtl", 0x00001809, 0x3e007fff, 0x060c, x_Rs_x, s7_do_rs},
{"brlel", 0x00001c09, 0x3e007fff, 0x070c, x_Rs_x, s7_do_rs},
{"brgel", 0x00002009, 0x3e007fff, 0x080c, x_Rs_x, s7_do_rs},
{"brltl", 0x00002409, 0x3e007fff, 0x090c, x_Rs_x, s7_do_rs},
{"brmil", 0x00002809, 0x3e007fff, 0x0a0c, x_Rs_x, s7_do_rs},
{"brpll", 0x00002c09, 0x3e007fff, 0x0b0c, x_Rs_x, s7_do_rs},
{"brvsl", 0x00003009, 0x3e007fff, 0x0c0c, x_Rs_x, s7_do_rs},
{"brvcl", 0x00003409, 0x3e007fff, 0x0d0c, x_Rs_x, s7_do_rs},
{"brcnzl", 0x00003809, 0x3e007fff, 0x0e0c, x_Rs_x, s7_do_rs},
{"brl", 0x00003c09, 0x3e007fff, 0x0f0c, x_Rs_x, s7_do_rs},
{"brcs!", 0x0004, 0x7f0f, 0x00000008, x_Rs, s7_do16_xrs},
{"brcc!", 0x0104, 0x7f0f, 0x00000408, x_Rs, s7_do16_xrs},
{"brgtu!", 0x0204, 0x7f0f, 0x00000808, x_Rs, s7_do16_xrs},
{"brleu!", 0x0304, 0x7f0f, 0x00000c08, x_Rs, s7_do16_xrs},
{"breq!", 0x0404, 0x7f0f, 0x00001008, x_Rs, s7_do16_xrs},
{"brne!", 0x0504, 0x7f0f, 0x00001408, x_Rs, s7_do16_xrs},
{"brgt!", 0x0604, 0x7f0f, 0x00001808, x_Rs, s7_do16_xrs},
{"brle!", 0x0704, 0x7f0f, 0x00001c08, x_Rs, s7_do16_xrs},
{"brge!", 0x0804, 0x7f0f, 0x00002008, x_Rs, s7_do16_xrs},
{"brlt!", 0x0904, 0x7f0f, 0x00002408, x_Rs, s7_do16_xrs},
{"brmi!", 0x0a04, 0x7f0f, 0x00002808, x_Rs, s7_do16_xrs},
{"brpl!", 0x0b04, 0x7f0f, 0x00002c08, x_Rs, s7_do16_xrs},
{"brvs!", 0x0c04, 0x7f0f, 0x00003008, x_Rs, s7_do16_xrs},
{"brvc!", 0x0d04, 0x7f0f, 0x00003408, x_Rs, s7_do16_xrs},
{"brcnz!", 0x0e04, 0x7f0f, 0x00003808, x_Rs, s7_do16_xrs},
{"br!", 0x0f04, 0x7f0f, 0x00003c08, x_Rs, s7_do16_xrs},
{"brcsl!", 0x000c, 0x7f0f, 0x00000009, x_Rs, s7_do16_xrs},
{"brccl!", 0x010c, 0x7f0f, 0x00000409, x_Rs, s7_do16_xrs},
{"brgtul!", 0x020c, 0x7f0f, 0x00000809, x_Rs, s7_do16_xrs},
{"brleul!", 0x030c, 0x7f0f, 0x00000c09, x_Rs, s7_do16_xrs},
{"breql!", 0x040c, 0x7f0f, 0x00001009, x_Rs, s7_do16_xrs},
{"brnel!", 0x050c, 0x7f0f, 0x00001409, x_Rs, s7_do16_xrs},
{"brgtl!", 0x060c, 0x7f0f, 0x00001809, x_Rs, s7_do16_xrs},
{"brlel!", 0x070c, 0x7f0f, 0x00001c09, x_Rs, s7_do16_xrs},
{"brgel!", 0x080c, 0x7f0f, 0x00002009, x_Rs, s7_do16_xrs},
{"brltl!", 0x090c, 0x7f0f, 0x00002409, x_Rs, s7_do16_xrs},
{"brmil!", 0x0a0c, 0x7f0f, 0x00002809, x_Rs, s7_do16_xrs},
{"brpll!", 0x0b0c, 0x7f0f, 0x00002c09, x_Rs, s7_do16_xrs},
{"brvsl!", 0x0c0c, 0x7f0f, 0x00003009, x_Rs, s7_do16_xrs},
{"brvcl!", 0x0d0c, 0x7f0f, 0x00003409, x_Rs, s7_do16_xrs},
{"brcnzl!", 0x0e0c, 0x7f0f, 0x00003809, x_Rs, s7_do16_xrs},
{"brl!", 0x0f0c, 0x7f0f, 0x00003c09, x_Rs, s7_do16_xrs},
{"bvs", 0x08003000, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bvc", 0x08003400, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"bvsl", 0x08003001, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bvcl", 0x08003401, 0x3e007c01, 0x8000, PC_DISP19div2, s7_do_branch},
{"bvs!", 0x4c00, 0x7f00, 0x08003000, PC_DISP8div2, s7_do16_branch},
{"bvc!", 0x4d00, 0x7f00, 0x08003400, PC_DISP8div2, s7_do16_branch},
{"b!", 0x4f00, 0x7f00, 0x08003c00, PC_DISP8div2, s7_do16_branch},
{"b", 0x08003c00, 0x3e007c01, 0x4000, PC_DISP19div2, s7_do_branch},
{"cache", 0x30000000, 0x3ff00000, 0x8000, OP5_rvalueRs_SI15, s7_do_cache},
{"ceinst", 0x38000000, 0x3e000000, 0x8000, I5_Rs_Rs_I5_OP5, s7_do_ceinst},
{"clz", 0x3800000d, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"cmpteq.c", 0x00000019, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"cmptmi.c", 0x00100019, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"cmp.c", 0x00300019, 0x3ff003ff, 0x2003, x_Rs_Rs, s7_do_rsrs},
{"cmpzteq.c", 0x0000001b, 0x3ff07fff, 0x8000, x_Rs_x, s7_do_rs},
{"cmpztmi.c", 0x0010001b, 0x3ff07fff, 0x8000, x_Rs_x, s7_do_rs},
{"cmpz.c", 0x0030001b, 0x3ff07fff, 0x8000, x_Rs_x, s7_do_rs},
{"cmpi.c", 0x02040001, 0x3e0e0001, 0x8000, Rd_SI16, s7_do_rdsi16},
{"cmp!", 0x2003, 0x700f, 0x00300019, Rd_Rs, s7_do16_rdrs},
{"cop1", 0x0c00000c, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, s7_do_crdcrscrsimm5},
{"cop2", 0x0c000014, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, s7_do_crdcrscrsimm5},
{"cop3", 0x0c00001c, 0x3e00001f, 0x8000, Rd_Rs_Rs_imm, s7_do_crdcrscrsimm5},
{"drte", 0x0c0000a4, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty},
{"extsb", 0x00000058, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"extsb.c", 0x00000059, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"extsh", 0x0000005a, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"extsh.c", 0x0000005b, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"extzb", 0x0000005c, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"extzb.c", 0x0000005d, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"extzh", 0x0000005e, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"extzh.c", 0x0000005f, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"jl", 0x04000001, 0x3e000001, 0x8000, PC_DISP24div2, s7_do_jump},
{"jl!", 0x3001, 0x7001, 0x04000001, PC_DISP11div2, s7_do16_jump},
{"j!", 0x3000, 0x7001, 0x04000000, PC_DISP11div2, s7_do16_jump},
{"j", 0x04000000, 0x3e000001, 0x8000, PC_DISP24div2, s7_do_jump},
{"lbu!", 0x200b, 0x0000700f, 0x2c000000, Rd_rvalueRs, s7_do16_ldst_insn},
{"lbup!", 0x7003, 0x7007, 0x2c000000, Rd_rvalueBP_I5, s7_do16_ldst_imm_insn},
{"alw", 0x0000000c, 0x3e0003ff, 0x8000, Rd_rvalue32Rs, s7_do_ldst_atomic},
{"lcb", 0x00000060, 0x3e0003ff, 0x8000, x_rvalueRs_post4, s7_do_ldst_unalign},
{"lcw", 0x00000062, 0x3e0003ff, 0x8000, Rd_rvalueRs_post4, s7_do_ldst_unalign},
{"lce", 0x00000066, 0x3e0003ff, 0x8000, Rd_rvalueRs_post4, s7_do_ldst_unalign},
{"ldc1", 0x0c00000a, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, s7_do_ldst_cop},
{"ldc2", 0x0c000012, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, s7_do_ldst_cop},
{"ldc3", 0x0c00001a, 0x3e00001f, 0x8000, Rd_rvalueRs_SI10, s7_do_ldst_cop},
{"lh!", 0x2009, 0x700f, 0x22000000, Rd_rvalueRs, s7_do16_ldst_insn},
{"lhp!", 0x7001, 0x7007, 0x22000000, Rd_rvalueBP_I5, s7_do16_ldst_imm_insn},
{"ldi", 0x020c0000, 0x3e0e0000, 0x5000, Rd_SI16, s7_do_rdsi16},
{"ldis", 0x0a0c0000, 0x3e0e0000, 0x8000, Rd_I16, s7_do_rdi16},
{"ldiu!", 0x5000, 0x7000, 0x020c0000, Rd_I8, s7_do16_ldst_imm_insn},
{"lw!", 0x2008, 0x700f, 0x20000000, Rd_rvalueRs, s7_do16_ldst_insn},
{"lwp!", 0x7000, 0x7007, 0x20000000, Rd_rvalueBP_I5, s7_do16_ldst_imm_insn},
{"mfcel", 0x00000448, 0x3e007fff, 0x8000, Rd_x_x, s7_do_rd},
{"mfcel!", 0x1001, 0x7f0f, 0x00000448, x_Rs, s7_do16_rs},
{"mad", 0x38000000, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"mad.f!", 0x1004, 0x700f, 0x38000080, Rd_Rs, s7_do16_rdrs},
{"madh", 0x38000203, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"madh.fs", 0x380002c3, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"madh.fs!", 0x100b, 0x700f, 0x380002c3, Rd_Rs, s7_do16_rdrs},
{"madl", 0x38000002, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"madl.fs", 0x380000c2, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"madl.fs!", 0x100a, 0x700f, 0x380000c2, Rd_Rs, s7_do16_rdrs},
{"madu", 0x38000020, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"madu!", 0x1005, 0x700f, 0x38000020, Rd_Rs, s7_do16_rdrs},
{"mad.f", 0x38000080, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"max", 0x38000007, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"mazh", 0x38000303, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"mazh.f", 0x38000383, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"mazh.f!", 0x1009, 0x700f, 0x38000383, Rd_Rs, s7_do16_rdrs},
{"mazl", 0x38000102, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"mazl.f", 0x38000182, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"mazl.f!", 0x1008, 0x700f, 0x38000182, Rd_Rs, s7_do16_rdrs},
{"mfceh", 0x00000848, 0x3e007fff, 0x8000, Rd_x_x, s7_do_rd},
{"mfceh!", 0x1101, 0x7f0f, 0x00000848, x_Rs, s7_do16_rs},
{"mfcehl", 0x00000c48, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mfsr", 0x00000050, 0x3e0003ff, 0x8000, Rd_x_I5, s7_do_rdsrs},
{"mfcr", 0x0c000001, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mfc1", 0x0c000009, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mfc2", 0x0c000011, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mfc3", 0x0c000019, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mfcc1", 0x0c00000f, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mfcc2", 0x0c000017, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mfcc3", 0x0c00001f, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mhfl!", 0x0002, 0x700f, 0x00003c56, Rd_LowRs, s7_do16_hrdrs},
{"min", 0x38000006, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"mlfh!", 0x0001, 0x700f, 0x00003c56, Rd_HighRs, s7_do16_rdhrs},
{"msb", 0x38000001, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"msb.f!", 0x1006, 0x700f, 0x38000081, Rd_Rs, s7_do16_rdrs},
{"msbh", 0x38000205, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"msbh.fs", 0x380002c5, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"msbh.fs!", 0x100f, 0x700f, 0x380002c5, Rd_Rs, s7_do16_rdrs},
{"msbl", 0x38000004, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"msbl.fs", 0x380000c4, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"msbl.fs!", 0x100e, 0x700f, 0x380000c4, Rd_Rs, s7_do16_rdrs},
{"msbu", 0x38000021, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"msbu!", 0x1007, 0x700f, 0x38000021, Rd_Rs, s7_do16_rdrs},
{"msb.f", 0x38000081, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"mszh", 0x38000305, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"mszh.f", 0x38000385, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"mszh.f!", 0x100d, 0x700f, 0x38000385, Rd_Rs, s7_do16_rdrs},
{"mszl", 0x38000104, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"mszl.f", 0x38000184, 0x3ff003ff, 0x8000, x_Rs_Rs, s7_do_rsrs},
{"mszl.f!", 0x100c, 0x700f, 0x38000184, Rd_Rs, s7_do16_rdrs},
{"mtcel!", 0x1000, 0x7f0f, 0x0000044a, x_Rs, s7_do16_rs},
{"mtcel", 0x0000044a, 0x3e007fff, 0x8000, Rd_x_x, s7_do_rd},
{"mtceh", 0x0000084a, 0x3e007fff, 0x8000, Rd_x_x, s7_do_rd},
{"mtceh!", 0x1100, 0x7f0f, 0x0000084a, x_Rs, s7_do16_rs},
{"mtcehl", 0x00000c4a, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mtsr", 0x00000052, 0x3e0003ff, 0x8000, x_Rs_I5, s7_do_rdsrs},
{"mtcr", 0x0c000000, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mtc1", 0x0c000008, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mtc2", 0x0c000010, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mtc3", 0x0c000018, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mtcc1", 0x0c00000e, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mtcc2", 0x0c000016, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mtcc3", 0x0c00001e, 0x3e00001f, 0x8000, Rd_Rs_x, s7_do_rdcrs},
{"mul.f!", 0x1002, 0x700f, 0x00000041, Rd_Rs, s7_do16_rdrs},
{"mulu!", 0x1003, 0x700f, 0x00000042, Rd_Rs, s7_do16_rdrs},
{"mvcs", 0x00000056, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvcc", 0x00000456, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvgtu", 0x00000856, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvleu", 0x00000c56, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mveq", 0x00001056, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvne", 0x00001456, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvgt", 0x00001856, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvle", 0x00001c56, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvge", 0x00002056, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvlt", 0x00002456, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvmi", 0x00002856, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvpl", 0x00002c56, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvvs", 0x00003056, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mvvc", 0x00003456, 0x3e007fff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"mv", 0x00003c56, 0x3e007fff, 0x0003, Rd_Rs_x, s7_do_rdrs},
{"mv!", 0x0003, 0x700f, 0x00003c56, Rd_Rs, s7_do16_mv_rdrs},
{"neg", 0x0000001e, 0x3e0003ff, 0x8000, Rd_x_Rs, s7_do_rdxrs},
{"neg.c", 0x0000001f, 0x3e0003ff, 0x2002, Rd_x_Rs, s7_do_rdxrs},
{"neg!", 0x2002, 0x700f, 0x0000001f, Rd_Rs, s7_do16_rdrs},
{"nop", 0x00000000, 0x3e0003ff, 0x0000, NO_OPD, s7_do_empty},
{"not", 0x00000024, 0x3e0003ff, 0x8000, Rd_Rs_x, s7_do_rdrs},
{"not.c", 0x00000025, 0x3e0003ff, 0x2006, Rd_Rs_x, s7_do_rdrs},
{"nop!", 0x0000, 0x700f, 0x00000000, NO16_OPD, s7_do_empty},
{"not!", 0x2006, 0x700f, 0x00000025, Rd_Rs, s7_do16_rdrs},
{"or", 0x00000022, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"or.c", 0x00000023, 0x3e0003ff, 0x2005, Rd_Rs_Rs, s7_do_rdrsrs},
{"ori", 0x020a0000, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16},
{"ori.c", 0x020a0001, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16},
{"oris", 0x0a0a0000, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16},
{"oris.c", 0x0a0a0001, 0x3e0e0001, 0x8000, Rd_I16, s7_do_rdi16},
{"orri", 0x1a000000, 0x3e000001, 0x8000, Rd_Rs_I14, s7_do_rdrsi14},
{"orri.c", 0x1a000001, 0x3e000001, 0x8000, Rd_Rs_I14, s7_do_rdrsi14},
{"or!", 0x2005, 0x700f, 0x00000023, Rd_Rs, s7_do16_rdrs},
{"pflush", 0x0000000a, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty},
{"pop!", 0x200a, 0x700f, 0x0e000000, Rd_rvalueRs, s7_do16_push_pop},
{"push!", 0x200e, 0x700f, 0x06000004, Rd_lvalueRs, s7_do16_push_pop},
{"ror", 0x00000038, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"ror.c", 0x00000039, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"rorc.c", 0x0000003b, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"rol", 0x0000003c, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"rol.c", 0x0000003d, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"rolc.c", 0x0000003f, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"rori", 0x00000078, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5},
{"rori.c", 0x00000079, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5},
{"roric.c", 0x0000007b, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5},
{"roli", 0x0000007c, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5},
{"roli.c", 0x0000007d, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5},
{"rolic.c", 0x0000007f, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5},
{"rte", 0x0c000084, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty},
{"sb!", 0x200f, 0x700f, 0x2e000000, Rd_lvalueRs, s7_do16_ldst_insn},
{"sbp!", 0x7007, 0x7007, 0x2e000000, Rd_lvalueBP_I5, s7_do16_ldst_imm_insn},
{"asw", 0x0000000e, 0x3e0003ff, 0x8000, Rd_lvalue32Rs, s7_do_ldst_atomic},
{"scb", 0x00000068, 0x3e0003ff, 0x8000, Rd_lvalueRs_post4, s7_do_ldst_unalign},
{"scw", 0x0000006a, 0x3e0003ff, 0x8000, Rd_lvalueRs_post4, s7_do_ldst_unalign},
{"sce", 0x0000006e, 0x3e0003ff, 0x8000, x_lvalueRs_post4, s7_do_ldst_unalign},
{"sdbbp", 0x00000006, 0x3e0003ff, 0x6002, x_I5_x, s7_do_xi5x},
{"sdbbp!", 0x6002, 0x7007, 0x00000006, Rd_I5, s7_do16_xi5},
{"sh!", 0x200d, 0x700f, 0x2a000000, Rd_lvalueRs, s7_do16_ldst_insn},
{"shp!", 0x7005, 0x7007, 0x2a000000, Rd_lvalueBP_I5, s7_do16_ldst_imm_insn},
{"sleep", 0x0c0000c4, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty},
{"sll", 0x00000030, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"sll.c", 0x00000031, 0x3e0003ff, 0x0008, Rd_Rs_Rs, s7_do_rdrsrs},
{"sll.s", 0x3800004e, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"slli", 0x00000070, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5},
{"slli.c", 0x00000071, 0x3e0003ff, 0x6001, Rd_Rs_I5, s7_do_rdrsi5},
{"sll!", 0x0008, 0x700f, 0x00000031, Rd_Rs, s7_do16_rdrs},
{"slli!", 0x6001, 0x7007, 0x00000071, Rd_I5, s7_do16_rdi5},
{"srl", 0x00000034, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"srl.c", 0x00000035, 0x3e0003ff, 0x000a, Rd_Rs_Rs, s7_do_rdrsrs},
{"sra", 0x00000036, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"sra.c", 0x00000037, 0x3e0003ff, 0x000b, Rd_Rs_Rs, s7_do_rdrsrs},
{"srli", 0x00000074, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5},
{"srli.c", 0x00000075, 0x3e0003ff, 0x6003, Rd_Rs_I5, s7_do_rdrsi5},
{"srai", 0x00000076, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5},
{"srai.c", 0x00000077, 0x3e0003ff, 0x8000, Rd_Rs_I5, s7_do_rdrsi5},
{"srl!", 0x000a, 0x700f, 0x00000035, Rd_Rs, s7_do16_rdrs},
{"sra!", 0x000b, 0x700f, 0x00000037, Rd_Rs, s7_do16_rdrs},
{"srli!", 0x6003, 0x7007, 0x00000075, Rd_Rs, s7_do16_rdi5},
{"stc1", 0x0c00000b, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, s7_do_ldst_cop},
{"stc2", 0x0c000013, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, s7_do_ldst_cop},
{"stc3", 0x0c00001b, 0x3e00001f, 0x8000, Rd_lvalueRs_SI10, s7_do_ldst_cop},
{"sub", 0x00000014, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"sub.c", 0x00000015, 0x3e0003ff, 0x2001, Rd_Rs_Rs, s7_do_rdrsrs},
{"sub.s", 0x38000049, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"subc", 0x00000016, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"subc.c", 0x00000017, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"sub!", 0x2001, 0x700f, 0x00000015, Rd_Rs, s7_do16_rdrs},
{"subei!", 0x6080, 0x7087, 0x02000001, Rd_I4, s7_do16_rdi4},
{"sw!", 0x200c, 0x700f, 0x28000000, Rd_lvalueRs, s7_do16_ldst_insn},
{"swp!", 0x7004, 0x7007, 0x28000000, Rd_lvalueBP_I5, s7_do16_ldst_imm_insn},
{"syscall", 0x00000002, 0x3e0003ff, 0x8000, I15, s7_do_i15},
{"tcs", 0x00000054, 0x3e007fff, 0x0005, NO_OPD, s7_do_empty},
{"tcc", 0x00000454, 0x3e007fff, 0x0105, NO_OPD, s7_do_empty},
{"tcnz", 0x00003854, 0x3e007fff, 0x0e05, NO_OPD, s7_do_empty},
{"tcs!", 0x0005, 0x7f0f, 0x00000054, NO16_OPD, s7_do_empty},
{"tcc!", 0x0105, 0x7f0f, 0x00000454, NO16_OPD, s7_do_empty},
{"tcnz!", 0x0e05, 0x7f0f, 0x00003854, NO16_OPD, s7_do_empty},
{"teq", 0x00001054, 0x3e007fff, 0x0405, NO_OPD, s7_do_empty},
{"teq!", 0x0405, 0x7f0f, 0x00001054, NO16_OPD, s7_do_empty},
{"tgtu", 0x00000854, 0x3e007fff, 0x0205, NO_OPD, s7_do_empty},
{"tgt", 0x00001854, 0x3e007fff, 0x0605, NO_OPD, s7_do_empty},
{"tge", 0x00002054, 0x3e007fff, 0x0805, NO_OPD, s7_do_empty},
{"tgtu!", 0x0205, 0x7f0f, 0x00000854, NO16_OPD, s7_do_empty},
{"tgt!", 0x0605, 0x7f0f, 0x00001854, NO16_OPD, s7_do_empty},
{"tge!", 0x0805, 0x7f0f, 0x00002054, NO16_OPD, s7_do_empty},
{"tleu", 0x00000c54, 0x3e007fff, 0x0305, NO_OPD, s7_do_empty},
{"tle", 0x00001c54, 0x3e007fff, 0x0705, NO_OPD, s7_do_empty},
{"tlt", 0x00002454, 0x3e007fff, 0x0905, NO_OPD, s7_do_empty},
{"stlb", 0x0c000004, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty},
{"mftlb", 0x0c000024, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty},
{"mtptlb", 0x0c000044, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty},
{"mtrtlb", 0x0c000064, 0x3e0003ff, 0x8000, NO_OPD, s7_do_empty},
{"tleu!", 0x0305, 0x7f0f, 0x00000c54, NO16_OPD, s7_do_empty},
{"tle!", 0x0705, 0x7f0f, 0x00001c54, NO16_OPD, s7_do_empty},
{"tlt!", 0x0905, 0x7f0f, 0x00002454, NO16_OPD, s7_do_empty},
{"tmi", 0x00002854, 0x3e007fff, 0x0a05, NO_OPD, s7_do_empty},
{"tmi!", 0x0a05, 0x7f0f, 0x00002854, NO16_OPD, s7_do_empty},
{"tne", 0x00001454, 0x3e007fff, 0x0505, NO_OPD, s7_do_empty},
{"tne!", 0x0505, 0x7f0f, 0x00001454, NO16_OPD, s7_do_empty},
{"tpl", 0x00002c54, 0x3e007fff, 0x0b05, NO_OPD, s7_do_empty},
{"tpl!", 0x0b05, 0x7f0f, 0x00002c54, NO16_OPD, s7_do_empty},
{"trapcs", 0x00000004, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trapcc", 0x00000404, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trapgtu", 0x00000804, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trapleu", 0x00000c04, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trapeq", 0x00001004, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trapne", 0x00001404, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trapgt", 0x00001804, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"traple", 0x00001c04, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trapge", 0x00002004, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"traplt", 0x00002404, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trapmi", 0x00002804, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trappl", 0x00002c04, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trapvs", 0x00003004, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trapvc", 0x00003404, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"trap", 0x00003c04, 0x3e007fff, 0x8000, x_I5_x, s7_do_xi5x},
{"tset", 0x00003c54, 0x3e007fff, 0x0f05, NO_OPD, s7_do_empty},
{"tset!", 0x0f05, 0x00007f0f, 0x00003c54, NO16_OPD, s7_do_empty},
{"tvs", 0x00003054, 0x3e007fff, 0x0c05, NO_OPD, s7_do_empty},
{"tvc", 0x00003454, 0x3e007fff, 0x0d05, NO_OPD, s7_do_empty},
{"tvs!", 0x0c05, 0x7f0f, 0x00003054, NO16_OPD, s7_do_empty},
{"tvc!", 0x0d05, 0x7f0f, 0x00003454, NO16_OPD, s7_do_empty},
{"xor", 0x00000026, 0x3e0003ff, 0x8000, Rd_Rs_Rs, s7_do_rdrsrs},
{"xor.c", 0x00000027, 0x3e0003ff, 0x2007, Rd_Rs_Rs, s7_do_rdrsrs},
{"xor!", 0x2007, 0x700f, 0x00000027, Rd_Rs, s7_do16_rdrs},
/* Macro instruction. */
{"li", 0x020c0000, 0x3e0e0000, 0x8000, Insn_Type_SYN, s7_do_macro_li_rdi32},
/* la reg, imm32 -->(1) ldi reg, simm16
(2) ldis reg, %HI(imm32)
ori reg, %LO(imm32)
la reg, symbol -->(1) lis reg, %HI(imm32)
ori reg, %LO(imm32) */
{"la", 0x020c0000, 0x3e0e0000, 0x8000, Insn_Type_SYN, s7_do_macro_la_rdi32},
{"div", 0x00000044, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs},
{"divu", 0x00000046, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs},
{"rem", 0x00000044, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs},
{"remu", 0x00000046, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs},
{"mul", 0x00000040, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs},
{"mulu", 0x00000042, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs},
{"maz", 0x00000040, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs},
{"mazu", 0x00000042, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs},
{"mul.f", 0x00000041, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs},
{"maz.f", 0x00000041, 0x3e0003ff, 0x8000, Insn_Type_SYN, s7_do_macro_mul_rdrsrs},
{"lb", INSN_LB, 0x00000000, 0x8000, Insn_Type_SYN, s7_do_macro_ldst_label},
{"lbu", INSN_LBU, 0x00000000, 0x200b, Insn_Type_SYN, s7_do_macro_ldst_label},
{"lh", INSN_LH, 0x00000000, 0x2009, Insn_Type_SYN, s7_do_macro_ldst_label},
{"lhu", INSN_LHU, 0x00000000, 0x8000, Insn_Type_SYN, s7_do_macro_ldst_label},
{"lw", INSN_LW, 0x00000000, 0x2008, Insn_Type_SYN, s7_do_macro_ldst_label},
{"sb", INSN_SB, 0x00000000, 0x200f, Insn_Type_SYN, s7_do_macro_ldst_label},
{"sh", INSN_SH, 0x00000000, 0x200d, Insn_Type_SYN, s7_do_macro_ldst_label},
{"sw", INSN_SW, 0x00000000, 0x200c, Insn_Type_SYN, s7_do_macro_ldst_label},
/* Assembler use internal. */
{"ld_i32hi", 0x0a0c0000, 0x3e0e0000, 0x8000, Insn_internal, s7_do_macro_rdi32hi},
{"ld_i32lo", 0x020a0000, 0x3e0e0001, 0x8000, Insn_internal, s7_do_macro_rdi32lo},
{"ldis_pic", 0x0a0c0000, 0x3e0e0000, 0x5000, Insn_internal, s7_do_rdi16_pic},
{"addi_s_pic",0x02000000, 0x3e0e0001, 0x8000, Insn_internal, s7_do_addi_s_pic},
{"addi_u_pic",0x02000000, 0x3e0e0001, 0x8000, Insn_internal, s7_do_addi_u_pic},
{"lw_pic", 0x20000000, 0x3e000000, 0x8000, Insn_internal, s7_do_lw_pic},
};
#define s7_SCORE5_PIPELINE 5
#define s7_SCORE7_PIPELINE 7
static int s7_university_version = 0;
static int s7_vector_size = s7_SCORE7_PIPELINE;
static struct s7_score_it s7_dependency_vector[s7_SCORE7_PIPELINE];
static int s7_score7d = 1;
static int
s7_end_of_line (char *str)
{
int retval = s7_SUCCESS;
s7_skip_whitespace (str);
if (*str != '\0')
{
retval = (int) s7_FAIL;
if (!s7_inst.error)
s7_inst.error = s7_BAD_GARBAGE;
}
return retval;
}
static int
s7_score_reg_parse (char **ccp, htab_t htab)
{
char *start = *ccp;
char c;
char *p;
struct s7_reg_entry *reg;
p = start;
if (!ISALPHA (*p) || !is_name_beginner (*p))
return (int) s7_FAIL;
c = *p++;
while (ISALPHA (c) || ISDIGIT (c) || c == '_')
c = *p++;
*--p = 0;
reg = (struct s7_reg_entry *) str_hash_find (htab, start);
*p = c;
if (reg)
{
*ccp = p;
return reg->number;
}
return (int) s7_FAIL;
}
/* If shift <= 0, only return reg. */
static int
s7_reg_required_here (char **str, int shift, enum s7_score_reg_type reg_type)
{
static char buff[s7_MAX_LITERAL_POOL_SIZE];
int reg = (int) s7_FAIL;
char *start = *str;
if ((reg = s7_score_reg_parse (str, s7_all_reg_maps[reg_type].htab)) != (int) s7_FAIL)
{
if (reg_type == s7_REG_TYPE_SCORE)
{
if ((reg == 1) && (s7_nor1 == 1) && (s7_inst.bwarn == 0))
{
as_warn (_("Using temp register(r1)"));
s7_inst.bwarn = 1;
}
}
if (shift >= 0)
{
if (reg_type == s7_REG_TYPE_SCORE_CR)
strcpy (s7_inst.reg, s7_score_crn_table[reg].name);
else if (reg_type == s7_REG_TYPE_SCORE_SR)
strcpy (s7_inst.reg, s7_score_srn_table[reg].name);
else
strcpy (s7_inst.reg, "");
s7_inst.instruction |= reg << shift;
}
}
else
{
*str = start;
sprintf (buff, _("register expected, not '%.100s'"), start);
s7_inst.error = buff;
}
return reg;
}
static int
s7_skip_past_comma (char **str)
{
char *p = *str;
char c;
int comma = 0;
while ((c = *p) == ' ' || c == ',')
{
p++;
if (c == ',' && comma++)
{
s7_inst.error = s7_BAD_SKIP_COMMA;
return (int) s7_FAIL;
}
}
if ((c == '\0') || (comma == 0))
{
s7_inst.error = s7_BAD_SKIP_COMMA;
return (int) s7_FAIL;
}
*str = p;
return comma ? s7_SUCCESS : (int) s7_FAIL;
}
static void
s7_do_rdrsrs (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
{
return;
}
else
{
if ((((s7_inst.instruction >> 15) & 0x10) == 0)
&& (((s7_inst.instruction >> 10) & 0x10) == 0)
&& (((s7_inst.instruction >> 20) & 0x10) == 0)
&& (s7_inst.relax_inst != 0x8000)
&& (((s7_inst.instruction >> 20) & 0xf) == ((s7_inst.instruction >> 15) & 0xf)))
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0xf) << 4)
| (((s7_inst.instruction >> 15) & 0xf) << 8);
s7_inst.relax_size = 2;
}
else
{
s7_inst.relax_inst = 0x8000;
}
}
}
static int
s7_walk_no_bignums (symbolS * sp)
{
if (symbol_get_value_expression (sp)->X_op == O_big)
return 1;
if (symbol_get_value_expression (sp)->X_add_symbol)
return (s7_walk_no_bignums (symbol_get_value_expression (sp)->X_add_symbol)
|| (symbol_get_value_expression (sp)->X_op_symbol
&& s7_walk_no_bignums (symbol_get_value_expression (sp)->X_op_symbol)));
return 0;
}
static int
s7_my_get_expression (expressionS * ep, char **str)
{
char *save_in;
save_in = input_line_pointer;
input_line_pointer = *str;
s7_in_my_get_expression = 1;
(void) expression (ep);
s7_in_my_get_expression = 0;
if (ep->X_op == O_illegal)
{
*str = input_line_pointer;
input_line_pointer = save_in;
s7_inst.error = _("illegal expression");
return (int) s7_FAIL;
}
/* Get rid of any bignums now, so that we don't generate an error for which
we can't establish a line number later on. Big numbers are never valid
in instructions, which is where this routine is always called. */
if (ep->X_op == O_big
|| (ep->X_add_symbol
&& (s7_walk_no_bignums (ep->X_add_symbol)
|| (ep->X_op_symbol && s7_walk_no_bignums (ep->X_op_symbol)))))
{
s7_inst.error = _("invalid constant");
*str = input_line_pointer;
input_line_pointer = save_in;
return (int) s7_FAIL;
}
if ((ep->X_add_symbol != NULL)
&& (s7_inst.type != PC_DISP19div2)
&& (s7_inst.type != PC_DISP8div2)
&& (s7_inst.type != PC_DISP24div2)
&& (s7_inst.type != PC_DISP11div2)
&& (s7_inst.type != Insn_Type_SYN)
&& (s7_inst.type != Rd_rvalueRs_SI15)
&& (s7_inst.type != Rd_lvalueRs_SI15)
&& (s7_inst.type != Insn_internal))
{
s7_inst.error = s7_BAD_ARGS;
*str = input_line_pointer;
input_line_pointer = save_in;
return (int) s7_FAIL;
}
*str = input_line_pointer;
input_line_pointer = save_in;
return s7_SUCCESS;
}
/* Check if an immediate is valid. If so, convert it to the right format. */
static bfd_signed_vma
s7_validate_immediate (bfd_signed_vma val, unsigned int data_type, int hex_p)
{
switch (data_type)
{
case _VALUE_HI16:
{
int val_hi = ((val & 0xffff0000) >> 16);
if (s7_score_df_range[data_type].range[0] <= val_hi
&& val_hi <= s7_score_df_range[data_type].range[1])
return val_hi;
}
break;
case _VALUE_LO16:
{
int val_lo = (val & 0xffff);
if (s7_score_df_range[data_type].range[0] <= val_lo
&& val_lo <= s7_score_df_range[data_type].range[1])
return val_lo;
}
break;
case _SIMM12:
if (hex_p == 1)
{
if (!(val >= -0x800 && val <= 0xfff))
{
return (int) s7_FAIL;
}
}
else
{
if (!(val >= -2048 && val <= 2047))
{
return (int) s7_FAIL;
}
}
return val;
break;
case _SIMM14:
if (hex_p == 1)
{
if (!(val >= -0x2000 && val <= 0x3fff))
{
return (int) s7_FAIL;
}
}
else
{
if (!(val >= -8192 && val <= 8191))
{
return (int) s7_FAIL;
}
}
return val;
break;
case _SIMM15:
if (hex_p == 1)
{
if (!(val >= -0x4000 && val <= 0x7fff))
{
return (int) s7_FAIL;
}
}
else
{
if (!(val >= -16384 && val <= 16383))
{
return (int) s7_FAIL;
}
}
return val;
break;
case _SIMM16:
if (hex_p == 1)
{
if (!(val >= -0x8000 && val <= 0xffff))
{
return (int) s7_FAIL;
}
}
else
{
if (!(val >= -32768 && val <= 32767))
{
return (int) s7_FAIL;
}
}
return val;
break;
case _SIMM16_NEG:
if (hex_p == 1)
{
if (!(val >= -0x7fff && val <= 0xffff && val != 0x8000))
{
return (int) s7_FAIL;
}
}
else
{
if (!(val >= -32767 && val <= 32768))
{
return (int) s7_FAIL;
}
}
val = -val;
return val;
break;
case _IMM32:
if (val >= 0 && val <= 0xffffffff)
{
return val;
}
else
{
return (int) s7_FAIL;
}
default:
if (data_type == _SIMM14_NEG || data_type == _IMM16_NEG)
val = -val;
if (s7_score_df_range[data_type].range[0] <= val
&& val <= s7_score_df_range[data_type].range[1])
return val;
break;
}
return (int) s7_FAIL;
}
static int
s7_data_op2 (char **str, int shift, enum score_data_type data_type)
{
int value;
char data_exp[s7_MAX_LITERAL_POOL_SIZE];
char *dataptr;
int cnt = 0;
char *pp = NULL;
s7_skip_whitespace (*str);
s7_inst.error = NULL;
dataptr = * str;
/* Set hex_p to zero. */
int hex_p = 0;
while ((*dataptr != '\0') && (*dataptr != '|') && (cnt <= s7_MAX_LITERAL_POOL_SIZE)) /* 0x7c = ='|' */
{
data_exp[cnt] = *dataptr;
dataptr++;
cnt++;
}
data_exp[cnt] = '\0';
pp = (char *)&data_exp;
if (*dataptr == '|') /* process PCE */
{
if (s7_my_get_expression (&s7_inst.reloc.exp, &pp) == (int) s7_FAIL)
return (int) s7_FAIL;
s7_end_of_line (pp);
if (s7_inst.error != 0)
return (int) s7_FAIL; /* to ouptut_inst to printf out the error */
*str = dataptr;
}
else /* process 16 bit */
{
if (s7_my_get_expression (&s7_inst.reloc.exp, str) == (int) s7_FAIL)
{
return (int) s7_FAIL;
}
dataptr = (char *) data_exp;
for (; *dataptr != '\0'; dataptr++)
{
*dataptr = TOLOWER (*dataptr);
if (*dataptr == '!' || *dataptr == ' ')
break;
}
dataptr = (char *) data_exp;
if ((dataptr != NULL)
&& (((strstr (dataptr, "0x")) != NULL)
|| ((strstr (dataptr, "0X")) != NULL)))
{
hex_p = 1;
if ((data_type != _SIMM16_LA)
&& (data_type != _VALUE_HI16)
&& (data_type != _VALUE_LO16)
&& (data_type != _IMM16)
&& (data_type != _IMM15)
&& (data_type != _IMM14)
&& (data_type != _IMM4)
&& (data_type != _IMM5)
&& (data_type != _IMM8)
&& (data_type != _IMM5_RSHIFT_1)
&& (data_type != _IMM5_RSHIFT_2)
&& (data_type != _SIMM14)
&& (data_type != _SIMM16)
&& (data_type != _SIMM14_NEG)
&& (data_type != _SIMM16_NEG)
&& (data_type != _IMM10_RSHIFT_2)
&& (data_type != _GP_IMM15))
{
data_type += 24;
}
}
if ((s7_inst.reloc.exp.X_add_number == 0)
/* for "addi r0,-((((((32*4)+4)+4)+4)+4)&0xf)". */
&& (s7_inst.type != Rd_SI16)
&& (s7_inst.type != Insn_Type_SYN)
&& (s7_inst.type != Rd_rvalueRs_SI15)
&& (s7_inst.type != Rd_lvalueRs_SI15)
&& (s7_inst.type != Insn_internal)
&& (((*dataptr >= 'a') && (*dataptr <= 'z'))
|| ((*dataptr == '0') && (*(dataptr + 1) == 'x') && (*(dataptr + 2) != '0'))
|| ((*dataptr == '+') && (*(dataptr + 1) != '0'))
|| ((*dataptr == '-') && (*(dataptr + 1) != '0'))))
{
s7_inst.error = s7_BAD_ARGS;
return (int) s7_FAIL;
}
}
if ((s7_inst.reloc.exp.X_add_symbol)
&& ((data_type == _SIMM16)
|| (data_type == _SIMM16_NEG)
|| (data_type == _IMM16_NEG)
|| (data_type == _SIMM14)
|| (data_type == _SIMM14_NEG)
|| (data_type == _IMM5)
|| (data_type == _IMM14)
|| (data_type == _IMM20)
|| (data_type == _IMM16)
|| (data_type == _IMM15)
|| (data_type == _IMM4)))
{
s7_inst.error = s7_BAD_ARGS;
return (int) s7_FAIL;
}
if (s7_inst.reloc.exp.X_add_symbol)
{
switch (data_type)
{
case _SIMM16_LA:
return (int) s7_FAIL;
case _VALUE_HI16:
s7_inst.reloc.type = BFD_RELOC_HI16_S;
s7_inst.reloc.pc_rel = 0;
break;
case _VALUE_LO16:
s7_inst.reloc.type = BFD_RELOC_LO16;
s7_inst.reloc.pc_rel = 0;
break;
case _GP_IMM15:
s7_inst.reloc.type = BFD_RELOC_SCORE_GPREL15;
s7_inst.reloc.pc_rel = 0;
break;
case _SIMM16_pic:
case _IMM16_LO16_pic:
s7_inst.reloc.type = BFD_RELOC_SCORE_GOT_LO16;
s7_inst.reloc.pc_rel = 0;
break;
default:
s7_inst.reloc.type = BFD_RELOC_32;
s7_inst.reloc.pc_rel = 0;
break;
}
}
else
{
if (data_type == _IMM16_pic)
{
s7_inst.reloc.type = BFD_RELOC_SCORE_DUMMY_HI16;
s7_inst.reloc.pc_rel = 0;
}
if (data_type == _SIMM16_LA && s7_inst.reloc.exp.X_unsigned == 1)
{
value = s7_validate_immediate (s7_inst.reloc.exp.X_add_number, _SIMM16_LA_POS, hex_p);
if (value == (int) s7_FAIL) /* for advance to check if this is ldis */
if ((s7_inst.reloc.exp.X_add_number & 0xffff) == 0)
{
s7_inst.instruction |= 0x8000000;
s7_inst.instruction |= ((s7_inst.reloc.exp.X_add_number >> 16) << 1) & 0x1fffe;
return s7_SUCCESS;
}
}
else
{
value = s7_validate_immediate (s7_inst.reloc.exp.X_add_number, data_type, hex_p);
}
if (value == (int) s7_FAIL)
{
if ((data_type != _SIMM14_NEG) && (data_type != _SIMM16_NEG) && (data_type != _IMM16_NEG))
{
sprintf (s7_err_msg,
_("invalid constant: %d bit expression not in range %d..%d"),
s7_score_df_range[data_type].bits,
s7_score_df_range[data_type].range[0], s7_score_df_range[data_type].range[1]);
}
else
{
sprintf (s7_err_msg,
_("invalid constant: %d bit expression not in range %d..%d"),
s7_score_df_range[data_type].bits,
-s7_score_df_range[data_type].range[1], -s7_score_df_range[data_type].range[0]);
}
s7_inst.error = s7_err_msg;
return (int) s7_FAIL;
}
if ((s7_score_df_range[data_type].range[0] != 0) || (data_type == _IMM5_RANGE_8_31))
{
value &= (1 << s7_score_df_range[data_type].bits) - 1;
}
s7_inst.instruction |= value << shift;
}
if ((s7_inst.instruction & 0x3e000000) == 0x30000000)
{
if ((((s7_inst.instruction >> 20) & 0x1F) != 0)
&& (((s7_inst.instruction >> 20) & 0x1F) != 1)
&& (((s7_inst.instruction >> 20) & 0x1F) != 2)
&& (((s7_inst.instruction >> 20) & 0x1F) != 3)
&& (((s7_inst.instruction >> 20) & 0x1F) != 4)
&& (((s7_inst.instruction >> 20) & 0x1F) != 8)
&& (((s7_inst.instruction >> 20) & 0x1F) != 9)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0xa)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0xb)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0xc)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0xd)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0xe)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0x10)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0x11)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0x18)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0x1A)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0x1B)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0x1d)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0x1e)
&& (((s7_inst.instruction >> 20) & 0x1F) != 0x1f))
{
s7_inst.error = _("invalid constant: bit expression not defined");
return (int) s7_FAIL;
}
}
return s7_SUCCESS;
}
/* Handle addi/addi.c/addis.c/cmpi.c/addis.c/ldi. */
static void
s7_do_rdsi16 (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_data_op2 (&str, 1, _SIMM16) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
return;
/* ldi. */
if ((s7_inst.instruction & 0x20c0000) == 0x20c0000)
{
if ((((s7_inst.instruction >> 20) & 0x10) == 0x10) || ((s7_inst.instruction & 0x1fe00) != 0))
{
s7_inst.relax_inst = 0x8000;
}
else
{
s7_inst.relax_inst |= (s7_inst.instruction >> 1) & 0xff;
s7_inst.relax_inst |= (((s7_inst.instruction >> 20) & 0xf) << 8);
s7_inst.relax_size = 2;
}
}
else if (((s7_inst.instruction >> 20) & 0x10) == 0x10)
{
s7_inst.relax_inst = 0x8000;
}
}
/* Handle subi/subi.c. */
static void
s7_do_sub_rdsi16 (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_data_op2 (&str, 1, _SIMM16_NEG) != (int) s7_FAIL)
s7_end_of_line (str);
}
/* Handle addri/addri.c. */
static void
s7_do_rdrssi14 (char *str) /* -(2^13)~((2^13)-1) */
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL)
s7_data_op2 (&str, 1, _SIMM14);
}
/* Handle subri.c/subri. */
static void
s7_do_sub_rdrssi14 (char *str) /* -(2^13)~((2^13)-1) */
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_data_op2 (&str, 1, _SIMM14_NEG) != (int) s7_FAIL)
s7_end_of_line (str);
}
/* Handle bitclr.c/bitset.c/bittgl.c/slli.c/srai.c/srli.c/roli.c/rori.c/rolic.c. */
static void
s7_do_rdrsi5 (char *str) /* 0~((2^14)-1) */
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_data_op2 (&str, 10, _IMM5) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
return;
if ((((s7_inst.instruction >> 20) & 0x1f) == ((s7_inst.instruction >> 15) & 0x1f))
&& (s7_inst.relax_inst != 0x8000) && (((s7_inst.instruction >> 15) & 0x10) == 0))
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0x1f) << 3) | (((s7_inst.instruction >> 15) & 0xf) << 8);
s7_inst.relax_size = 2;
}
else
s7_inst.relax_inst = 0x8000;
}
/* Handle andri/orri/andri.c/orri.c. */
static void
s7_do_rdrsi14 (char *str) /* 0 ~ ((2^14)-1) */
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_data_op2 (&str, 1, _IMM14) != (int) s7_FAIL)
s7_end_of_line (str);
}
/* Handle bittst.c. */
static void
s7_do_xrsi5 (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_data_op2 (&str, 10, _IMM5) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
return;
if ((s7_inst.relax_inst != 0x8000) && (((s7_inst.instruction >> 15) & 0x10) == 0))
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0x1f) << 3) | (((s7_inst.instruction >> 15) & 0xf) << 8);
s7_inst.relax_size = 2;
}
else
s7_inst.relax_inst = 0x8000;
}
/* Handle addis/andi/ori/andis/oris/ldis. */
static void
s7_do_rdi16 (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_data_op2 (&str, 1, _IMM16) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
return;
}
static void
s7_do_macro_rdi32hi (char *str)
{
s7_skip_whitespace (str);
/* Do not handle s7_end_of_line(). */
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL)
s7_data_op2 (&str, 1, _VALUE_HI16);
}
static void
s7_do_macro_rdi32lo (char *str)
{
s7_skip_whitespace (str);
/* Do not handle s7_end_of_line(). */
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL)
s7_data_op2 (&str, 1, _VALUE_LO16);
}
/* Handle ldis_pic. */
static void
s7_do_rdi16_pic (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_data_op2 (&str, 1, _IMM16_pic) != (int) s7_FAIL)
s7_end_of_line (str);
}
/* Handle addi_s_pic to generate R_SCORE_GOT_LO16 . */
static void
s7_do_addi_s_pic (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_data_op2 (&str, 1, _SIMM16_pic) != (int) s7_FAIL)
s7_end_of_line (str);
}
/* Handle addi_u_pic to generate R_SCORE_GOT_LO16 . */
static void
s7_do_addi_u_pic (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_data_op2 (&str, 1, _IMM16_LO16_pic) != (int) s7_FAIL)
s7_end_of_line (str);
}
/* Handle mfceh/mfcel/mtceh/mtchl. */
static void
s7_do_rd (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL)
s7_end_of_line (str);
}
static void
s7_do_rs (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
return;
if ((s7_inst.relax_inst != 0x8000) && (((s7_inst.instruction >> 15) & 0x10) == 0))
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0xf) << 8) | (((s7_inst.instruction >> 15) & 0xf) << 4);
s7_inst.relax_size = 2;
}
else
s7_inst.relax_inst = 0x8000;
}
static void
s7_do_i15 (char *str)
{
s7_skip_whitespace (str);
if (s7_data_op2 (&str, 10, _IMM15) != (int) s7_FAIL)
s7_end_of_line (str);
}
static void
s7_do_xi5x (char *str)
{
s7_skip_whitespace (str);
if (s7_data_op2 (&str, 15, _IMM5) == (int) s7_FAIL || s7_end_of_line (str) == (int) s7_FAIL)
return;
if (s7_inst.relax_inst != 0x8000)
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0x1f) << 3);
s7_inst.relax_size = 2;
}
}
static void
s7_do_rdrs (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
return;
if (s7_inst.relax_inst != 0x8000)
{
if (((s7_inst.instruction & 0x7f) == 0x56)) /* adjust mv -> mv! / mlfh! / mhfl! */
{
/* mlfh */
if ((((s7_inst.instruction >> 15) & 0x10) != 0x0) && (((s7_inst.instruction >> 20) & 0x10) == 0))
{
s7_inst.relax_inst = 0x00000001 | (((s7_inst.instruction >> 15) & 0xf) << 4)
| (((s7_inst.instruction >> 20) & 0xf) << 8);
s7_inst.relax_size = 2;
}
/* mhfl */
else if ((((s7_inst.instruction >> 15) & 0x10) == 0x0) && ((s7_inst.instruction >> 20) & 0x10) != 0)
{
s7_inst.relax_inst = 0x00000002 | (((s7_inst.instruction >> 15) & 0xf) << 4)
| (((s7_inst.instruction >> 20) & 0xf) << 8);
s7_inst.relax_size = 2;
}
else if ((((s7_inst.instruction >> 15) & 0x10) == 0x0) && (((s7_inst.instruction >> 20) & 0x10) == 0))
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0xf) << 4)
| (((s7_inst.instruction >> 20) & 0xf) << 8);
s7_inst.relax_size = 2;
}
else
{
s7_inst.relax_inst = 0x8000;
}
}
else if ((((s7_inst.instruction >> 15) & 0x10) == 0x0) && (((s7_inst.instruction >> 20) & 0x10) == 0))
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 15) & 0xf) << 4)
| (((s7_inst.instruction >> 20) & 0xf) << 8);
s7_inst.relax_size = 2;
}
else
{
s7_inst.relax_inst = 0x8000;
}
}
}
/* Handle mfcr/mtcr. */
static void
s7_do_rdcrs (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE_CR) != (int) s7_FAIL)
s7_end_of_line (str);
}
/* Handle mfsr/mtsr. */
static void
s7_do_rdsrs (char *str)
{
s7_skip_whitespace (str);
/* mfsr */
if ((s7_inst.instruction & 0xff) == 0x50)
{
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE_SR) != (int) s7_FAIL)
s7_end_of_line (str);
}
else
{
if (s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL)
s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE_SR);
}
}
/* Handle neg. */
static void
s7_do_rdxrs (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 20, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
return;
if ((s7_inst.relax_inst != 0x8000) && (((s7_inst.instruction >> 10) & 0x10) == 0)
&& (((s7_inst.instruction >> 20) & 0x10) == 0))
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0xf) << 4) | (((s7_inst.instruction >> 20) & 0xf) << 8);
s7_inst.relax_size = 2;
}
else
s7_inst.relax_inst = 0x8000;
}
/* Handle cmp.c/cmp<cond>. */
static void
s7_do_rsrs (char *str)
{
s7_skip_whitespace (str);
if (s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
return;
if ((s7_inst.relax_inst != 0x8000) && (((s7_inst.instruction >> 20) & 0x1f) == 3)
&& (((s7_inst.instruction >> 10) & 0x10) == 0) && (((s7_inst.instruction >> 15) & 0x10) == 0))
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 10) & 0xf) << 4) | (((s7_inst.instruction >> 15) & 0xf) << 8);
s7_inst.relax_size = 2;
}
else
s7_inst.relax_inst = 0x8000;
}
static void
s7_do_ceinst (char *str)
{
char *strbak;
strbak = str;
s7_skip_whitespace (str);
if (s7_data_op2 (&str, 20, _IMM5) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_reg_required_here (&str, 15, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_reg_required_here (&str, 10, s7_REG_TYPE_SCORE) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_data_op2 (&str, 5, _IMM5) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_data_op2 (&str, 0, _IMM5) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
{
return;
}
else
{
str = strbak;
if (s7_data_op2 (&str, 0, _IMM25) == (int) s7_FAIL)
return;
}
}
static int
s7_reglow_required_here (char **str, int shift)
{
static char buff[s7_MAX_LITERAL_POOL_SIZE];
int reg;
char *start = *str;
if ((reg = s7_score_reg_parse (str, s7_all_reg_maps[s7_REG_TYPE_SCORE].htab)) != (int) s7_FAIL)
{
if ((reg == 1) && (s7_nor1 == 1) && (s7_inst.bwarn == 0))
{
as_warn (_("Using temp register(r1)"));
s7_inst.bwarn = 1;
}
if (reg < 16)
{
if (shift >= 0)
s7_inst.instruction |= reg << shift;
return reg;
}
}
/* Restore the start point, we may have got a reg of the wrong class. */
*str = start;
sprintf (buff, _("low register(r0-r15)expected, not '%.100s'"), start);
s7_inst.error = buff;
return (int) s7_FAIL;
}
/* Handle addc!/add!/and!/cmp!/neg!/not!/or!/sll!/srl!/sra!/xor!/sub!. */
static void
s7_do16_rdrs (char *str)
{
s7_skip_whitespace (str);
if (s7_reglow_required_here (&str, 8) == (int) s7_FAIL
|| s7_skip_past_comma (&str) == (int) s7_FAIL
|| s7_reglow_required_here (&str, 4) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
{
return;
}
else
{
if ((s7_inst.instruction & 0x700f) == 0x2003) /* cmp! */
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 15)
| (((s7_inst.instruction >> 4) & 0xf) << 10);
}
else if ((s7_inst.instruction & 0x700f) == 0x2006) /* not! */
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20)
| (((s7_inst.instruction >> 4) & 0xf) << 15);
}
else if ((s7_inst.instruction & 0x700f) == 0x1009) /* mazh.f! */
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 15)
| (((s7_inst.instruction >> 4) & 0xf) << 10);
}
else
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 20)
| (((s7_inst.instruction >> 8) & 0xf) << 15) | (((s7_inst.instruction >> 4) & 0xf) << 10);
}
s7_inst.relax_size = 4;
}
}
static void
s7_do16_rs (char *str)
{
int rd = 0;
s7_skip_whitespace (str);
if ((rd = s7_reglow_required_here (&str, 4)) == (int) s7_FAIL
|| s7_end_of_line (str) == (int) s7_FAIL)
{
return;
}
else
{
s7_inst.relax_inst |= rd << 20;
s7_inst.relax_size = 4;
}
}
/* Handle br!/brl!. */
static void
s7_do16_xrs (char *str)
{
s7_skip_whitespace (str);
if (s7_reglow_required_here (&str, 4) == (int) s7_FAIL || s7_end_of_line (str) == (int) s7_FAIL)
{
return;
}
else
{
s7_inst.relax_inst |= (((s7_inst.instruction >> 8) & 0xf) << 10)
| (((s7_inst.instruction >> 4) & 0xf) << 15);
s7_inst.relax_size = 4;
}
}
static int
s7_reghigh_required_here (char **str, int shift)
{
static char buff[s7_MAX_LITERAL_POOL_SIZE];
int reg;
char *start = *str;
if ((reg = s7_score_reg_parse (str, s7_all_reg_maps[s7_REG_TYPE_SCORE].htab)) != (int) s7_FAIL)
{
if (15 < reg && reg < 32)
{
if (shift >= 0)
s7_inst.instruction |= (reg & 0xf) << shift;
return reg;
}
}
*str = start;
sprintf (buff, _("high register(r16-r31)expected, not '%.100s'"), start);
s7_inst.error = buff;
return (int) s7_FAIL;
}
/* Handle mhfl!. */
static void
s7_do16_hrdrs (char *str)
{
s7_skip_whitespace (str);
if (s7_reghigh_required_here (&str, 8) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_reglow_required_here (&str, 4) != (int) s7_FAIL
&& s7_end_of_line (str) != (int) s7_FAIL)
{
s7_inst.relax_inst |= ((((s7_inst.instruction >> 8) & 0xf) | 0x10) << 20)
| (((s7_inst.instruction >> 4) & 0xf) << 15) | (0xf << 10);
s7_inst.relax_size = 4;
}
}
/* Handle mlfh!. */
static void
s7_do16_rdhrs (char *str)
{
s7_skip_whitespace (str);
if (s7_reglow_required_here (&str, 8) != (int) s7_FAIL
&& s7_skip_past_comma (&str) != (int) s7_FAIL
&& s7_reghigh_required_here (&str, 4) != (int) s7_FAIL