# Secure second stage
MRS W0, VSTTBR_EL2
MRS W0, VSTCR_EL2

# Timer changes
MRS W0, CNTP_TVAL_EL0
MRS W0, CNTP_CTL_EL0
MRS W0, CNTP_CVAL_EL0
MRS W0, CNTV_TVAL_EL0
MRS W0, CNTV_CTL_EL0
MRS W0, CNTV_CVAL_EL0

MRS W0, CNTHVS_TVAL_EL2
MRS W0, CNTHVS_CVAL_EL2
MRS W0, CNTHVS_CTL_EL2
MRS W0, CNTHPS_TVAL_EL2
MRS W0, CNTHPS_CVAL_EL2
MRS W0, CNTHPS_CTL_EL2

# Debug state
MRS W0, SDER32_EL2

# Nested Virtualization
MRS W0, VNCR_EL2

# PSTATE
MSR DIT, #01
MSR DIT, W0
MRS W0, DIT

# TLB Maintenance instructions
TLBI VMALLE1OS
TLBI VAE1OS, W0
TLBI ASIDE1OS, W0
TLBI VAAE1OS, W0
TLBI VALE1OS, W0
TLBI VAALE1OS, W0
TLBI IPAS2E1OS, W0
TLBI IPAS2LE1OS, W0
TLBI VAE2OS, W0
TLBI VALE2OS, W0
TLBI VMALLS12E1OS
TLBI VAE3OS, W0
TLBI VALE3OS, W0
TLBI ALLE2OS
TLBI ALLE1OS
TLBI ALLE3OS

# TLB Range Maintenance Instructions
TLBI RVAE1, W0
TLBI RVAAE1, W0
TLBI RVALE1, W0
TLBI RVAALE1, W0
TLBI RVAE1IS, W0
TLBI RVAAE1IS, W0
TLBI RVALE1IS, W0
TLBI RVAALE1IS, W0
TLBI RVAE1OS, W0
TLBI RVAAE1OS, W0
TLBI RVALE1OS, W0
TLBI RVAALE1OS, W0
TLBI RIPAS2E1IS, W0
TLBI RIPAS2LE1IS, W0
TLBI RIPAS2E1, W0
TLBI RIPAS2LE1, W0
TLBI RIPAS2E1OS, W0
TLBI RIPAS2LE1OS, W0
TLBI RVAE2, W0
TLBI RVALE2, W0
TLBI RVAE2IS, W0
TLBI RVALE2IS, W0
TLBI RVAE2OS, W0
TLBI RVALE2OS, W0
TLBI RVAE3, W0
TLBI RVALE3, W0
TLBI RVAE3IS, W0
TLBI RVALE3IS, W0
TLBI RVAE3OS, W0
TLBI RVALE3OS, W0