| # Makefile template for configure for the or1k simulator |
| # Copyright (C) 2017-2021 Free Software Foundation, Inc. |
| # |
| # This file is part of GDB, the GNU debugger. |
| # |
| # This program is free software; you can redistribute it and/or modify |
| # it under the terms of the GNU General Public License as published by |
| # the Free Software Foundation; either version 3 of the License, or |
| # (at your option) any later version. |
| # |
| # This program is distributed in the hope that it will be useful, |
| # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| # GNU General Public License for more details. |
| # |
| # You should have received a copy of the GNU General Public License |
| # along with this program. If not, see <http://www.gnu.org/licenses/>. |
| |
| ## COMMON_PRE_CONFIG_FRAG |
| |
| OR1K_OBJS = \ |
| or1k.o \ |
| arch.o \ |
| cpu.o \ |
| decode.o \ |
| model.o \ |
| sem.o \ |
| mloop.o \ |
| sim-if.o \ |
| traps.o |
| |
| SIM_OBJS = \ |
| $(SIM_NEW_COMMON_OBJS) \ |
| cgen-utils.o \ |
| cgen-trace.o \ |
| cgen-scache.o \ |
| cgen-run.o \ |
| cgen-fpu.o \ |
| cgen-accfp.o |
| |
| SIM_OBJS += $(OR1K_OBJS) |
| |
| # Extra headers included by sim-main.h. |
| SIM_EXTRA_DEPS = \ |
| $(CGEN_INCLUDE_DEPS) \ |
| or1k-sim.h \ |
| $(srcdir)/../../opcodes/or1k-desc.h \ |
| arch.h \ |
| cpuall.h \ |
| decode.h |
| |
| SIM_EXTRA_CFLAGS = |
| |
| SIM_EXTRA_LIBS = -lm |
| |
| SIM_EXTRA_CLEAN = or1k-clean |
| |
| # Code doesn't build cleanly yet. |
| SIM_WERROR_CFLAGS = |
| |
| ## COMMON_POST_CONFIG_FRAG |
| |
| arch = or1k |
| |
| # or1k32bf |
| |
| OR1K32BF_INCLUDE_DEPS = \ |
| $(CGEN_MAIN_CPU_DEPS) \ |
| cpu.h \ |
| decode.h \ |
| eng.h |
| |
| mloop.c eng.h: stamp-mloop ; @true |
| stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile |
| $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ |
| -mono -fast -pbb -switch sem-switch.c \ |
| -cpu or1k32bf -infile $(srcdir)/mloop.in |
| $(SHELL) $(srcroot)/move-if-change eng.hin eng.h |
| $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c |
| touch stamp-mloop |
| or1k.o: or1k.c $(OR1K32BF_INCLUDE_DEPS) |
| $(COMPILE) $< |
| $(POSTCOMPILE) |
| |
| sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h eng.h |
| $(COMPILE) $< |
| $(POSTCOMPILE) |
| |
| traps.o: traps.c $(SIM_MAIN_DEPS) eng.h |
| $(COMPILE) $< |
| $(POSTCOMPILE) |
| |
| or1k-clean: |
| rm -f mloop.c eng.h stamp-mloop |
| |
| stamps: stamp-arch stamp-cpu stamp-mloop |
| |
| # NOTE: Generated source files are specified as full paths, |
| # e.g. $(srcdir)/arch.c, because make may decide the files live |
| # in objdir otherwise. |
| |
| OR1K_CGEN_DEPS = \ |
| $(CPU_DIR)/or1k.cpu \ |
| $(CPU_DIR)/or1k.opc \ |
| $(CPU_DIR)/or1kcommon.cpu \ |
| $(CPU_DIR)/or1korbis.cpu \ |
| $(CPU_DIR)/or1korfpx.cpu \ |
| Makefile |
| |
| stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(OR1K_CGEN_DEPS) |
| $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) \ |
| mach=or32,or32nd \ |
| archfile=$(CPU_DIR)/or1k.cpu \ |
| FLAGS="with-scache" |
| touch $@ |
| $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch |
| @true |
| |
| stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(OR1K_CGEN_DEPS) |
| $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ |
| cpu=or1k32bf \ |
| mach=or32,or32nd \ |
| archfile=$(CPU_DIR)/or1k.cpu \ |
| FLAGS="with-scache" \ |
| EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" |
| touch $@ |
| $(srcdir)/cpu.h $(srcdir)/cpu.c $(srcdir)/model.c $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu |
| @true |