)]}'
{
  "commit": "7919e5667cf6607a3d7e28b1fa7f15f3c49a4e55",
  "tree": "28d8cd75aa781911c522ef5e56d677bfdc525c2d",
  "parents": [
    "6a778a2100901f665ed087d069e5c962bd4c93d7"
  ],
  "author": {
    "name": "Jan Beulich",
    "email": "jbeulich@suse.com",
    "time": "Fri Mar 04 13:37:59 2022 +0100"
  },
  "committer": {
    "name": "Jan Beulich",
    "email": "jbeulich@suse.com",
    "time": "Fri Mar 04 13:37:59 2022 +0100"
  },
  "message": "RISC-V: make .insn actually work for 64-bit insns\n\nPresently in this case, due to an undefined behavior shift, at least\nwith x86 cross builds I\u0027m observing:\n\nError: value conflicts with instruction length `8,0x0000003f\u0027\n\nEliminate the UB and extend the respective testcase.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "322e0f070baab8c1e8a1cfe942b4152b9158f49c",
      "old_mode": 33188,
      "old_path": "gas/config/tc-riscv.c",
      "new_id": "9cc0abfda8811d8915dcc620afe17e4606b1c30c",
      "new_mode": 33188,
      "new_path": "gas/config/tc-riscv.c"
    },
    {
      "type": "modify",
      "old_id": "e55030ea460d6459ebb283db54eb8ad401f0fc5e",
      "old_mode": 33188,
      "old_path": "gas/testsuite/gas/riscv/insn.d",
      "new_id": "b5780f42861857cf885d9b257ba0e9528790cfb1",
      "new_mode": 33188,
      "new_path": "gas/testsuite/gas/riscv/insn.d"
    },
    {
      "type": "modify",
      "old_id": "e47f529040de8db8e82113f7a4d332c1848ead3d",
      "old_mode": 33188,
      "old_path": "gas/testsuite/gas/riscv/insn.s",
      "new_id": "ec41acb30bd397c6a27a6dff43bafdf5181fa551",
      "new_mode": 33188,
      "new_path": "gas/testsuite/gas/riscv/insn.s"
    }
  ]
}