)]}'
{
  "commit": "79d72f45a7c9b8b92c7d0452caf968b6709a0d44",
  "tree": "1cfe668a14e35d6787222a7d6ab4ff159af70597",
  "parents": [
    "bb7b70ab85fb9d185d1fa6bad192c90fe9c17ff3"
  ],
  "author": {
    "name": "Hongtao Liu",
    "email": "hongtao.liu@intel.com",
    "time": "Tue Mar 03 06:21:37 2020 -0800"
  },
  "committer": {
    "name": "H.J. Lu",
    "email": "hjl.tools@gmail.com",
    "time": "Tue Mar 03 06:21:37 2020 -0800"
  },
  "message": "x86: Improve -malign-branch\n\nAccording to intel SDM manual, not all compare flag-modifying instructions\nare marcro-fusible with subsequent jcc instructions. For those non-fusible\ninstructions, -malign-branch doesn\u0027t need to align them, only jcc itself\nneeds to be aligned.\n\nHere are 2 restrictions which separate macro-fusible instruction from not\n\nRestriction 1:\nIf TEST/AND/CMP/ADD/SUB/INC/DEC is one of the following format:\n\n   cmp m, imm\n   add m, imm\n   sub m, imm\n   test m, imm\n   and m, imm\n   inc m\n   dec m\n\nit is unfusible with any jcc instruction.\n\nRestriction 2:\n\n/* Table 3-2. Macro-Fusible Instructions in Haswell Microarchitecture\n   Note it also works for Skylake and Cascadelake.\n---------------------------------------------------------------------\n|   JCC   | ADD/SUB/CMP | INC/DEC | TEST/AND |\n| ------  | ----------- | ------- | -------- |\n|   Jo    |      N      |    N    |     Y    |\n|   Jno   |      N      |    N    |     Y    |\n|  Jc/Jb  |      Y      |    N    |     Y    |\n| Jae/Jnb |      Y      |    N    |     Y    |\n|  Je/Jz  |      Y      |    Y    |     Y    |\n| Jne/Jnz |      Y      |    Y    |     Y    |\n| Jna/Jbe |      Y      |    N    |     Y    |\n| Ja/Jnbe |      Y      |    N    |     Y    |\n|   Js    |      N      |    N    |     Y    |\n|   Jns   |      N      |    N    |     Y    |\n|  Jp/Jpe |      N      |    N    |     Y    |\n| Jnp/Jpo |      N      |    N    |     Y    |\n| Jl/Jnge |      Y      |    Y    |     Y    |\n| Jge/Jnl |      Y      |    Y    |     Y    |\n| Jle/Jng |      Y      |    Y    |     Y    |\n| Jg/Jnle |      Y      |    Y    |     Y    |\n\nUpdate maybe_fused_with_jcc_p to check if operands of CMP like instructions\ncan be fused with condition jump.\n\n\t* gas/config/tc-i386.h (i386_tc_frag_data): Add member mf_type.\n\t(TC_FRAG_INIT): Init mf_type.\n\t* gas/config/tc-i386.c (enum mf_jcc_kind): New enum.\n\t(enum mf_cmp_kind): Ditto.\n\t(maybe_fused_with_jcc_p): Add argument mf_cmp_p to get\n\tmf_type of corresponding instructons, exclude unfusible\n\tinstructions.\n\t(add_fused_jcc_padding_frag_p): Likewise.\n\t(add_branch_padding_frag_p): Likewise.\n\t(output_insn): Record mf_type for corresponding instructions.\n\t(i386_macro_fusible_p): New function.\n\t(i386_next_fusible_jcc_frag): Rename from i386_next_jcc_frag,\n\tadd argument cmp_fragP to return next fusible jcc frag only.\n\t(i386_classify_machine_dependant_frag): Seperate macro-fusible\n\tinstructions from condition jump.\n\t* gas/testsuite/gas/i386/align-branch-9.s: New file.\n\t* gas/testsuite/gas/i386/align-branch-9.d: Ditto.\n\t* gas/testsuite/gas/i386/x86-64-align-branch-9.s: Ditto.\n\t* gas/testsuite/gas/i386/x86-64-align-branch-9.d: Ditto.\n\t* gas/testsuite/gas/i386/i386.exp: Run new tests.\n",
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