)]}'
{
  "commit": "98439a80cce3ba652ef4bd4cc69c0b7a04c2c60e",
  "tree": "c728982c5a76b97868109fb20f58e06321c046b0",
  "parents": [
    "57722967554367f0a0f5482c54206f2c94c00433"
  ],
  "author": {
    "name": "Kong Lingling",
    "email": "lingling.kong@intel.com",
    "time": "Tue Dec 03 15:34:05 2024 +0800"
  },
  "committer": {
    "name": "Haochen Jiang",
    "email": "haochen.jiang@intel.com",
    "time": "Tue Dec 03 15:34:05 2024 +0800"
  },
  "message": "Support Intel AVX10.2 BF16 instructions\n\nIn this patch, we will support AVX10.2 BF16 instructions. All of them\nare new instructions forms. In current documentation, it is still\nVSCALEFPBF16, but it will change to VSCALEFNEPBF16 eventually.\n\nIn disassembler part, we added %XB to reduce W table pass since all\nof them get evex.w\u003d0.\n\ngas/Changelog:\n\n\t* testsuite/gas/i386/i386.exp: Add AVX10.2 tests.\n\t* testsuite/gas/i386/x86-64.exp: Ditto.\n\t* testsuite/gas/i386/avx10_2-256-bf16-intel.d: New.\n\t* testsuite/gas/i386/avx10_2-256-bf16.d: Ditto.\n\t* testsuite/gas/i386/avx10_2-256-bf16.s: Ditto.\n\t* testsuite/gas/i386/avx10_2-512-bf16-intel.d: Ditto.\n\t* testsuite/gas/i386/avx10_2-512-bf16.d: Ditto.\n\t* testsuite/gas/i386/avx10_2-512-bf16.s: Ditto.\n\t* testsuite/gas/i386/x86-64-avx10_2-256-bf16-intel.d: Ditto.\n\t* testsuite/gas/i386/x86-64-avx10_2-256-bf16.d: Ditto.\n\t* testsuite/gas/i386/x86-64-avx10_2-256-bf16.s: Ditto.\n\t* testsuite/gas/i386/x86-64-avx10_2-512-bf16-intel.d: Ditto.\n\t* testsuite/gas/i386/x86-64-avx10_2-512-bf16.d: Ditto.\n\t* testsuite/gas/i386/x86-64-avx10_2-512-bf16.s: Ditto.\n\nopcodes/\n\n\t* i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A26,\n\tPREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A66, PREFIX_EVEX_0F3AC2,\n\tPREFIX_EVEX_MAP5_2F, PREFIX_EVEX_MAP5_51, PREFIX_EVEX_MAP5_58,\n\tPREFIX_EVEX_MAP5_59, PREFIX_EVEX_MAP5_5C, PREFIX_EVEX_MAP5_5D,\n\tPREFIX_EVEX_MAP5_5E, PREFIX_EVEX_MAP5_5F.\n\tAdd PREFIX_EVEX_MAP6_2C, PREFIX_EVEX_MAP6_4C, PREFIX_EVEX_MAP6_4E,\n\tPREFIX_EVEX_MAP6_98, PREFIX_EVEX_MAP6_9A, PREFIX_EVEX_MAP6_9C,\n\tPREFIX_EVEX_MAP6_9E, PREFIX_EVEX_MAP6_A8, PREFIX_EVEX_MAP6_AA,\n\tPREFIX_EVEX_MAP6_AC, PREFIX_EVEX_MAP6_AE, PREFIX_EVEX_MAP6_B8,\n\tPREFIX_EVEX_MAP6_BA, PREFIX_EVEX_MAP6_BC, PREFIX_EVEX_MAP6_BE.\n\t* i386-dis-evex.h (evex_table): Update PREFIX_EVEX_MAP6_2C,\n\tPREFIX_EVEX_MAP6_42, PREFIX_EVEX_MAP6_4C, PREFIX_EVEX_MAP6_4E,\n\tPREFIX_EVEX_MAP6_98, PREFIX_EVEX_MAP6_9A, PREFIX_EVEX_MAP6_9C,\n\tPREFIX_EVEX_MAP6_9E, PREFIX_EVEX_MAP6_A8, PREFIX_EVEX_MAP6_AA,\n\tPREFIX_EVEX_MAP6_AC, PREFIX_EVEX_MAP6_AE, PREFIX_EVEX_MAP6_B8,\n\tPREFIX_EVEX_MAP6_BA, PREFIX_EVEX_MAP6_BC, PREFIX_EVEX_MAP6_BE.\n\t* i386-dis.c (PREFIX_EVEX_MAP6_2C): New enum.\n\t(PREFIX_EVEX_MAP6_42): Ditto.\n\t(PREFIX_EVEX_MAP6_4C): Ditto.\n\t(PREFIX_EVEX_MAP6_4E): Ditto.\n\t(PREFIX_EVEX_MAP6_98): Ditto.\n\t(PREFIX_EVEX_MAP6_9A): Ditto.\n\t(PREFIX_EVEX_MAP6_9C): Ditto.\n\t(PREFIX_EVEX_MAP6_9E): Ditto.\n\t(PREFIX_EVEX_MAP6_A8): Ditto.\n\t(PREFIX_EVEX_MAP6_AA): Ditto.\n\t(PREFIX_EVEX_MAP6_AC): Ditto.\n\t(PREFIX_EVEX_MAP6_AE): Ditto.\n\t(PREFIX_EVEX_MAP6_B8): Ditto.\n\t(PREFIX_EVEX_MAP6_BA): Ditto.\n\t(PREFIX_EVEX_MAP6_BC): Ditto.\n\t(PREFIX_EVEX_MAP6_BE): Ditto.\n\t(putop): Handle %XB.\n\t* i386-opc.tbl: Add AVX10.2 instructions.\n\t* i386-mnem.h: Regenerated.\n\t* i386-tbl.h: Ditto.\n\nCo-authored-by: Haochen Jiang \u003chaochen.jiang@intel.com\u003e\n",
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