| commit | 9b4b518eceaa1f59acfb88013406b4203f6a3016 | [log] [tgz] |
|---|---|---|
| author | Kito Cheng <kito.cheng@sifive.com> | Wed Jun 11 16:33:49 2025 +0800 |
| committer | Nelson Chu <nelson@rivosinc.com> | Tue Jun 24 18:14:45 2025 +0800 |
| tree | b4164fe767affa3a4e07b121246d21499f3bc02f | |
| parent | 84eb7d284b3ae07ee894a1f21defc3c9669297b7 [diff] |
RISC-V: Support for unlabeled landing pad PLT generation This patch adds support for generating unlabeled landing pad PLT entries for the RISC-V architecture. Unlabeled landing pad will place a LPAD instruction at the PLT entry and PLT header, also PLT header will have few changes due to the offset is different from the original one. Ref: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/417