blob: af29cb909c4ff049648e3c6a8d012d8ac6692f2b [file] [log] [blame]
# frv testcase for fbeqlr $FCCi,$hint
# mach: all
.include "testutils.inc"
start
.global fbeqlr
fbeqlr:
set_spr_addr bad,lr
set_fcc 0x0 0
fbeqlr fcc0,0
set_spr_addr bad,lr
set_fcc 0x1 1
fbeqlr fcc1,1
set_spr_addr bad,lr
set_fcc 0x2 2
fbeqlr fcc2,2
set_spr_addr bad,lr
set_fcc 0x3 3
fbeqlr fcc3,3
set_spr_addr bad,lr
set_fcc 0x4 0
fbeqlr fcc0,0
set_spr_addr bad,lr
set_fcc 0x5 1
fbeqlr fcc1,1
set_spr_addr bad,lr
set_fcc 0x6 2
fbeqlr fcc2,2
set_spr_addr bad,lr
set_fcc 0x7 3
fbeqlr fcc3,3
set_spr_addr ok9,lr
set_fcc 0x8 0
fbeqlr fcc0,0
fail
ok9:
set_spr_addr oka,lr
set_fcc 0x9 1
fbeqlr fcc1,1
fail
oka:
set_spr_addr okb,lr
set_fcc 0xa 2
fbeqlr fcc2,2
fail
okb:
set_spr_addr okc,lr
set_fcc 0xb 3
fbeqlr fcc3,3
fail
okc:
set_spr_addr okd,lr
set_fcc 0xc 0
fbeqlr fcc0,0
fail
okd:
set_spr_addr oke,lr
set_fcc 0xd 1
fbeqlr fcc1,1
fail
oke:
set_spr_addr okf,lr
set_fcc 0xe 2
fbeqlr fcc2,2
fail
okf:
set_spr_addr okg,lr
set_fcc 0xf 3
fbeqlr fcc3,3
fail
okg:
pass
bad:
fail