)]}'
{
  "commit": "a61beb42b0a12a8495755f95f9f4b97d7652b589",
  "tree": "7f127e2904fa0b1fc11fe30b4d1f73ba47e1cbae",
  "parents": [
    "6a83ffd4e93607684c2036681f0de1641870ef52"
  ],
  "author": {
    "name": "Xiao Zeng",
    "email": "zengxiao@eswincomputing.com",
    "time": "Mon Jan 06 09:14:34 2025 +0800"
  },
  "committer": {
    "name": "Nelson Chu",
    "email": "nelson@rivosinc.com",
    "time": "Mon Jan 06 11:04:40 2025 +0800"
  },
  "message": "RISC-V: Eliminate redundant instruction macro\n\ninclude/ChangeLog:\n\n\t* opcode/riscv.h: Eliminate redundant instruction macro M_j.\n\nSigned-off-by: Xiao Zeng \u003czengxiao@eswincomputing.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "384107fbc20fa6178126232ebf99cf30a9ae9b1b",
      "old_mode": 33188,
      "old_path": "include/opcode/riscv.h",
      "new_id": "de4c13fb6dbcbbce03c5edcc3b25263c6dc5715a",
      "new_mode": 33188,
      "new_path": "include/opcode/riscv.h"
    }
  ]
}