)]}'
{
  "commit": "a9ba8bc2d396fb8ae2b892f3bc6be8cdfe4b555c",
  "tree": "2f67d6d6a2d2254ea43a2d3a0956903eb28b7fde",
  "parents": [
    "fb1737381d886c7c0a4e870af078c473ac463fce"
  ],
  "author": {
    "name": "Christoph Müllner",
    "email": "christoph.muellner@vrull.eu",
    "time": "Tue Jun 28 17:43:20 2022 +0200"
  },
  "committer": {
    "name": "Philipp Tomsich",
    "email": "philipp.tomsich@vrull.eu",
    "time": "Thu Sep 22 18:06:09 2022 +0200"
  },
  "message": "RISC-V: Add T-Head CMO vendor extension\n\nT-Head has a range of vendor-specific instructions.\nTherefore it makes sense to group them into smaller chunks\nin form of vendor extensions.\n\nThis patch adds the XTheadCmo extension, a collection of T-Head specific\ncache management operations.\nThe \u0027th\u0027 prefix and the \"XTheadCmo\" extension are documented in a PR\nfor the RISC-V toolchain conventions ([1]).\n\nIn total XTheadCmo introduces the following 21 instructions:\n\n* DCACHE.{C,CI,I}ALL\n* DCACHE.{C,CI,I}{PA,VA,SW} rs1\n* DCACHE.C{PAL1,VAL1} rs1\n* ICACHE.I{ALL,ALLS}\n* ICACHE.I{PA,VA} rs1\n* L2CACHE.{C,CI,I}ALL\n\nContrary to Zicbom, the XTheadCmo instructions don\u0027t have a constant\ndisplacement, therefore we have a different syntax for the arguments.\nTo clarify this is intended behaviour, there is a set of negative test\nfor Zicbom-style arguments in x-thead-cmo-fail.s.\n\n[1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19\n\nv2:\n- Add missing DECLARE_INSN() list\n- Fix ordering\n\nCo-developed-by: Lifang Xia \u003clifang_xia@linux.alibaba.com\u003e\nSigned-off-by: Christoph Müllner \u003cchristoph.muellner@vrull.eu\u003e\n",
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