# Intel(r) Wireless MMX(tm) technology testcase for WSAD
# mach: xscale
# as: -mcpu=xscale+iwmmxt

	.include "testutils.inc"

	start

	.global wsad
wsad:
	# Enable access to CoProcessors 0 & 1 before
        # we attempt these instructions.

	mvi_h_gr   r1, 3
	mcr        p15, 0, r1, cr15, cr1, 0

	# Test Byte wide absolute accumulation
	
	mvi_h_gr   r0, 0x12345678
	mvi_h_gr   r1, 0x9abcdef0
	mvi_h_gr   r2, 0x11111111
	mvi_h_gr   r3, 0x22222222
	mvi_h_gr   r4, 0x22222222
	mvi_h_gr   r5, 0x22222222

	tmcrr	   wr0, r0, r1
	tmcrr	   wr1, r2, r3
	tmcrr	   wr2, r4, r5

	wsadb	   wr2, wr0, wr1
	
	tmrrc	   r0, r1, wr0
	tmrrc	   r2, r3, wr1
	tmrrc	   r4, r5, wr2
	
	test_h_gr  r0, 0x12345678
	test_h_gr  r1, 0x9abcdef0
	test_h_gr  r2, 0x11111111
	test_h_gr  r3, 0x22222222
	test_h_gr  r4, 0x2222258e
	test_h_gr  r5, 0x00000000
	
	# Test Byte wide absolute accumulation with zeroing
	
	mvi_h_gr   r0, 0x12345678
	mvi_h_gr   r1, 0x9abcdef0
	mvi_h_gr   r2, 0x11111111
	mvi_h_gr   r3, 0x22222222
	mvi_h_gr   r4, 0x22222222
	mvi_h_gr   r5, 0x22222222

	tmcrr	   wr0, r0, r1
	tmcrr	   wr1, r2, r3
	tmcrr	   wr2, r4, r5

	wsadbz	   wr2, wr0, wr1
	
	tmrrc	   r0, r1, wr0
	tmrrc	   r2, r3, wr1
	tmrrc	   r4, r5, wr2
	
	test_h_gr  r0, 0x12345678
	test_h_gr  r1, 0x9abcdef0
	test_h_gr  r2, 0x11111111
	test_h_gr  r3, 0x22222222
	test_h_gr  r4, 0x0000036c
	test_h_gr  r5, 0x00000000
	
	# Test Halfword wide absolute accumulation
	
	mvi_h_gr   r0, 0x12345678
	mvi_h_gr   r1, 0x9abcdef0
	mvi_h_gr   r2, 0x11111111
	mvi_h_gr   r3, 0x22222222
	mvi_h_gr   r4, 0x22222222
	mvi_h_gr   r5, 0x22222222

	tmcrr	   wr0, r0, r1
	tmcrr	   wr1, r2, r3
	tmcrr	   wr2, r4, r5

	wsadh	   wr2, wr0, wr1
	
	tmrrc	   r0, r1, wr0
	tmrrc	   r2, r3, wr1
	tmrrc	   r4, r5, wr2
	
	test_h_gr  r0, 0x12345678
	test_h_gr  r1, 0x9abcdef0
	test_h_gr  r2, 0x11111111
	test_h_gr  r3, 0x22222222
	test_h_gr  r4, 0x22239e14
	test_h_gr  r5, 0x00000000
	
	# Test Halfword wide absolute accumulation with zeroing
	
	mvi_h_gr   r0, 0x12345678
	mvi_h_gr   r1, 0x9abcdef0
	mvi_h_gr   r2, 0x11111111
	mvi_h_gr   r3, 0x22222222
	mvi_h_gr   r4, 0x22222222
	mvi_h_gr   r5, 0x22222222

	tmcrr	   wr0, r0, r1
	tmcrr	   wr1, r2, r3
	tmcrr	   wr2, r4, r5

	wsadhz	   wr2, wr0, wr1
	
	tmrrc	   r0, r1, wr0
	tmrrc	   r2, r3, wr1
	tmrrc	   r4, r5, wr2
	
	test_h_gr  r0, 0x12345678
	test_h_gr  r1, 0x9abcdef0
	test_h_gr  r2, 0x11111111
	test_h_gr  r3, 0x22222222
	test_h_gr  r4, 0x00017bf2
	test_h_gr  r5, 0x00000000

	pass