blob: 62ca6aa7063182eb1ee3ceb07dca2e2002dbd0e6 [file] [log] [blame]
# frv testcase for fbuelr $FCCi,$hint
# mach: all
.include "testutils.inc"
start
.global fbuelr
fbuelr:
set_spr_addr bad,lr
set_fcc 0x0 0
fbuelr fcc0,0
set_spr_addr ok2,lr
set_fcc 0x1 1
fbuelr fcc1,1
fail
ok2:
set_spr_addr bad,lr
set_fcc 0x2 2
fbuelr fcc2,2
set_spr_addr ok4,lr
set_fcc 0x3 3
fbuelr fcc3,3
fail
ok4:
set_spr_addr bad,lr
set_fcc 0x4 0
fbuelr fcc0,0
set_spr_addr ok6,lr
set_fcc 0x5 1
fbuelr fcc1,1
fail
ok6:
set_spr_addr bad,lr
set_fcc 0x6 2
fbuelr fcc2,2
set_spr_addr ok8,lr
set_fcc 0x7 3
fbuelr fcc3,3
fail
ok8:
set_spr_addr ok9,lr
set_fcc 0x8 0
fbuelr fcc0,0
fail
ok9:
set_spr_addr oka,lr
set_fcc 0x9 1
fbuelr fcc1,1
fail
oka:
set_spr_addr okb,lr
set_fcc 0xa 2
fbuelr fcc2,2
fail
okb:
set_spr_addr okc,lr
set_fcc 0xb 3
fbuelr fcc3,3
fail
okc:
set_spr_addr okd,lr
set_fcc 0xc 0
fbuelr fcc0,0
fail
okd:
set_spr_addr oke,lr
set_fcc 0xd 1
fbuelr fcc1,1
fail
oke:
set_spr_addr okf,lr
set_fcc 0xe 2
fbuelr fcc2,2
fail
okf:
set_spr_addr okg,lr
set_fcc 0xf 3
fbuelr fcc3,3
fail
okg:
pass
bad:
fail