blob: 9103cf6874a126687d717f255414a884495085e0 [file] [log] [blame]
# frv testcase for sll $GRi,$GRj,$GRk
# mach: all
.include "testutils.inc"
start
.global sll
sll:
set_gr_limmed 0xdead,0xbee0,gr7 ; Shift by 0
set_gr_immed 2,gr8
set_icc 0x0d,0 ; Set mask opposite of expected
sll gr8,gr7,gr8
test_icc 1 1 0 1 icc0
test_gr_immed 2,gr8
set_gr_limmed 0xdead,0xbee1,gr7 ; Shift by 1
set_gr_immed 2,gr8
set_icc 0x0f,0 ; Set mask opposite of expected
sll gr8,gr7,gr8
test_icc 1 1 1 1 icc0
test_gr_immed 4,gr8
set_gr_limmed 0xdead,0xbeff,gr7 ; Shift by 31
set_gr_immed 1,gr8
set_icc 0x07,0 ; Set mask opposite of expected
sll gr8,gr7,gr8
test_icc 0 1 1 1 icc0
test_gr_limmed 0x8000,0x0000,gr8
set_gr_limmed 0xdead,0xbeff,gr7 ; clear register
set_gr_immed 2,gr8
set_icc 0x0a,0 ; Set mask opposite of expected
sll gr8,gr7,gr8
test_icc 1 0 1 0 icc0
test_gr_immed 0x00000000,gr8
pass