)]}'
{
  "commit": "b1d1eb8ef5044c331816f0d140f67ea9704963d8",
  "tree": "f602cf5ef003b4c6d80a305346afe2e08e41e036",
  "parents": [
    "37ffcc8891d6f0bc953d9434d4c5ba057f60f369"
  ],
  "author": {
    "name": "Luis Machado",
    "email": "luis.machado.foss@gmail.com",
    "time": "Sat Oct 11 11:43:48 2025 +0100"
  },
  "committer": {
    "name": "Luis Machado",
    "email": "luis.machado.foss@gmail.com",
    "time": "Tue Oct 21 21:50:06 2025 +0100"
  },
  "message": "AArch64: Fix SME za register description\n\nPeter Maydell and Vacha Bhavsar pointed out that we have an incorrect\ndescription of the SME za register in the documentation.  It is currently\ndescribed as a vector of SVL x SVL bytes, but that is incorrect.\n\nWhat we really have is a 2-dimensional array of bytes, with each dimension\nhaving size SVL.\n\nChange the documentation to reflect that.\n\nApproved-By: Eli Zaretskii \u003celiz@gnu.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "da211d9c8d6d4259beb9c57000bfcfc0d5a6edab",
      "old_mode": 33188,
      "old_path": "gdb/doc/gdb.texinfo",
      "new_id": "821f3ed4b050d5d504b99e6805b0debf99423834",
      "new_mode": 33188,
      "new_path": "gdb/doc/gdb.texinfo"
    }
  ]
}