)]}'
{
  "commit": "b3fa92f12a83d284db3124e0992e15d1ff31a3d8",
  "tree": "4138893f104f67a5fedaceec04fa7eca776cc20f",
  "parents": [
    "f6149394f9a46d03ff853a0e83aae61441182811"
  ],
  "author": {
    "name": "Jeff Law",
    "email": "jeffreyalaw@gmail.com",
    "time": "Mon Dec 18 22:04:25 2023 -0700"
  },
  "committer": {
    "name": "Jeff Law",
    "email": "jeffreyalaw@gmail.com",
    "time": "Mon Dec 18 22:04:25 2023 -0700"
  },
  "message": "Yet another fix for mcore-sim (rotli)\n\nThis came up testing the CRC optimization work from Mariam@RAU.\nBasically to optimize some CRC loops into table lookups or carryless\nmultiplies, we may need to do a bit reflection, which on the mcore\nprocessor is done using a rotate instruction.\n\nUnfortunately the simulator implementation of rotates has the exact same\nproblem as we saw with right shifts.  The input value may have been sign\nextended from 32 to 64 bits.  When we rotate the extended value, we get\nthose sign extension bits and thus the wrong result.\n\nThe fix is the same.  Rather than using a \"long\", use a uint32_t for the\ntype of the temporary.  This fixes a handful of tests in the GCC testsuite:\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8bfb745a11f236df21d7afacf0b0884578243711",
      "old_mode": 33188,
      "old_path": "sim/mcore/interp.c",
      "new_id": "94e0a1675be7fd9b405632a60eb2ff5187e24236",
      "new_mode": 33188,
      "new_path": "sim/mcore/interp.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "fd9a8994bc5e9bdfc26d04160b146a31b732d12f",
      "new_mode": 33188,
      "new_path": "sim/testsuite/mcore/rotli.s"
    }
  ]
}