| /* LoongArch opcode support. |
| Copyright (C) 2021-2024 Free Software Foundation, Inc. |
| Contributed by Loongson Ltd. |
| |
| This file is part of the GNU opcodes library. |
| |
| This library is free software; you can redistribute it and/or modify |
| it under the terms of the GNU General Public License as published by |
| the Free Software Foundation; either version 3, or (at your option) |
| any later version. |
| |
| It is distributed in the hope that it will be useful, but WITHOUT |
| ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| License for more details. |
| |
| You should have received a copy of the GNU General Public License |
| along with this program; see the file COPYING3. If not, |
| see <http://www.gnu.org/licenses/>. */ |
| |
| #include <stddef.h> |
| #include "opcode/loongarch.h" |
| #include "libiberty.h" |
| |
| struct loongarch_ASEs_option LARCH_opts = |
| { |
| .relax = 1 |
| }; |
| |
| size_t |
| loongarch_insn_length (insn_t insn ATTRIBUTE_UNUSED) |
| { |
| return 4; |
| } |
| |
| const char *const loongarch_r_normal_name[32] = |
| { |
| "$r0", "$r1", "$r2", "$r3", "$r4", "$r5", "$r6", "$r7", |
| "$r8", "$r9", "$r10", "$r11", "$r12", "$r13", "$r14", "$r15", |
| "$r16", "$r17", "$r18", "$r19", "$r20", "$r21", "$r22", "$r23", |
| "$r24", "$r25", "$r26", "$r27", "$r28", "$r29", "$r30", "$r31", |
| }; |
| |
| const char *const loongarch_r_alias[32] = |
| { |
| "$zero", "$ra", "$tp", "$sp", "$a0", "$a1", "$a2", "$a3", |
| "$a4", "$a5", "$a6", "$a7", "$t0", "$t1", "$t2", "$t3", |
| "$t4", "$t5", "$t6", "$t7", "$t8", "$r21","$fp", "$s0", |
| "$s1", "$s2", "$s3", "$s4", "$s5", "$s6", "$s7", "$s8", |
| }; |
| |
| /* Add support for $s9. */ |
| const char *const loongarch_r_alias_1[32] = |
| { |
| "", "", "", "", "", "", "", "", |
| "", "", "", "", "", "", "", "", |
| "", "", "", "", "", "", "$s9", "", |
| "", "", "", "", "", "", "", "", |
| }; |
| |
| const char *const loongarch_r_alias_deprecated[32] = |
| { |
| "", "", "", "", "$v0", "$v1", "", "", "", "", "", "", "", "", "", "", |
| "", "", "", "", "", "$x", "", "", "", "", "", "", "", "", "", "", |
| }; |
| |
| const char *const loongarch_f_normal_name[32] = |
| { |
| "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", |
| "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", |
| "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", |
| "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", |
| }; |
| |
| const char *const loongarch_f_alias[32] = |
| { |
| "$fa0", "$fa1", "$fa2", "$fa3", "$fa4", "$fa5", "$fa6", "$fa7", |
| "$ft0", "$ft1", "$ft2", "$ft3", "$ft4", "$ft5", "$ft6", "$ft7", |
| "$ft8", "$ft9", "$ft10", "$ft11", "$ft12", "$ft13", "$ft14", "$ft15", |
| "$fs0", "$fs1", "$fs2", "$fs3", "$fs4", "$fs5", "$fs6", "$fs7", |
| }; |
| |
| const char *const loongarch_f_alias_deprecated[32] = |
| { |
| "$fv0", "$fv1", "", "", "", "", "", "", "", "", "", "", "", "", "", "", |
| "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", |
| }; |
| |
| const char *const loongarch_fc_normal_name[4] = |
| { |
| "$fcsr0", "$fcsr1", "$fcsr2", "$fcsr3", |
| }; |
| |
| const char *const loongarch_fc_numeric_name[4] = |
| { |
| "$r0", "$r1", "$r2", "$r3", |
| }; |
| |
| const char *const loongarch_c_normal_name[8] = |
| { |
| "$fcc0", "$fcc1", "$fcc2", "$fcc3", "$fcc4", "$fcc5", "$fcc6", "$fcc7", |
| }; |
| |
| const char *const loongarch_cr_normal_name[4] = |
| { |
| "$scr0", |
| "$scr1", |
| "$scr2", |
| "$scr3", |
| }; |
| |
| const char *const loongarch_v_normal_name[32] = |
| { |
| "$vr0", "$vr1", "$vr2", "$vr3", "$vr4", "$vr5", "$vr6", "$vr7", |
| "$vr8", "$vr9", "$vr10", "$vr11", "$vr12", "$vr13", "$vr14", "$vr15", |
| "$vr16", "$vr17", "$vr18", "$vr19", "$vr20", "$vr21", "$vr22", "$vr23", |
| "$vr24", "$vr25", "$vr26", "$vr27", "$vr28", "$vr29", "$vr30", "$vr31", |
| }; |
| |
| const char *const loongarch_x_normal_name[32] = |
| { |
| "$xr0", "$xr1", "$xr2", "$xr3", "$xr4", "$xr5", "$xr6", "$xr7", |
| "$xr8", "$xr9", "$xr10", "$xr11", "$xr12", "$xr13", "$xr14", "$xr15", |
| "$xr16", "$xr17", "$xr18", "$xr19", "$xr20", "$xr21", "$xr22", "$xr23", |
| "$xr24", "$xr25", "$xr26", "$xr27", "$xr28", "$xr29", "$xr30", "$xr31", |
| }; |
| |
| /* Can not use xx_pa for abs. */ |
| |
| /* For LoongArch32 abs. */ |
| #define INSN_LA_ABS32 \ |
| "lu12i.w %1,%%abs_hi20(%2);" \ |
| "ori %1,%1,%%abs_lo12(%2);", \ |
| &LARCH_opts.ase_ilp32, \ |
| &LARCH_opts.ase_lp64 |
| #define INSN_LA_ABS64 \ |
| "lu12i.w %1,%%abs_hi20(%2);" \ |
| "ori %1,%1,%%abs_lo12(%2);" \ |
| "lu32i.d %1,%%abs64_lo20(%2);" \ |
| "lu52i.d %1,%1,%%abs64_hi12(%2);", \ |
| &LARCH_opts.ase_lp64, 0 |
| |
| #define INSN_LA_PCREL32 \ |
| "pcalau12i %1,%%pc_hi20(%2);" \ |
| "addi.w %1,%1,%%pc_lo12(%2);", \ |
| &LARCH_opts.ase_ilp32, \ |
| &LARCH_opts.ase_lp64 |
| #define INSN_LA_PCREL64 \ |
| "pcalau12i %1,%%pc_hi20(%2);" \ |
| "addi.d %1,%1,%%pc_lo12(%2);", \ |
| &LARCH_opts.ase_lp64, 0 |
| #define INSN_LA_PCREL64_LARGE \ |
| "pcalau12i %1,%%pc_hi20(%3);" \ |
| "addi.d %2,$r0,%%pc_lo12(%3);" \ |
| "lu32i.d %2,%%pc64_lo20(%3);" \ |
| "lu52i.d %2,%2,%%pc64_hi12(%3);" \ |
| "add.d %1,%1,%2;", \ |
| &LARCH_opts.ase_lp64, 0 |
| |
| #define INSN_LA_GOT32 \ |
| "pcalau12i %1,%%got_pc_hi20(%2);" \ |
| "ld.w %1,%1,%%got_pc_lo12(%2);", \ |
| &LARCH_opts.ase_ilp32, \ |
| &LARCH_opts.ase_lp64 |
| /* got32 abs. */ |
| #define INSN_LA_GOT32_ABS \ |
| "lu12i.w %1,%%got_hi20(%2);" \ |
| "ori %1,%1,%%got_lo12(%2);" \ |
| "ld.w %1,%1,0;", \ |
| &LARCH_opts.ase_gabs, \ |
| &LARCH_opts.ase_lp64 |
| #define INSN_LA_GOT64 \ |
| "pcalau12i %1,%%got_pc_hi20(%2);" \ |
| "ld.d %1,%1,%%got_pc_lo12(%2);", \ |
| &LARCH_opts.ase_lp64, 0 |
| /* got64 abs. */ |
| #define INSN_LA_GOT64_LARGE_ABS \ |
| "lu12i.w %1,%%got_hi20(%2);" \ |
| "ori %1,%1,%%got_lo12(%2);" \ |
| "lu32i.d %1,%%got64_lo20(%2);" \ |
| "lu52i.d %1,%1,%%got64_hi12(%2);" \ |
| "ld.d %1,%1,0", \ |
| &LARCH_opts.ase_gabs, \ |
| &LARCH_opts.ase_gpcr |
| /* got64 pic. */ |
| #define INSN_LA_GOT64_LARGE_PCREL \ |
| "pcalau12i %1,%%got_pc_hi20(%3);" \ |
| "addi.d %2,$r0,%%got_pc_lo12(%3);" \ |
| "lu32i.d %2,%%got64_pc_lo20(%3);" \ |
| "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\ |
| "ldx.d %1,%1,%2;", \ |
| &LARCH_opts.ase_lp64, \ |
| &LARCH_opts.ase_gabs |
| |
| /* For LoongArch32/64 cmode=normal. */ |
| #define INSN_LA_TLS_LE \ |
| "lu12i.w %1,%%le_hi20(%2);" \ |
| "ori %1,%1,%%le_lo12(%2);", \ |
| &LARCH_opts.ase_ilp32, 0 |
| |
| /* For LoongArch64 cmode=large. */ |
| #define INSN_LA_TLS_LE64_LARGE \ |
| "lu12i.w %1,%%le_hi20(%2);" \ |
| "ori %1,%1,%%le_lo12(%2);" \ |
| "lu32i.d %1,%%le64_lo20(%2);" \ |
| "lu52i.d %1,%1,%%le64_hi12(%2);", \ |
| &LARCH_opts.ase_lp64, 0 |
| |
| #define INSN_LA_TLS_IE32 \ |
| "pcalau12i %1,%%ie_pc_hi20(%2);" \ |
| "ld.w %1,%1,%%ie_pc_lo12(%2);", \ |
| &LARCH_opts.ase_ilp32, \ |
| &LARCH_opts.ase_lp64 |
| /* For ie32 abs. */ |
| #define INSN_LA_TLS_IE32_ABS \ |
| "lu12i.w %1,%%ie_hi20(%2);" \ |
| "ori %1,%1,%%ie_lo12(%2);" \ |
| "ld.w %1,%1,0", \ |
| &LARCH_opts.ase_gabs, \ |
| &LARCH_opts.ase_lp64 |
| #define INSN_LA_TLS_IE64 \ |
| "pcalau12i %1,%%ie_pc_hi20(%2);" \ |
| "ld.d %1,%1,%%ie_pc_lo12(%2);", \ |
| &LARCH_opts.ase_lp64, 0 |
| /* For ie64 pic. */ |
| #define INSN_LA_TLS_IE64_LARGE_PCREL \ |
| "pcalau12i %1,%%ie_pc_hi20(%3);" \ |
| "addi.d %2,$r0,%%ie_pc_lo12(%3);" \ |
| "lu32i.d %2,%%ie64_pc_lo20(%3);" \ |
| "lu52i.d %2,%2,%%ie64_pc_hi12(%3);" \ |
| "ldx.d %1,%1,%2;", \ |
| &LARCH_opts.ase_lp64, \ |
| &LARCH_opts.ase_gabs |
| /* For ie64 abs. */ |
| #define INSN_LA_TLS_IE64_LARGE_ABS \ |
| "lu12i.w %1,%%ie_hi20(%2);" \ |
| "ori %1,%1,%%ie_lo12(%2);" \ |
| "lu32i.d %1,%%ie64_lo20(%2);" \ |
| "lu52i.d %1,%1,%%ie64_hi12(%2);" \ |
| "ld.d %1,%1,0", \ |
| &LARCH_opts.ase_gabs, \ |
| &LARCH_opts.ase_gpcr |
| |
| /* For LoongArch32/64 cmode=normal. */ |
| #define INSN_LA_TLS_LD32 \ |
| "pcalau12i %1,%%ld_pc_hi20(%2);" \ |
| "addi.w %1,%1,%%got_pc_lo12(%2);", \ |
| &LARCH_opts.ase_ilp32, \ |
| &LARCH_opts.ase_lp64 |
| #define INSN_LA_TLS_LD32_ABS \ |
| "lu12i.w %1,%%ld_hi20(%2);" \ |
| "ori %1,%1,%%got_lo12(%2);", \ |
| &LARCH_opts.ase_gabs, \ |
| &LARCH_opts.ase_lp64 |
| #define INSN_LA_TLS_LD64 \ |
| "pcalau12i %1,%%ld_pc_hi20(%2);" \ |
| "addi.d %1,%1,%%got_pc_lo12(%2);", \ |
| &LARCH_opts.ase_lp64, 0 |
| #define INSN_LA_TLS_LD64_LARGE_PCREL \ |
| "pcalau12i %1,%%ld_pc_hi20(%3);" \ |
| "addi.d %2,$r0,%%got_pc_lo12(%3);" \ |
| "lu32i.d %2,%%got64_pc_lo20(%3);" \ |
| "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\ |
| "add.d %1,%1,%2;", \ |
| &LARCH_opts.ase_lp64, \ |
| &LARCH_opts.ase_gabs |
| #define INSN_LA_TLS_LD64_LARGE_ABS \ |
| "lu12i.w %1,%%ld_hi20(%2);" \ |
| "ori %1,%1,%%got_lo12(%2);" \ |
| "lu32i.d %1,%%got64_lo20(%2);" \ |
| "lu52i.d %1,%1,%%got64_hi12(%2);", \ |
| &LARCH_opts.ase_gabs, \ |
| &LARCH_opts.ase_gpcr |
| |
| #define INSN_LA_TLS_GD32 \ |
| "pcalau12i %1,%%gd_pc_hi20(%2);" \ |
| "addi.w %1,%1,%%got_pc_lo12(%2);", \ |
| &LARCH_opts.ase_ilp32, \ |
| &LARCH_opts.ase_lp64 |
| #define INSN_LA_TLS_GD32_ABS \ |
| "lu12i.w %1,%%gd_hi20(%2);" \ |
| "ori %1,%1,%%got_lo12(%2);", \ |
| &LARCH_opts.ase_gabs, \ |
| &LARCH_opts.ase_lp64 |
| #define INSN_LA_TLS_GD64 \ |
| "pcalau12i %1,%%gd_pc_hi20(%2);" \ |
| "addi.d %1,%1,%%got_pc_lo12(%2);", \ |
| &LARCH_opts.ase_lp64, 0 |
| #define INSN_LA_TLS_GD64_LARGE_PCREL \ |
| "pcalau12i %1,%%gd_pc_hi20(%3);" \ |
| "addi.d %2,$r0,%%got_pc_lo12(%3);" \ |
| "lu32i.d %2,%%got64_pc_lo20(%3);" \ |
| "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\ |
| "add.d %1,%1,%2;", \ |
| &LARCH_opts.ase_lp64, \ |
| &LARCH_opts.ase_gabs |
| #define INSN_LA_TLS_GD64_LARGE_ABS \ |
| "lu12i.w %1,%%gd_hi20(%2);" \ |
| "ori %1,%1,%%got_lo12(%2);" \ |
| "lu32i.d %1,%%got64_lo20(%2);" \ |
| "lu52i.d %1,%1,%%got64_hi12(%2);", \ |
| &LARCH_opts.ase_gabs, \ |
| &LARCH_opts.ase_gpcr |
| |
| #define INSN_LA_CALL \ |
| "pcaddu18i $ra,%%call36(%1);" \ |
| "jirl $ra,$ra,0;", \ |
| 0, 0 |
| |
| #define INSN_LA_TAIL \ |
| "pcaddu18i %1,%%call36(%2);" \ |
| "jirl $zero,%1,0;", \ |
| 0, 0 |
| |
| /* For TLS_DESC32 pcrel. */ |
| #define INSN_LA_TLS_DESC32 \ |
| "pcalau12i $r4,%%desc_pc_hi20(%2);" \ |
| "addi.w $r4,$r4,%%desc_pc_lo12(%2);" \ |
| "ld.w $r1,$r4,%%desc_ld(%2);" \ |
| "jirl $r1,$r1,%%desc_call(%2);", \ |
| &LARCH_opts.ase_ilp32, \ |
| &LARCH_opts.ase_lp64 |
| |
| /* For TLS_DESC32 abs. */ |
| #define INSN_LA_TLS_DESC32_ABS \ |
| "lu12i.w $r4,%%desc_hi20(%2);" \ |
| "ori $r4,$r4,%%desc_lo12(%2);" \ |
| "ld.w $r1,$r4,%%desc_ld(%2);" \ |
| "jirl $r1,$r1,%%desc_call(%2);", \ |
| &LARCH_opts.ase_gabs, \ |
| &LARCH_opts.ase_lp64 |
| |
| /* For TLS_DESC64 pcrel. */ |
| #define INSN_LA_TLS_DESC64 \ |
| "pcalau12i $r4,%%desc_pc_hi20(%2);" \ |
| "addi.d $r4,$r4,%%desc_pc_lo12(%2);" \ |
| "ld.d $r1,$r4,%%desc_ld(%2);" \ |
| "jirl $r1,$r1,%%desc_call(%2);", \ |
| &LARCH_opts.ase_lp64, 0 |
| |
| /* For TLS_DESC64 large pcrel. */ |
| #define INSN_LA_TLS_DESC64_LARGE_PCREL \ |
| "pcalau12i $r4,%%desc_pc_hi20(%3);" \ |
| "addi.d %2,$r0,%%desc_pc_lo12(%3);" \ |
| "lu32i.d %2,%%desc64_pc_lo20(%3);" \ |
| "lu52i.d %2,%2,%%desc64_pc_hi12(%3);" \ |
| "add.d $r4,$r4,%2;" \ |
| "ld.d $r1,$r4,%%desc_ld(%3);" \ |
| "jirl $r1,$r1,%%desc_call(%3);", \ |
| &LARCH_opts.ase_lp64, \ |
| &LARCH_opts.ase_gabs |
| |
| /* For TLS_DESC64 large abs. */ |
| #define INSN_LA_TLS_DESC64_LARGE_ABS \ |
| "lu12i.w $r4,%%desc_hi20(%2);" \ |
| "ori $r4,$r4,%%desc_lo12(%2);" \ |
| "lu32i.d $r4,%%desc64_lo20(%2);" \ |
| "lu52i.d $r4,$r4,%%desc64_hi12(%2);" \ |
| "ld.d $r1,$r4,%%desc_ld(%2);" \ |
| "jirl $r1,$r1,%%desc_call(%2);", \ |
| &LARCH_opts.ase_gabs, \ |
| &LARCH_opts.ase_gpcr |
| |
| static struct loongarch_opcode loongarch_macro_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0, 0, "li.w", "r,sc", "%f", 0, 0, 0 }, |
| { 0, 0, "li.d", "r,sc", "%f", 0, 0, 0 }, |
| |
| { 0, 0, "la", "r,la", "la.global %1,%2", 0, 0, 0 }, |
| { 0, 0, "la.global", "r,la", "la.pcrel %1,%2", &LARCH_opts.ase_gpcr, 0, 0 }, |
| { 0, 0, "la.global", "r,r,la", "la.pcrel %1,%2,%3", &LARCH_opts.ase_gpcr, 0, 0 }, |
| { 0, 0, "la.global", "r,la", "la.abs %1,%2", &LARCH_opts.ase_gabs, 0, 0 }, |
| { 0, 0, "la.global", "r,r,la", "la.abs %1,%3", &LARCH_opts.ase_gabs, 0, 0 }, |
| { 0, 0, "la.global", "r,la", "la.got %1,%2", 0, 0, 0 }, |
| { 0, 0, "la.global", "r,r,la", "la.got %1,%2,%3", &LARCH_opts.ase_lp64, 0, 0 }, |
| |
| { 0, 0, "la.local", "r,la", "la.abs %1,%2", &LARCH_opts.ase_labs, 0, 0 }, |
| { 0, 0, "la.local", "r,r,la", "la.abs %1,%3", &LARCH_opts.ase_labs, 0, 0 }, |
| { 0, 0, "la.local", "r,la", "la.pcrel %1,%2", 0, 0, 0 }, |
| { 0, 0, "la.local", "r,r,la", "la.pcrel %1,%2,%3", &LARCH_opts.ase_lp64, 0, 0 }, |
| |
| { 0, 0, "la.abs", "r,la", INSN_LA_ABS32, 0 }, |
| { 0, 0, "la.abs", "r,la", INSN_LA_ABS64, 0 }, |
| { 0, 0, "la.pcrel", "r,la", INSN_LA_PCREL32, 0 }, |
| { 0, 0, "la.pcrel", "r,la", INSN_LA_PCREL64, 0 }, |
| { 0, 0, "la.pcrel", "r,r,la", INSN_LA_PCREL64_LARGE, 0 }, |
| { 0, 0, "la.got", "r,la", INSN_LA_GOT32_ABS, 0 }, |
| { 0, 0, "la.got", "r,la", INSN_LA_GOT32, 0 }, |
| { 0, 0, "la.got", "r,la", INSN_LA_GOT64_LARGE_ABS, 0 }, |
| { 0, 0, "la.got", "r,la", INSN_LA_GOT64, 0 }, |
| { 0, 0, "la.got", "r,r,la", INSN_LA_GOT64_LARGE_PCREL, 0 }, |
| { 0, 0, "la.tls.le", "r,l", INSN_LA_TLS_LE, 0 }, |
| { 0, 0, "la.tls.le", "r,l", INSN_LA_TLS_LE64_LARGE, 0 }, |
| { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE32_ABS, 0 }, |
| { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE32, 0 }, |
| { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE64_LARGE_ABS, 0 }, |
| { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE64, 0 }, |
| { 0, 0, "la.tls.ie", "r,r,l", INSN_LA_TLS_IE64_LARGE_PCREL, 0 }, |
| { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD32_ABS, 0 }, |
| { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD32, 0 }, |
| { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD64_LARGE_ABS, 0 }, |
| { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD64, 0 }, |
| { 0, 0, "la.tls.ld", "r,r,l", INSN_LA_TLS_LD64_LARGE_PCREL, 0 }, |
| { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD32_ABS, 0 }, |
| { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD32, 0 }, |
| { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD64_LARGE_ABS, 0 }, |
| { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD64, 0 }, |
| { 0, 0, "la.tls.gd", "r,r,l", INSN_LA_TLS_GD64_LARGE_PCREL, 0 }, |
| { 0, 0, "call36", "la", INSN_LA_CALL, 0 }, |
| { 0, 0, "tail36", "r,la", INSN_LA_TAIL, 0 }, |
| { 0, 0, "pcaddi", "r,la", "pcaddi %1, %%pcrel_20(%2)", &LARCH_opts.ase_ilp32, 0, 0 }, |
| { 0, 0, "la.tls.desc", "r,l", INSN_LA_TLS_DESC32_ABS, 0 }, |
| { 0, 0, "la.tls.desc", "r,l", INSN_LA_TLS_DESC32, 0 }, |
| { 0, 0, "la.tls.desc", "r,l", INSN_LA_TLS_DESC64_LARGE_ABS, 0 }, |
| { 0, 0, "la.tls.desc", "r,l", INSN_LA_TLS_DESC64, 0 }, |
| { 0, 0, "la.tls.desc", "r,r,l", INSN_LA_TLS_DESC64_LARGE_PCREL,0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_alias_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x00150000, 0xfffffc00, "move", "r0:5,r5:5", 0, 0, 0, INSN_DIS_ALIAS }, /* or rd, rj, zero */ |
| { 0x02800000, 0xffc003e0, "li.w", "r0:5,s10:12", 0, 0, 0, INSN_DIS_ALIAS }, /* addi.w rd, zero, simm */ |
| { 0x02c00000, 0xffc003e0, "li.d", "r0:5,s10:12", 0, 0, 0, INSN_DIS_ALIAS }, /* addi.d rd, zero, simm */ |
| { 0x03400000, 0xffffffff, "nop", "", 0, 0, 0, INSN_DIS_ALIAS }, /* andi zero, zero, 0 */ |
| { 0x03800000, 0xffc003e0, "li.w", "r0:5,u10:12", 0, 0, 0, INSN_DIS_ALIAS }, /* ori rd, zero, uimm */ |
| /* ret must come before jr because it is more specific. */ |
| { 0x4c000020, 0xffffffff, "ret", "", 0, 0, 0, INSN_DIS_ALIAS }, /* jirl zero, ra, 0 */ |
| { 0x4c000000, 0xfffffc1f, "jr", "r5:5", 0, 0, 0, INSN_DIS_ALIAS }, /* jirl zero, rj, 0 */ |
| { 0x60000000, 0xfc00001f, "bltz", "r5:5,sb10:16<<2", 0, 0, 0, INSN_DIS_ALIAS }, /* blt rj, zero, offset */ |
| { 0x60000000, 0xfc0003e0, "bgtz", "r0:5,sb10:16<<2", 0, 0, 0, INSN_DIS_ALIAS }, /* blt zero, rd, offset */ |
| { 0x64000000, 0xfc00001f, "bgez", "r5:5,sb10:16<<2", 0, 0, 0, INSN_DIS_ALIAS }, /* bge rj, zero, offset */ |
| { 0x64000000, 0xfc0003e0, "blez", "r0:5,sb10:16<<2", 0, 0, 0, INSN_DIS_ALIAS }, /* bge zero, rd, offset */ |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| |
| static struct loongarch_opcode loongarch_fix_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x0, 0x0, "move", "r,r", "or %1,%2,$r0", 0, 0, 0 }, |
| { 0x00001000, 0xfffffc00, "clo.w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00001400, 0xfffffc00, "clz.w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00001800, 0xfffffc00, "cto.w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00001c00, 0xfffffc00, "ctz.w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00002000, 0xfffffc00, "clo.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00002400, 0xfffffc00, "clz.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00002800, 0xfffffc00, "cto.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00002c00, 0xfffffc00, "ctz.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00003000, 0xfffffc00, "revb.2h", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00003400, 0xfffffc00, "revb.4h", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00003800, 0xfffffc00, "revb.2w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00003c00, 0xfffffc00, "revb.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00004000, 0xfffffc00, "revh.2w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00004400, 0xfffffc00, "revh.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00004800, 0xfffffc00, "bitrev.4b", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00004c00, 0xfffffc00, "bitrev.8b", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00005000, 0xfffffc00, "bitrev.w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00005400, 0xfffffc00, "bitrev.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00005800, 0xfffffc00, "ext.w.h", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00005c00, 0xfffffc00, "ext.w.b", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00006000, 0xfffffc00, "rdtimel.w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00006400, 0xfffffc00, "rdtimeh.w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00006800, 0xfffffc00, "rdtime.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00006c00, 0xfffffc00, "cpucfg", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x00010000, 0xffff801f, "asrtle.d", "r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00018000, 0xffff801f, "asrtgt.d", "r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00040000, 0xfffe0000, "alsl.w", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0 }, |
| { 0x00060000, 0xfffe0000, "alsl.wu", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0 }, |
| { 0x00080000, 0xfffe0000, "bytepick.w", "r0:5,r5:5,r10:5,u15:2", 0, 0, 0, 0 }, |
| { 0x000c0000, 0xfffc0000, "bytepick.d", "r0:5,r5:5,r10:5,u15:3", 0, 0, 0, 0 }, |
| { 0x00100000, 0xffff8000, "add.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00108000, 0xffff8000, "add.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00108000, 0xffff8000, "add.d", "r0:5,r5:5,r10:5,t", 0, 0, 0, 0 }, |
| { 0x00110000, 0xffff8000, "sub.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00118000, 0xffff8000, "sub.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00120000, 0xffff8000, "slt", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00128000, 0xffff8000, "sltu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00130000, 0xffff8000, "maskeqz", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00138000, 0xffff8000, "masknez", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00140000, 0xffff8000, "nor", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00148000, 0xffff8000, "and", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00150000, 0xffff8000, "or", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00158000, 0xffff8000, "xor", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00160000, 0xffff8000, "orn", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00168000, 0xffff8000, "andn", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00170000, 0xffff8000, "sll.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00178000, 0xffff8000, "srl.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00180000, 0xffff8000, "sra.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00188000, 0xffff8000, "sll.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00190000, 0xffff8000, "srl.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00198000, 0xffff8000, "sra.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x001b0000, 0xffff8000, "rotr.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x001b8000, 0xffff8000, "rotr.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x001c0000, 0xffff8000, "mul.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x001c8000, 0xffff8000, "mulh.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x001d0000, 0xffff8000, "mulh.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x001d8000, 0xffff8000, "mul.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x001e0000, 0xffff8000, "mulh.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x001e8000, 0xffff8000, "mulh.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x001f0000, 0xffff8000, "mulw.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x001f8000, 0xffff8000, "mulw.d.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00200000, 0xffff8000, "div.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00208000, 0xffff8000, "mod.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00210000, 0xffff8000, "div.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00218000, 0xffff8000, "mod.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00220000, 0xffff8000, "div.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00228000, 0xffff8000, "mod.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00230000, 0xffff8000, "div.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00238000, 0xffff8000, "mod.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00240000, 0xffff8000, "crc.w.b.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00248000, 0xffff8000, "crc.w.h.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00250000, 0xffff8000, "crc.w.w.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00258000, 0xffff8000, "crc.w.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00260000, 0xffff8000, "crcc.w.b.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00268000, 0xffff8000, "crcc.w.h.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00270000, 0xffff8000, "crcc.w.w.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x00278000, 0xffff8000, "crcc.w.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x002a0000, 0xffff8000, "break", "u0:15", 0, 0, 0, 0 }, |
| { 0x002a8000, 0xffff8000, "dbcl", "u0:15", 0, 0, 0, 0 }, |
| { 0x002b0000, 0xffff8000, "syscall", "u0:15", 0, 0, 0, 0 }, |
| { 0x002c0000, 0xfffe0000, "alsl.d", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0 }, |
| { 0x00408000, 0xffff8000, "slli.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 }, |
| { 0x00410000, 0xffff0000, "slli.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 }, |
| { 0x00448000, 0xffff8000, "srli.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 }, |
| { 0x00450000, 0xffff0000, "srli.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 }, |
| { 0x00488000, 0xffff8000, "srai.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 }, |
| { 0x00490000, 0xffff0000, "srai.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 }, |
| { 0x004c8000, 0xffff8000, "rotri.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 }, |
| { 0x004d0000, 0xffff0000, "rotri.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 }, |
| { 0x00600000, 0xffe08000, "bstrins.w", "r0:5,r5:5,u16:5,u10:5", 0, 0, 0, 0 }, |
| { 0x00608000, 0xffe08000, "bstrpick.w", "r0:5,r5:5,u16:5,u10:5", 0, 0, 0, 0 }, |
| { 0x00800000, 0xffc00000, "bstrins.d", "r0:5,r5:5,u16:6,u10:6", 0, 0, 0, 0 }, |
| { 0x00c00000, 0xffc00000, "bstrpick.d", "r0:5,r5:5,u16:6,u10:6", 0, 0, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_single_float_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x01008000, 0xffff8000, "fadd.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01028000, 0xffff8000, "fsub.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01048000, 0xffff8000, "fmul.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01068000, 0xffff8000, "fdiv.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01088000, 0xffff8000, "fmax.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x010a8000, 0xffff8000, "fmin.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x010c8000, 0xffff8000, "fmaxa.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x010e8000, 0xffff8000, "fmina.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01108000, 0xffff8000, "fscaleb.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01128000, 0xffff8000, "fcopysign.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01140400, 0xfffffc00, "fabs.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01141400, 0xfffffc00, "fneg.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01142400, 0xfffffc00, "flogb.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01143400, 0xfffffc00, "fclass.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01144400, 0xfffffc00, "fsqrt.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01145400, 0xfffffc00, "frecip.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01146400, 0xfffffc00, "frsqrt.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01147400, 0xfffffc00, "frecipe.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01148400, 0xfffffc00, "frsqrte.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01149400, 0xfffffc00, "fmov.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0114a400, 0xfffffc00, "movgr2fr.w", "f0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0114ac00, 0xfffffc00, "movgr2frh.w", "f0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0114b400, 0xfffffc00, "movfr2gr.s", "r0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0114bc00, 0xfffffc00, "movfrh2gr.s", "r0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0114c000, 0xfffffc1c, "movgr2fcsr", "fc0:2,r5:5", 0, 0, 0, 0 }, |
| { 0x0114c800, 0xffffff80, "movfcsr2gr", "r0:5,fc5:2", 0, 0, 0, 0 }, |
| { 0x0114d000, 0xfffffc18, "movfr2cf", "c0:3,f5:5", 0, 0, 0, 0 }, |
| { 0x0114d400, 0xffffff00, "movcf2fr", "f0:5,c5:3", 0, 0, 0, 0 }, |
| { 0x0114d800, 0xfffffc18, "movgr2cf", "c0:3,r5:5", 0, 0, 0, 0 }, |
| { 0x0114dc00, 0xffffff00, "movcf2gr", "r0:5,c5:3", 0, 0, 0, 0 }, |
| { 0x011a0400, 0xfffffc00, "ftintrm.w.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011a2400, 0xfffffc00, "ftintrm.l.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011a4400, 0xfffffc00, "ftintrp.w.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011a6400, 0xfffffc00, "ftintrp.l.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011a8400, 0xfffffc00, "ftintrz.w.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011aa400, 0xfffffc00, "ftintrz.l.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011ac400, 0xfffffc00, "ftintrne.w.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011ae400, 0xfffffc00, "ftintrne.l.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011b0400, 0xfffffc00, "ftint.w.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011b2400, 0xfffffc00, "ftint.l.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011d1000, 0xfffffc00, "ffint.s.w", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011d1800, 0xfffffc00, "ffint.s.l", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011e4400, 0xfffffc00, "frint.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| static struct loongarch_opcode loongarch_double_float_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x01010000, 0xffff8000, "fadd.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01030000, 0xffff8000, "fsub.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01050000, 0xffff8000, "fmul.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01070000, 0xffff8000, "fdiv.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01090000, 0xffff8000, "fmax.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x010b0000, 0xffff8000, "fmin.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x010d0000, 0xffff8000, "fmaxa.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x010f0000, 0xffff8000, "fmina.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01110000, 0xffff8000, "fscaleb.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01130000, 0xffff8000, "fcopysign.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x01140800, 0xfffffc00, "fabs.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01141800, 0xfffffc00, "fneg.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01142800, 0xfffffc00, "flogb.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01143800, 0xfffffc00, "fclass.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01144800, 0xfffffc00, "fsqrt.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01145800, 0xfffffc00, "frecip.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01146800, 0xfffffc00, "frsqrt.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01147800, 0xfffffc00, "frecipe.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01148800, 0xfffffc00, "frsqrte.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01149800, 0xfffffc00, "fmov.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0114a800, 0xfffffc00, "movgr2fr.d", "f0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0114b800, 0xfffffc00, "movfr2gr.d", "r0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01191800, 0xfffffc00, "fcvt.s.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x01192400, 0xfffffc00, "fcvt.d.s", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011a0800, 0xfffffc00, "ftintrm.w.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011a2800, 0xfffffc00, "ftintrm.l.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011a4800, 0xfffffc00, "ftintrp.w.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011a6800, 0xfffffc00, "ftintrp.l.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011a8800, 0xfffffc00, "ftintrz.w.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011aa800, 0xfffffc00, "ftintrz.l.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011ac800, 0xfffffc00, "ftintrne.w.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011ae800, 0xfffffc00, "ftintrne.l.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011b0800, 0xfffffc00, "ftint.w.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011b2800, 0xfffffc00, "ftint.l.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011d2000, 0xfffffc00, "ffint.d.w", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011d2800, 0xfffffc00, "ffint.d.l", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0x011e4800, 0xfffffc00, "frint.d", "f0:5,f5:5", 0, 0, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_imm_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x02000000, 0xffc00000, "slti", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, |
| { 0x02400000, 0xffc00000, "sltui", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, |
| { 0x02800000, 0xffc00000, "addi.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, |
| { 0x02c00000, 0xffc00000, "addi.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, |
| { 0x03000000, 0xffc00000, "lu52i.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "nop", "", "andi $r0,$r0,0", 0, 0, 0 }, |
| { 0x03400000, 0xffc00000, "andi", "r0:5,r5:5,u10:12", 0, 0, 0, 0 }, |
| { 0x03800000, 0xffc00000, "ori", "r0:5,r5:5,u10:12", 0, 0, 0, 0 }, |
| { 0x03c00000, 0xffc00000, "xori", "r0:5,r5:5,u10:12", 0, 0, 0, 0 }, |
| { 0x10000000, 0xfc000000, "addu16i.d", "r0:5,r5:5,s10:16", 0, 0, 0, 0 }, |
| { 0x14000000, 0xfe000000, "lu12i.w", "r0:5,s5:20", 0, 0, 0, 0 }, |
| { 0x16000000, 0xfe000000, "lu32i.d", "r0:5,s5:20", 0, 0, 0, 0 }, |
| { 0x18000000, 0xfe000000, "pcaddi", "r0:5,s5:20", 0, 0, 0, 0 }, |
| { 0x1a000000, 0xfe000000, "pcalau12i", "r0:5,s5:20", 0, 0, 0, 0 }, |
| { 0x1c000000, 0xfe000000, "pcaddu12i", "r0:5,s5:20", 0, 0, 0, 0 }, |
| { 0x1e000000, 0xfe000000, "pcaddu18i", "r0:5,s5:20", 0, 0, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_privilege_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x04000000, 0xff0003e0, "csrrd", "r0:5,u10:14", 0, 0, 0, 0 }, |
| { 0x04000020, 0xff0003e0, "csrwr", "r0:5,u10:14", 0, 0, 0, 0 }, |
| { 0x04000000, 0xff000000, "csrxchg", "r0:5,r5:5,u10:14", 0, 0, 0, 0 }, |
| { 0x06000000, 0xffc00000, "cacop", "u0:5,r5:5,s10:12", 0, 0, 0, 0 }, |
| { 0x06400000, 0xfffc0000, "lddir", "r0:5,r5:5,u10:8", 0, 0, 0, 0 }, |
| { 0x06440000, 0xfffc001f, "ldpte", "r5:5,u10:8", 0, 0, 0, 0 }, |
| { 0x06480000, 0xfffffc00, "iocsrrd.b", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x06480400, 0xfffffc00, "iocsrrd.h", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x06480800, 0xfffffc00, "iocsrrd.w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x06480c00, 0xfffffc00, "iocsrrd.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x06481000, 0xfffffc00, "iocsrwr.b", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x06481400, 0xfffffc00, "iocsrwr.h", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x06481800, 0xfffffc00, "iocsrwr.w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x06481c00, 0xfffffc00, "iocsrwr.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x06482000, 0xffffffff, "tlbclr", "", 0, 0, 0, 0 }, |
| { 0x06482400, 0xffffffff, "tlbflush", "", 0, 0, 0, 0 }, |
| { 0x06482800, 0xffffffff, "tlbsrch", "", 0, 0, 0, 0 }, |
| { 0x06482c00, 0xffffffff, "tlbrd", "", 0, 0, 0, 0 }, |
| { 0x06483000, 0xffffffff, "tlbwr", "", 0, 0, 0, 0 }, |
| { 0x06483400, 0xffffffff, "tlbfill", "", 0, 0, 0, 0 }, |
| { 0x06483800, 0xffffffff, "ertn", "", 0, 0, 0, 0 }, |
| { 0x06488000, 0xffff8000, "idle", "u0:15", 0, 0, 0, 0 }, |
| { 0x06498000, 0xffff8000, "invtlb", "u0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_4opt_single_float_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x08100000, 0xfff00000, "fmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, |
| { 0x08500000, 0xfff00000, "fmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, |
| { 0x08900000, 0xfff00000, "fnmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, |
| { 0x08d00000, 0xfff00000, "fnmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, |
| { 0x09100000, 0xfff00000, "vfmadd.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, |
| { 0x09500000, 0xfff00000, "vfmsub.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, |
| { 0x09900000, 0xfff00000, "vfnmadd.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, |
| { 0x09d00000, 0xfff00000, "vfnmsub.s", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, |
| { 0x0a100000, 0xfff00000, "xvfmadd.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, |
| { 0x0a500000, 0xfff00000, "xvfmsub.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, |
| { 0x0a900000, 0xfff00000, "xvfnmadd.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, |
| { 0x0ad00000, 0xfff00000, "xvfnmsub.s", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, |
| { 0x0c100000, 0xffff8018, "fcmp.caf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c108000, 0xffff8018, "fcmp.saf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c110000, 0xffff8018, "fcmp.clt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c118000, 0xffff8018, "fcmp.slt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c118000, 0xffff8018, "fcmp.sgt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0c120000, 0xffff8018, "fcmp.ceq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c128000, 0xffff8018, "fcmp.seq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c130000, 0xffff8018, "fcmp.cle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c138000, 0xffff8018, "fcmp.sle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c138000, 0xffff8018, "fcmp.sge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0c140000, 0xffff8018, "fcmp.cun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c148000, 0xffff8018, "fcmp.sun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c150000, 0xffff8018, "fcmp.cult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c150000, 0xffff8018, "fcmp.cugt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0c158000, 0xffff8018, "fcmp.sult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c160000, 0xffff8018, "fcmp.cueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c168000, 0xffff8018, "fcmp.sueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c170000, 0xffff8018, "fcmp.cule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c170000, 0xffff8018, "fcmp.cuge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0c178000, 0xffff8018, "fcmp.sule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c180000, 0xffff8018, "fcmp.cne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c188000, 0xffff8018, "fcmp.sne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c1a0000, 0xffff8018, "fcmp.cor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c1a8000, 0xffff8018, "fcmp.sor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c1c0000, 0xffff8018, "fcmp.cune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c1c8000, 0xffff8018, "fcmp.sune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c500000, 0xffff8000, "vfcmp.caf.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c508000, 0xffff8000, "vfcmp.saf.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c510000, 0xffff8000, "vfcmp.clt.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c518000, 0xffff8000, "vfcmp.slt.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c520000, 0xffff8000, "vfcmp.ceq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c528000, 0xffff8000, "vfcmp.seq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c530000, 0xffff8000, "vfcmp.cle.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c538000, 0xffff8000, "vfcmp.sle.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c540000, 0xffff8000, "vfcmp.cun.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c548000, 0xffff8000, "vfcmp.sun.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c550000, 0xffff8000, "vfcmp.cult.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c558000, 0xffff8000, "vfcmp.sult.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c560000, 0xffff8000, "vfcmp.cueq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c568000, 0xffff8000, "vfcmp.sueq.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c570000, 0xffff8000, "vfcmp.cule.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c578000, 0xffff8000, "vfcmp.sule.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c580000, 0xffff8000, "vfcmp.cne.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c588000, 0xffff8000, "vfcmp.sne.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c5a0000, 0xffff8000, "vfcmp.cor.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c5a8000, 0xffff8000, "vfcmp.sor.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c5c0000, 0xffff8000, "vfcmp.cune.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c5c8000, 0xffff8000, "vfcmp.sune.s", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c900000, 0xffff8000, "xvfcmp.caf.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c908000, 0xffff8000, "xvfcmp.saf.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c910000, 0xffff8000, "xvfcmp.clt.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c918000, 0xffff8000, "xvfcmp.slt.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c920000, 0xffff8000, "xvfcmp.ceq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c928000, 0xffff8000, "xvfcmp.seq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c930000, 0xffff8000, "xvfcmp.cle.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c938000, 0xffff8000, "xvfcmp.sle.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c940000, 0xffff8000, "xvfcmp.cun.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c948000, 0xffff8000, "xvfcmp.sun.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c950000, 0xffff8000, "xvfcmp.cult.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c958000, 0xffff8000, "xvfcmp.sult.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c960000, 0xffff8000, "xvfcmp.cueq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c968000, 0xffff8000, "xvfcmp.sueq.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c970000, 0xffff8000, "xvfcmp.cule.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c978000, 0xffff8000, "xvfcmp.sule.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c980000, 0xffff8000, "xvfcmp.cne.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c988000, 0xffff8000, "xvfcmp.sne.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c9a0000, 0xffff8000, "xvfcmp.cor.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c9a8000, 0xffff8000, "xvfcmp.sor.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c9c0000, 0xffff8000, "xvfcmp.cune.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0c9c8000, 0xffff8000, "xvfcmp.sune.s", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0d000000, 0xfffc0000, "fsel", "f0:5,f5:5,f10:5,c15:3", 0, 0, 0, 0 }, |
| { 0x0d100000, 0xfff00000, "vbitsel.v", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, |
| { 0x0d200000, 0xfff00000, "xvbitsel.v", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, |
| { 0x0d500000, 0xfff00000, "vshuf.b", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, |
| { 0x0d600000, 0xfff00000, "xvshuf.b", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_4opt_double_float_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x08200000, 0xfff00000, "fmadd.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, |
| { 0x08600000, 0xfff00000, "fmsub.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, |
| { 0x08a00000, 0xfff00000, "fnmadd.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, |
| { 0x08e00000, 0xfff00000, "fnmsub.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 }, |
| { 0x09200000, 0xfff00000, "vfmadd.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, |
| { 0x09600000, 0xfff00000, "vfmsub.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, |
| { 0x09a00000, 0xfff00000, "vfnmadd.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, |
| { 0x09e00000, 0xfff00000, "vfnmsub.d", "v0:5,v5:5,v10:5,v15:5", 0, 0, 0, 0 }, |
| { 0x0a200000, 0xfff00000, "xvfmadd.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, |
| { 0x0a600000, 0xfff00000, "xvfmsub.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, |
| { 0x0aa00000, 0xfff00000, "xvfnmadd.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, |
| { 0x0ae00000, 0xfff00000, "xvfnmsub.d", "x0:5,x5:5,x10:5,x15:5", 0, 0, 0, 0 }, |
| { 0x0c200000, 0xffff8018, "fcmp.caf.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c208000, 0xffff8018, "fcmp.saf.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c210000, 0xffff8018, "fcmp.clt.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c218000, 0xffff8018, "fcmp.slt.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c218000, 0xffff8018, "fcmp.sgt.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0c220000, 0xffff8018, "fcmp.ceq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c228000, 0xffff8018, "fcmp.seq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c230000, 0xffff8018, "fcmp.cle.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c238000, 0xffff8018, "fcmp.sle.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c238000, 0xffff8018, "fcmp.sge.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0c240000, 0xffff8018, "fcmp.cun.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c248000, 0xffff8018, "fcmp.sun.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c250000, 0xffff8018, "fcmp.cult.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c250000, 0xffff8018, "fcmp.cugt.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0c258000, 0xffff8018, "fcmp.sult.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c260000, 0xffff8018, "fcmp.cueq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c268000, 0xffff8018, "fcmp.sueq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c270000, 0xffff8018, "fcmp.cule.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c270000, 0xffff8018, "fcmp.cuge.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 }, |
| { 0x0c278000, 0xffff8018, "fcmp.sule.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c280000, 0xffff8018, "fcmp.cne.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c288000, 0xffff8018, "fcmp.sne.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c2a0000, 0xffff8018, "fcmp.cor.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c2a8000, 0xffff8018, "fcmp.sor.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c2c0000, 0xffff8018, "fcmp.cune.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c2c8000, 0xffff8018, "fcmp.sune.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 }, |
| { 0x0c600000, 0xffff8000, "vfcmp.caf.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c608000, 0xffff8000, "vfcmp.saf.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c610000, 0xffff8000, "vfcmp.clt.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c618000, 0xffff8000, "vfcmp.slt.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c620000, 0xffff8000, "vfcmp.ceq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c628000, 0xffff8000, "vfcmp.seq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c630000, 0xffff8000, "vfcmp.cle.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c638000, 0xffff8000, "vfcmp.sle.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c640000, 0xffff8000, "vfcmp.cun.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c648000, 0xffff8000, "vfcmp.sun.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c650000, 0xffff8000, "vfcmp.cult.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c658000, 0xffff8000, "vfcmp.sult.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c660000, 0xffff8000, "vfcmp.cueq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c668000, 0xffff8000, "vfcmp.sueq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c670000, 0xffff8000, "vfcmp.cule.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c678000, 0xffff8000, "vfcmp.sule.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c680000, 0xffff8000, "vfcmp.cne.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c688000, 0xffff8000, "vfcmp.sne.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c6a0000, 0xffff8000, "vfcmp.cor.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c6a8000, 0xffff8000, "vfcmp.sor.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c6c0000, 0xffff8000, "vfcmp.cune.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0c6c8000, 0xffff8000, "vfcmp.sune.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x0ca00000, 0xffff8000, "xvfcmp.caf.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca08000, 0xffff8000, "xvfcmp.saf.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca10000, 0xffff8000, "xvfcmp.clt.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca18000, 0xffff8000, "xvfcmp.slt.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca20000, 0xffff8000, "xvfcmp.ceq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca28000, 0xffff8000, "xvfcmp.seq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca30000, 0xffff8000, "xvfcmp.cle.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca38000, 0xffff8000, "xvfcmp.sle.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca40000, 0xffff8000, "xvfcmp.cun.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca48000, 0xffff8000, "xvfcmp.sun.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca50000, 0xffff8000, "xvfcmp.cult.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca58000, 0xffff8000, "xvfcmp.sult.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca60000, 0xffff8000, "xvfcmp.cueq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca68000, 0xffff8000, "xvfcmp.sueq.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca70000, 0xffff8000, "xvfcmp.cule.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca78000, 0xffff8000, "xvfcmp.sule.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca80000, 0xffff8000, "xvfcmp.cne.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0ca88000, 0xffff8000, "xvfcmp.sne.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0caa0000, 0xffff8000, "xvfcmp.cor.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0caa8000, 0xffff8000, "xvfcmp.sor.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0cac0000, 0xffff8000, "xvfcmp.cune.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0x0cac8000, 0xffff8000, "xvfcmp.sune.d", "x0:5,x5:5,x10:5", 0, 0, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_load_store_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x20000000, 0xff000000, "ll.w", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, |
| { 0x21000000, 0xff000000, "sc.w", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, |
| { 0x22000000, 0xff000000, "ll.d", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, |
| { 0x23000000, 0xff000000, "sc.d", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, |
| { 0x24000000, 0xff000000, "ldptr.w", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, |
| { 0x25000000, 0xff000000, "stptr.w", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, |
| { 0x26000000, 0xff000000, "ldptr.d", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, |
| { 0x27000000, 0xff000000, "stptr.d", "r0:5,r5:5,so10:14<<2", 0, 0, 0, 0 }, |
| { 0x28000000, 0xffc00000, "ld.b", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x28400000, 0xffc00000, "ld.h", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x28800000, 0xffc00000, "ld.w", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x28c00000, 0xffc00000, "ld.d", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x29000000, 0xffc00000, "st.b", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x29400000, 0xffc00000, "st.h", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x29800000, 0xffc00000, "st.w", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x29c00000, 0xffc00000, "st.d", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x2a000000, 0xffc00000, "ld.bu", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x2a400000, 0xffc00000, "ld.hu", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x2a800000, 0xffc00000, "ld.wu", "r0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x2ac00000, 0xffc00000, "preld", "u0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x38000000, 0xffff8000, "ldx.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38040000, 0xffff8000, "ldx.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38080000, 0xffff8000, "ldx.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x380c0000, 0xffff8000, "ldx.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38100000, 0xffff8000, "stx.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38140000, 0xffff8000, "stx.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38180000, 0xffff8000, "stx.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x381c0000, 0xffff8000, "stx.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38200000, 0xffff8000, "ldx.bu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38240000, 0xffff8000, "ldx.hu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38280000, 0xffff8000, "ldx.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x382c0000, 0xffff8000, "preldx", "u0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "sc.q", "r,r,r,u0:0", "sc.q %1,%2,%3", 0, 0, 0 }, |
| { 0x38570000, 0xffff8000, "sc.q", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "llacq.w", "r,r,u0:0", "llacq.w %1,%2", 0, 0, 0 }, |
| { 0x38578000, 0xfffffc00, "llacq.w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "screl.w", "r,r,u0:0", "screl.w %1,%2", 0, 0, 0 }, |
| { 0x38578400, 0xfffffc00, "screl.w", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "llacq.d", "r,r,u0:0", "llacq.d %1,%2", 0, 0, 0 }, |
| { 0x38578800, 0xfffffc00, "llacq.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "screl.d", "r,r,u0:0", "screl.d %1,%2", 0, 0, 0 }, |
| { 0x38578c00, 0xfffffc00, "screl.d", "r0:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amcas.b", "r,r,r,u0:0", "amcas.b %1,%2,%3", 0, 0, 0 }, |
| { 0x38580000, 0xffff8000, "amcas.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amcas.h", "r,r,r,u0:0", "amcas.h %1,%2,%3", 0, 0, 0 }, |
| { 0x38588000, 0xffff8000, "amcas.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amcas.w", "r,r,r,u0:0", "amcas.w %1,%2,%3", 0, 0, 0 }, |
| { 0x38590000, 0xffff8000, "amcas.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amcas.d", "r,r,r,u0:0", "amcas.d %1,%2,%3", 0, 0, 0 }, |
| { 0x38598000, 0xffff8000, "amcas.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amcas_db.b", "r,r,r,u0:0", "amcas_db.b %1,%2,%3", 0, 0, 0 }, |
| { 0x385a0000, 0xffff8000, "amcas_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amcas_db.h", "r,r,r,u0:0", "amcas_db.h %1,%2,%3", 0, 0, 0 }, |
| { 0x385a8000, 0xffff8000, "amcas_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amcas_db.w", "r,r,r,u0:0", "amcas_db.w %1,%2,%3", 0, 0, 0 }, |
| { 0x385b0000, 0xffff8000, "amcas_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amcas_db.d", "r,r,r,u0:0", "amcas_db.d %1,%2,%3", 0, 0, 0 }, |
| { 0x385b8000, 0xffff8000, "amcas_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amswap.b", "r,r,r,u0:0", "amswap.b %1,%2,%3", 0, 0, 0 }, |
| { 0x385c0000, 0xffff8000, "amswap.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amswap.h", "r,r,r,u0:0", "amswap.h %1,%2,%3", 0, 0, 0 }, |
| { 0x385c8000, 0xffff8000, "amswap.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amadd.b", "r,r,r,u0:0", "amadd.b %1,%2,%3", 0, 0, 0 }, |
| { 0x385d0000, 0xffff8000, "amadd.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amadd.h", "r,r,r,u0:0", "amadd.h %1,%2,%3", 0, 0, 0 }, |
| { 0x385d8000, 0xffff8000, "amadd.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amswap_db.b", "r,r,r,u0:0", "amswap_db.b %1,%2,%3", 0, 0, 0 }, |
| { 0x385e0000, 0xffff8000, "amswap_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amswap_db.h", "r,r,r,u0:0", "amswap_db.h %1,%2,%3", 0, 0, 0 }, |
| { 0x385e8000, 0xffff8000, "amswap_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amadd_db.b", "r,r,r,u0:0", "amadd_db.b %1,%2,%3", 0, 0, 0 }, |
| { 0x385f0000, 0xffff8000, "amadd_db.b", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amadd_db.h", "r,r,r,u0:0", "amadd_db.h %1,%2,%3", 0, 0, 0 }, |
| { 0x385f8000, 0xffff8000, "amadd_db.h", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amswap.w", "r,r,r,u0:0", "amswap.w %1,%2,%3", 0, 0, 0 }, |
| { 0x38600000, 0xffff8000, "amswap.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amswap.d", "r,r,r,u0:0", "amswap.d %1,%2,%3", 0, 0, 0 }, |
| { 0x38608000, 0xffff8000, "amswap.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amadd.w", "r,r,r,u0:0", "amadd.w %1,%2,%3", 0, 0, 0 }, |
| { 0x38610000, 0xffff8000, "amadd.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amadd.d", "r,r,r,u0:0", "amadd.d %1,%2,%3", 0, 0, 0 }, |
| { 0x38618000, 0xffff8000, "amadd.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amand.w", "r,r,r,u0:0", "amand.w %1,%2,%3", 0, 0, 0 }, |
| { 0x38620000, 0xffff8000, "amand.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amand.d", "r,r,r,u0:0", "amand.d %1,%2,%3", 0, 0, 0 }, |
| { 0x38628000, 0xffff8000, "amand.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amor.w", "r,r,r,u0:0", "amor.w %1,%2,%3", 0, 0, 0 }, |
| { 0x38630000, 0xffff8000, "amor.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amor.d", "r,r,r,u0:0", "amor.d %1,%2,%3", 0, 0, 0 }, |
| { 0x38638000, 0xffff8000, "amor.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amxor.w", "r,r,r,u0:0", "amxor.w %1,%2,%3", 0, 0, 0 }, |
| { 0x38640000, 0xffff8000, "amxor.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amxor.d", "r,r,r,u0:0", "amxor.d %1,%2,%3", 0, 0, 0 }, |
| { 0x38648000, 0xffff8000, "amxor.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammax.w", "r,r,r,u0:0", "ammax.w %1,%2,%3", 0, 0, 0 }, |
| { 0x38650000, 0xffff8000, "ammax.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammax.d", "r,r,r,u0:0", "ammax.d %1,%2,%3", 0, 0, 0 }, |
| { 0x38658000, 0xffff8000, "ammax.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammin.w", "r,r,r,u0:0", "ammin.w %1,%2,%3", 0, 0, 0 }, |
| { 0x38660000, 0xffff8000, "ammin.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammin.d", "r,r,r,u0:0", "ammin.d %1,%2,%3", 0, 0, 0 }, |
| { 0x38668000, 0xffff8000, "ammin.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammax.wu", "r,r,r,u0:0", "ammax.wu %1,%2,%3", 0, 0, 0 }, |
| { 0x38670000, 0xffff8000, "ammax.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammax.du", "r,r,r,u0:0", "ammax.du %1,%2,%3", 0, 0, 0 }, |
| { 0x38678000, 0xffff8000, "ammax.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammin.wu", "r,r,r,u0:0", "ammin.wu %1,%2,%3", 0, 0, 0 }, |
| { 0x38680000, 0xffff8000, "ammin.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammin.du", "r,r,r,u0:0", "ammin.du %1,%2,%3", 0, 0, 0 }, |
| { 0x38688000, 0xffff8000, "ammin.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amswap_db.w", "r,r,r,u0:0", "amswap_db.w %1,%2,%3", 0, 0, 0 }, |
| { 0x38690000, 0xffff8000, "amswap_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amswap_db.d", "r,r,r,u0:0", "amswap_db.d %1,%2,%3", 0, 0, 0 }, |
| { 0x38698000, 0xffff8000, "amswap_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amadd_db.w", "r,r,r,u0:0", "amadd_db.w %1,%2,%3", 0, 0, 0 }, |
| { 0x386a0000, 0xffff8000, "amadd_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amadd_db.d", "r,r,r,u0:0", "amadd_db.d %1,%2,%3", 0, 0, 0 }, |
| { 0x386a8000, 0xffff8000, "amadd_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amand_db.w", "r,r,r,u0:0", "amand_db.w %1,%2,%3", 0, 0, 0 }, |
| { 0x386b0000, 0xffff8000, "amand_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amand_db.d", "r,r,r,u0:0", "amand_db.d %1,%2,%3", 0, 0, 0 }, |
| { 0x386b8000, 0xffff8000, "amand_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amor_db.w", "r,r,r,u0:0", "amor_db.w %1,%2,%3", 0, 0, 0 }, |
| { 0x386c0000, 0xffff8000, "amor_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amor_db.d", "r,r,r,u0:0", "amor_db.d %1,%2,%3", 0, 0, 0 }, |
| { 0x386c8000, 0xffff8000, "amor_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amxor_db.w", "r,r,r,u0:0", "amxor_db.w %1,%2,%3", 0, 0, 0 }, |
| { 0x386d0000, 0xffff8000, "amxor_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "amxor_db.d", "r,r,r,u0:0", "amxor_db.d %1,%2,%3", 0, 0, 0 }, |
| { 0x386d8000, 0xffff8000, "amxor_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammax_db.w", "r,r,r,u0:0", "ammax_db.w %1,%2,%3", 0, 0, 0 }, |
| { 0x386e0000, 0xffff8000, "ammax_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammax_db.d", "r,r,r,u0:0", "ammax_db.d %1,%2,%3", 0, 0, 0 }, |
| { 0x386e8000, 0xffff8000, "ammax_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammin_db.w", "r,r,r,u0:0", "ammin_db.w %1,%2,%3", 0, 0, 0 }, |
| { 0x386f0000, 0xffff8000, "ammin_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammin_db.d", "r,r,r,u0:0", "ammin_db.d %1,%2,%3", 0, 0, 0 }, |
| { 0x386f8000, 0xffff8000, "ammin_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammax_db.wu", "r,r,r,u0:0", "ammax_db.wu %1,%2,%3", 0, 0, 0 }, |
| { 0x38700000, 0xffff8000, "ammax_db.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammax_db.du", "r,r,r,u0:0", "ammax_db.du %1,%2,%3", 0, 0, 0 }, |
| { 0x38708000, 0xffff8000, "ammax_db.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammin_db.wu", "r,r,r,u0:0", "ammin_db.wu %1,%2,%3", 0, 0, 0 }, |
| { 0x38710000, 0xffff8000, "ammin_db.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "ammin_db.du", "r,r,r,u0:0", "ammin_db.du %1,%2,%3", 0, 0, 0 }, |
| { 0x38718000, 0xffff8000, "ammin_db.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 }, |
| { 0x38720000, 0xffff8000, "dbar", "u0:15", 0, 0, 0, 0 }, |
| { 0x38728000, 0xffff8000, "ibar", "u0:15", 0, 0, 0, 0 }, |
| { 0x38780000, 0xffff8000, "ldgt.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38788000, 0xffff8000, "ldgt.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38790000, 0xffff8000, "ldgt.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38798000, 0xffff8000, "ldgt.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387a0000, 0xffff8000, "ldle.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387a8000, 0xffff8000, "ldle.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387b0000, 0xffff8000, "ldle.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387b8000, 0xffff8000, "ldle.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387c0000, 0xffff8000, "stgt.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387c8000, 0xffff8000, "stgt.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387d0000, 0xffff8000, "stgt.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387d8000, 0xffff8000, "stgt.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387e0000, 0xffff8000, "stle.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387e8000, 0xffff8000, "stle.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387f0000, 0xffff8000, "stle.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x387f8000, 0xffff8000, "stle.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x2c000000, 0xffc00000, "vld", "v0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x2c400000, 0xffc00000, "vst", "v0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x2c800000, 0xffc00000, "xvld", "x0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x2cc00000, 0xffc00000, "xvst", "x0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x38400000, 0xffff8000, "vldx", "v0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38440000, 0xffff8000, "vstx", "v0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x38480000, 0xffff8000, "xvldx", "x0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x384c0000, 0xffff8000, "xvstx", "x0:5,r5:5,r10:5", 0, 0, 0, 0 }, |
| { 0x30100000, 0xfff80000, "vldrepl.d", "v0:5,r5:5,so10:9<<3", 0, 0, 0, 0 }, |
| { 0x30200000, 0xfff00000, "vldrepl.w", "v0:5,r5:5,so10:10<<2", 0, 0, 0, 0 }, |
| { 0x30400000, 0xffe00000, "vldrepl.h", "v0:5,r5:5,so10:11<<1", 0, 0, 0, 0 }, |
| { 0x30800000, 0xffc00000, "vldrepl.b", "v0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x31100000, 0xfff80000, "vstelm.d", "v0:5,r5:5,so10:8<<3,u18:1", 0, 0, 0, 0 }, |
| { 0x31200000, 0xfff00000, "vstelm.w", "v0:5,r5:5,so10:8<<2,u18:2", 0, 0, 0, 0 }, |
| { 0x31400000, 0xffe00000, "vstelm.h", "v0:5,r5:5,so10:8<<1,u18:3", 0, 0, 0, 0 }, |
| { 0x31800000, 0xffc00000, "vstelm.b", "v0:5,r5:5,so10:8,u18:4", 0, 0, 0, 0 }, |
| { 0x32100000, 0xfff80000, "xvldrepl.d", "x0:5,r5:5,so10:9<<3", 0, 0, 0, 0 }, |
| { 0x32200000, 0xfff00000, "xvldrepl.w", "x0:5,r5:5,so10:10<<2", 0, 0, 0, 0 }, |
| { 0x32400000, 0xffe00000, "xvldrepl.h", "x0:5,r5:5,so10:11<<1", 0, 0, 0, 0 }, |
| { 0x32800000, 0xffc00000, "xvldrepl.b", "x0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x33100000, 0xfff00000, "xvstelm.d", "x0:5,r5:5,so10:8<<3,u18:2", 0, 0, 0, 0 }, |
| { 0x33200000, 0xffe00000, "xvstelm.w", "x0:5,r5:5,so10:8<<2,u18:3", 0, 0, 0, 0 }, |
| { 0x33400000, 0xffc00000, "xvstelm.h", "x0:5,r5:5,so10:8<<1,u18:4", 0, 0, 0, 0 }, |
| { 0x33800000, 0xff800000, "xvstelm.b", "x0:5,r5:5,so10:8,u18:5", 0, 0, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_single_float_load_store_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x2b000000, 0xffc00000, "fld.s", "f0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x2b400000, 0xffc00000, "fst.s", "f0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x38300000, 0xffff8000, "fldx.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0x38380000, 0xffff8000, "fstx.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0x38740000, 0xffff8000, "fldgt.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0x38750000, 0xffff8000, "fldle.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0x38760000, 0xffff8000, "fstgt.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0x38770000, 0xffff8000, "fstle.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_double_float_load_store_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x2b800000, 0xffc00000, "fld.d", "f0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x2bc00000, 0xffc00000, "fst.d", "f0:5,r5:5,so10:12", 0, 0, 0, 0 }, |
| { 0x38340000, 0xffff8000, "fldx.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0x383c0000, 0xffff8000, "fstx.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0x38748000, 0xffff8000, "fldgt.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0x38758000, 0xffff8000, "fldle.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0x38768000, 0xffff8000, "fstgt.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0x38778000, 0xffff8000, "fstle.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_float_jmp_opcodes[] = |
| { |
| { 0x0, 0x0, "bceqz", "c,la", "bceqz %1,%%b21(%2)", 0, 0, 0 }, |
| { 0x48000000, 0xfc000300, "bceqz", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "bcnez", "c,la", "bcnez %1,%%b21(%2)", 0, 0, 0 }, |
| { 0x48000100, 0xfc000300, "bcnez", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_jmp_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x0, 0x0, "beqz", "r,la", "beqz %1,%%b21(%2)", 0, 0, 0 }, |
| { 0x40000000, 0xfc000000, "beqz", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "bnez", "r,la", "bnez %1,%%b21(%2)", 0, 0, 0 }, |
| { 0x44000000, 0xfc000000, "bnez", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 }, |
| { 0x4c000000, 0xfc000000, "jirl", "r0:5,r5:5,so10:16<<2", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 }, |
| { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "bl", "la", "bl %%b26(%1)", 0, 0, 0 }, |
| { 0x54000000, 0xfc000000, "bl", "sb0:10|10:16<<2", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "beq", "r,r,la", "beq %1,%2,%%b16(%3)", 0, 0, 0 }, |
| { 0x58000000, 0xfc000000, "beq", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "bne", "r,r,la", "bne %1,%2,%%b16(%3)", 0, 0, 0 }, |
| { 0x5c000000, 0xfc000000, "bne", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "blt", "r,r,la", "blt %1,%2,%%b16(%3)", 0, 0, 0 }, |
| { 0x60000000, 0xfc000000, "blt", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "bge", "r,r,la", "bge %1,%2,%%b16(%3)", 0, 0, 0 }, |
| { 0x64000000, 0xfc000000, "bge", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "bltu", "r,r,la", "bltu %1,%2,%%b16(%3)", 0, 0, 0 }, |
| { 0x68000000, 0xfc000000, "bltu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, |
| { 0x0, 0x0, "bgeu", "r,r,la", "bgeu %1,%2,%%b16(%3)", 0, 0, 0 }, |
| { 0x6c000000, 0xfc000000, "bgeu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 }, |
| /* Jumps implemented with macros. */ |
| { 0x0, 0x0, "bgt", "r,r,la", "blt %2,%1,%%b16(%3)", 0, 0, 0 }, |
| { 0x0, 0x0, "bltz", "r,la", "blt %1,$r0,%%b16(%2)", 0, 0, 0 }, |
| { 0x0, 0x0, "bgtz", "r,la", "blt $r0,%1,%%b16(%2)", 0, 0, 0 }, |
| { 0x0, 0x0, "ble", "r,r,la", "bge %2,%1,%%b16(%3)", 0, 0, 0 }, |
| { 0x0, 0x0, "bgez", "r,la", "bge %1,$r0,%%b16(%2)", 0, 0, 0 }, |
| { 0x0, 0x0, "blez", "r,la", "bge $r0,%1,%%b16(%2)", 0, 0, 0 }, |
| { 0x0, 0x0, "bgtu", "r,r,la", "bltu %2,%1,%%b16(%3)", 0, 0, 0 }, |
| { 0x0, 0x0, "bleu", "r,r,la", "bgeu %2,%1,%%b16(%3)", 0, 0, 0 }, |
| { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 }, |
| { 0x0, 0x0, "ret", "", "jirl $r0,$r1,0", 0, 0, 0 }, |
| { 0, 0, 0, 0, 0, 0, 0, 0 } /* Terminate the list. */ |
| }; |
| |
| static struct loongarch_opcode loongarch_lsx_opcodes[] = |
| { |
| /* match, mask, name, format, macro, include, exclude, pinfo. */ |
| { 0x70000000, 0xffff8000, "vseq.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70008000, 0xffff8000, "vseq.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70010000, 0xffff8000, "vseq.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70018000, 0xffff8000, "vseq.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70020000, 0xffff8000, "vsle.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70028000, 0xffff8000, "vsle.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70030000, 0xffff8000, "vsle.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70038000, 0xffff8000, "vsle.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70040000, 0xffff8000, "vsle.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70048000, 0xffff8000, "vsle.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70050000, 0xffff8000, "vsle.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70058000, 0xffff8000, "vsle.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70060000, 0xffff8000, "vslt.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70068000, 0xffff8000, "vslt.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70070000, 0xffff8000, "vslt.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70078000, 0xffff8000, "vslt.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70080000, 0xffff8000, "vslt.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70088000, 0xffff8000, "vslt.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70090000, 0xffff8000, "vslt.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70098000, 0xffff8000, "vslt.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x700a0000, 0xffff8000, "vadd.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x700a8000, 0xffff8000, "vadd.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x700b0000, 0xffff8000, "vadd.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x700b8000, 0xffff8000, "vadd.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x700c0000, 0xffff8000, "vsub.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x700c8000, 0xffff8000, "vsub.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x700d0000, 0xffff8000, "vsub.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x700d8000, 0xffff8000, "vsub.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70460000, 0xffff8000, "vsadd.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70468000, 0xffff8000, "vsadd.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70470000, 0xffff8000, "vsadd.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70478000, 0xffff8000, "vsadd.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70480000, 0xffff8000, "vssub.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70488000, 0xffff8000, "vssub.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70490000, 0xffff8000, "vssub.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70498000, 0xffff8000, "vssub.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x704a0000, 0xffff8000, "vsadd.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x704a8000, 0xffff8000, "vsadd.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x704b0000, 0xffff8000, "vsadd.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x704b8000, 0xffff8000, "vsadd.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x704c0000, 0xffff8000, "vssub.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x704c8000, 0xffff8000, "vssub.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x704d0000, 0xffff8000, "vssub.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x704d8000, 0xffff8000, "vssub.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70540000, 0xffff8000, "vhaddw.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70548000, 0xffff8000, "vhaddw.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70550000, 0xffff8000, "vhaddw.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70558000, 0xffff8000, "vhaddw.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70560000, 0xffff8000, "vhsubw.h.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70568000, 0xffff8000, "vhsubw.w.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70570000, 0xffff8000, "vhsubw.d.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70578000, 0xffff8000, "vhsubw.q.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70580000, 0xffff8000, "vhaddw.hu.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70588000, 0xffff8000, "vhaddw.wu.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70590000, 0xffff8000, "vhaddw.du.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70598000, 0xffff8000, "vhaddw.qu.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x705a0000, 0xffff8000, "vhsubw.hu.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x705a8000, 0xffff8000, "vhsubw.wu.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x705b0000, 0xffff8000, "vhsubw.du.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x705b8000, 0xffff8000, "vhsubw.qu.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x705c0000, 0xffff8000, "vadda.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x705c8000, 0xffff8000, "vadda.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x705d0000, 0xffff8000, "vadda.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x705d8000, 0xffff8000, "vadda.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70600000, 0xffff8000, "vabsd.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70608000, 0xffff8000, "vabsd.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70610000, 0xffff8000, "vabsd.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70618000, 0xffff8000, "vabsd.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70620000, 0xffff8000, "vabsd.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70628000, 0xffff8000, "vabsd.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70630000, 0xffff8000, "vabsd.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70638000, 0xffff8000, "vabsd.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70640000, 0xffff8000, "vavg.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70648000, 0xffff8000, "vavg.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70650000, 0xffff8000, "vavg.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70658000, 0xffff8000, "vavg.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70660000, 0xffff8000, "vavg.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70668000, 0xffff8000, "vavg.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70670000, 0xffff8000, "vavg.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70678000, 0xffff8000, "vavg.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70680000, 0xffff8000, "vavgr.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70688000, 0xffff8000, "vavgr.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70690000, 0xffff8000, "vavgr.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70698000, 0xffff8000, "vavgr.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x706a0000, 0xffff8000, "vavgr.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x706a8000, 0xffff8000, "vavgr.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x706b0000, 0xffff8000, "vavgr.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x706b8000, 0xffff8000, "vavgr.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70700000, 0xffff8000, "vmax.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70708000, 0xffff8000, "vmax.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70710000, 0xffff8000, "vmax.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70718000, 0xffff8000, "vmax.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70720000, 0xffff8000, "vmin.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70728000, 0xffff8000, "vmin.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70730000, 0xffff8000, "vmin.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70738000, 0xffff8000, "vmin.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70740000, 0xffff8000, "vmax.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70748000, 0xffff8000, "vmax.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70750000, 0xffff8000, "vmax.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70758000, 0xffff8000, "vmax.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70760000, 0xffff8000, "vmin.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70768000, 0xffff8000, "vmin.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70770000, 0xffff8000, "vmin.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70778000, 0xffff8000, "vmin.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70840000, 0xffff8000, "vmul.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70848000, 0xffff8000, "vmul.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70850000, 0xffff8000, "vmul.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70858000, 0xffff8000, "vmul.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70860000, 0xffff8000, "vmuh.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70868000, 0xffff8000, "vmuh.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70870000, 0xffff8000, "vmuh.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70878000, 0xffff8000, "vmuh.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70880000, 0xffff8000, "vmuh.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70888000, 0xffff8000, "vmuh.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70890000, 0xffff8000, "vmuh.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70898000, 0xffff8000, "vmuh.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70a80000, 0xffff8000, "vmadd.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70a88000, 0xffff8000, "vmadd.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70a90000, 0xffff8000, "vmadd.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70a98000, 0xffff8000, "vmadd.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70aa0000, 0xffff8000, "vmsub.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70aa8000, 0xffff8000, "vmsub.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ab0000, 0xffff8000, "vmsub.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ab8000, 0xffff8000, "vmsub.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e00000, 0xffff8000, "vdiv.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e08000, 0xffff8000, "vdiv.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e10000, 0xffff8000, "vdiv.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e18000, 0xffff8000, "vdiv.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e20000, 0xffff8000, "vmod.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e28000, 0xffff8000, "vmod.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e30000, 0xffff8000, "vmod.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e38000, 0xffff8000, "vmod.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e40000, 0xffff8000, "vdiv.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e48000, 0xffff8000, "vdiv.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e50000, 0xffff8000, "vdiv.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e58000, 0xffff8000, "vdiv.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e60000, 0xffff8000, "vmod.bu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e68000, 0xffff8000, "vmod.hu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e70000, 0xffff8000, "vmod.wu", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e78000, 0xffff8000, "vmod.du", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e80000, 0xffff8000, "vsll.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e88000, 0xffff8000, "vsll.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e90000, 0xffff8000, "vsll.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70e98000, 0xffff8000, "vsll.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ea0000, 0xffff8000, "vsrl.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ea8000, 0xffff8000, "vsrl.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70eb0000, 0xffff8000, "vsrl.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70eb8000, 0xffff8000, "vsrl.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ec0000, 0xffff8000, "vsra.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ec8000, 0xffff8000, "vsra.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ed0000, 0xffff8000, "vsra.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ed8000, 0xffff8000, "vsra.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ee0000, 0xffff8000, "vrotr.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ee8000, 0xffff8000, "vrotr.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ef0000, 0xffff8000, "vrotr.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ef8000, 0xffff8000, "vrotr.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f00000, 0xffff8000, "vsrlr.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f08000, 0xffff8000, "vsrlr.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f10000, 0xffff8000, "vsrlr.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f18000, 0xffff8000, "vsrlr.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f20000, 0xffff8000, "vsrar.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f28000, 0xffff8000, "vsrar.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f30000, 0xffff8000, "vsrar.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f38000, 0xffff8000, "vsrar.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f48000, 0xffff8000, "vsrln.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f50000, 0xffff8000, "vsrln.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f58000, 0xffff8000, "vsrln.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f68000, 0xffff8000, "vsran.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f70000, 0xffff8000, "vsran.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f78000, 0xffff8000, "vsran.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f88000, 0xffff8000, "vsrlrn.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f90000, 0xffff8000, "vsrlrn.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70f98000, 0xffff8000, "vsrlrn.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70fa8000, 0xffff8000, "vsrarn.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70fb0000, 0xffff8000, "vsrarn.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70fb8000, 0xffff8000, "vsrarn.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70fc8000, 0xffff8000, "vssrln.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70fd0000, 0xffff8000, "vssrln.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70fd8000, 0xffff8000, "vssrln.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70fe8000, 0xffff8000, "vssran.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ff0000, 0xffff8000, "vssran.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x70ff8000, 0xffff8000, "vssran.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71008000, 0xffff8000, "vssrlrn.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71010000, 0xffff8000, "vssrlrn.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71018000, 0xffff8000, "vssrlrn.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71028000, 0xffff8000, "vssrarn.b.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71030000, 0xffff8000, "vssrarn.h.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71038000, 0xffff8000, "vssrarn.w.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71048000, 0xffff8000, "vssrln.bu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71050000, 0xffff8000, "vssrln.hu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71058000, 0xffff8000, "vssrln.wu.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71068000, 0xffff8000, "vssran.bu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71070000, 0xffff8000, "vssran.hu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71078000, 0xffff8000, "vssran.wu.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71088000, 0xffff8000, "vssrlrn.bu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71090000, 0xffff8000, "vssrlrn.hu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71098000, 0xffff8000, "vssrlrn.wu.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x710a8000, 0xffff8000, "vssrarn.bu.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x710b0000, 0xffff8000, "vssrarn.hu.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x710b8000, 0xffff8000, "vssrarn.wu.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x710c0000, 0xffff8000, "vbitclr.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x710c8000, 0xffff8000, "vbitclr.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x710d0000, 0xffff8000, "vbitclr.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x710d8000, 0xffff8000, "vbitclr.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x710e0000, 0xffff8000, "vbitset.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x710e8000, 0xffff8000, "vbitset.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x710f0000, 0xffff8000, "vbitset.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x710f8000, 0xffff8000, "vbitset.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71100000, 0xffff8000, "vbitrev.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71108000, 0xffff8000, "vbitrev.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71110000, 0xffff8000, "vbitrev.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71118000, 0xffff8000, "vbitrev.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71160000, 0xffff8000, "vpackev.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71168000, 0xffff8000, "vpackev.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71170000, 0xffff8000, "vpackev.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71178000, 0xffff8000, "vpackev.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71180000, 0xffff8000, "vpackod.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71188000, 0xffff8000, "vpackod.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71190000, 0xffff8000, "vpackod.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71198000, 0xffff8000, "vpackod.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711a0000, 0xffff8000, "vilvl.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711a8000, 0xffff8000, "vilvl.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711b0000, 0xffff8000, "vilvl.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711b8000, 0xffff8000, "vilvl.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711c0000, 0xffff8000, "vilvh.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711c8000, 0xffff8000, "vilvh.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711d0000, 0xffff8000, "vilvh.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711d8000, 0xffff8000, "vilvh.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711e0000, 0xffff8000, "vpickev.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711e8000, 0xffff8000, "vpickev.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711f0000, 0xffff8000, "vpickev.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x711f8000, 0xffff8000, "vpickev.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71200000, 0xffff8000, "vpickod.b", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71208000, 0xffff8000, "vpickod.h", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71210000, 0xffff8000, "vpickod.w", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71218000, 0xffff8000, "vpickod.d", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71220000, 0xffff8000, "vreplve.b", "v0:5,v5:5,r10:5", 0, 0, 0, 0}, |
| { 0x71228000, 0xffff8000, "vreplve.h", "v0:5,v5:5,r10:5", 0, 0, 0, 0}, |
| { 0x71230000, 0xffff8000, "vreplve.w", "v0:5,v5:5,r10:5", 0, 0, 0, 0}, |
| { 0x71238000, 0xffff8000, "vreplve.d", "v0:5,v5:5,r10:5", 0, 0, 0, 0}, |
| { 0x71260000, 0xffff8000, "vand.v", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71268000, 0xffff8000, "vor.v", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71270000, 0xffff8000, "vxor.v", "v0:5,v5:5,v10:5", 0, 0, 0, 0 }, |
| { 0x71278000, |