| # Makefile template for Configure for the m32r simulator |
| # Copyright (C) 1996-2021 Free Software Foundation, Inc. |
| # Contributed by Cygnus Support. |
| # |
| # This file is part of GDB, the GNU debugger. |
| # |
| # This program is free software; you can redistribute it and/or modify |
| # it under the terms of the GNU General Public License as published by |
| # the Free Software Foundation; either version 3 of the License, or |
| # (at your option) any later version. |
| # |
| # This program is distributed in the hope that it will be useful, |
| # but WITHOUT ANY WARRANTY; without even the implied warranty of |
| # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| # GNU General Public License for more details. |
| # |
| # You should have received a copy of the GNU General Public License |
| # along with this program. If not, see <http://www.gnu.org/licenses/>. |
| |
| ## COMMON_PRE_CONFIG_FRAG |
| |
| M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o |
| M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o |
| M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o |
| TRAPS_OBJ = @traps_obj@ |
| |
| SIM_OBJS = \ |
| $(SIM_NEW_COMMON_OBJS) \ |
| cgen-utils.o cgen-trace.o cgen-scache.o \ |
| cgen-run.o \ |
| sim-if.o arch.o \ |
| $(M32R_OBJS) \ |
| $(M32RX_OBJS) \ |
| $(M32R2_OBJS) \ |
| $(TRAPS_OBJ) |
| |
| SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart |
| |
| # Extra headers included by sim-main.h. |
| SIM_EXTRA_DEPS = \ |
| $(CGEN_INCLUDE_DEPS) \ |
| arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h \ |
| eng.h engx.h eng2.h |
| |
| SIM_EXTRA_CFLAGS = @sim_extra_cflags@ |
| |
| SIM_EXTRA_CLEAN = m32r-clean |
| |
| # Code doesn't build cleanly yet. |
| SIM_WERROR_CFLAGS = |
| |
| ## COMMON_POST_CONFIG_FRAG |
| |
| arch = m32r |
| |
| # M32R objs |
| |
| M32RBF_INCLUDE_DEPS = \ |
| $(CGEN_MAIN_CPU_DEPS) \ |
| cpu.h decode.h eng.h |
| |
| # FIXME: Use of `mono' is wip. |
| mloop.c eng.h: stamp-mloop ; @true |
| stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile |
| $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ |
| -mono -fast -pbb -switch sem-switch.c \ |
| -cpu m32rbf -infile $(srcdir)/mloop.in |
| $(SHELL) $(srcroot)/move-if-change eng.hin eng.h |
| $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c |
| touch stamp-mloop |
| |
| # M32RX objs |
| |
| M32RXF_INCLUDE_DEPS = \ |
| $(CGEN_MAIN_CPU_DEPS) \ |
| cpux.h decodex.h engx.h |
| |
| # FIXME: Use of `mono' is wip. |
| mloopx.c engx.h: stamp-xmloop ; @true |
| stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile |
| $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ |
| -mono -no-fast -pbb -parallel-write -switch semx-switch.c \ |
| -cpu m32rxf -infile $(srcdir)/mloopx.in \ |
| -outfile-suffix x |
| $(SHELL) $(srcroot)/move-if-change engx.hin engx.h |
| $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c |
| touch stamp-xmloop |
| |
| # M32R2 objs |
| |
| M32R2F_INCLUDE_DEPS = \ |
| $(CGEN_MAIN_CPU_DEPS) \ |
| cpu2.h decode2.h eng2.h |
| |
| # FIXME: Use of `mono' is wip. |
| mloop2.c eng2.h: stamp-2mloop ; @true |
| stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile |
| $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ |
| -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \ |
| -cpu m32r2f -infile $(srcdir)/mloop2.in \ |
| -outfile-suffix 2 |
| $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h |
| $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c |
| touch stamp-2mloop |
| |
| m32r-clean: |
| rm -f mloop.c eng.h stamp-mloop |
| rm -f mloopx.c engx.h stamp-xmloop |
| rm -f mloop2.c eng2.h stamp-2mloop |
| rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu |
| rm -f tmp-* |
| |
| # NOTE: Generated source files are specified as full paths, |
| # e.g. $(srcdir)/arch.c, because make may decide the files live |
| # in objdir otherwise. |
| |
| stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile |
| $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ |
| archfile=$(CPU_DIR)/m32r.cpu \ |
| FLAGS="with-scache with-profile=fn" |
| touch stamp-arch |
| $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch |
| @true |
| |
| stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile |
| $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ |
| cpu=m32rbf mach=m32r SUFFIX= \ |
| archfile=$(CPU_DIR)/m32r.cpu \ |
| FLAGS="with-scache with-profile=fn" \ |
| EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" |
| touch stamp-cpu |
| $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu |
| @true |
| |
| stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile |
| $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ |
| cpu=m32rxf mach=m32rx SUFFIX=x \ |
| archfile=$(CPU_DIR)/m32r.cpu \ |
| FLAGS="with-scache with-profile=fn" \ |
| EXTRAFILES="$(CGEN_CPU_SEMSW)" |
| touch stamp-xcpu |
| $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu |
| @true |
| |
| stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile |
| $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ |
| cpu=m32r2f mach=m32r2 SUFFIX=2 \ |
| archfile=$(CPU_DIR)/m32r.cpu \ |
| FLAGS="with-scache with-profile=fn" \ |
| EXTRAFILES="$(CGEN_CPU_SEMSW)" |
| touch stamp-2cpu |
| $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu |
| @true |