)]}'
{
  "commit": "be2f8fcd9df7d50fd17125eccecf7fc0bad6b2c8",
  "tree": "e1c5643331999a38a19673f39b70b19d505df876",
  "parents": [
    "d0579d4d1c724b524da43ad164ce140218497ead"
  ],
  "author": {
    "name": "Jan Beulich",
    "email": "jbeulich@suse.com",
    "time": "Thu Jul 22 13:02:08 2021 +0200"
  },
  "committer": {
    "name": "Jan Beulich",
    "email": "jbeulich@suse.com",
    "time": "Thu Jul 22 13:02:08 2021 +0200"
  },
  "message": "x86: correct VCVT{,U}SI2SD rounding mode handling\n\nWith EVEX.W clear the instruction doesn\u0027t ignore the rounding mode, but\n(like for other insns without rounding semantics) EVEX.b set causes #UD.\nHence the handling of EVEX.W needs to be done when processing\nevex_rounding_64_mode, not at the decode stages.\n\nDerive a new 64-bit testcase from the 32-bit one to cover the different\nEVEX.W treatment in both cases.\n",
  "tree_diff": [
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