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{
  "commit": "c7defc5386cc53a4abbb7c53a924cdac3f16aa33",
  "tree": "7593f82a48e1f517da03e98b0ffa70fb2d67601b",
  "parents": [
    "448cf9e67d3fe9edbef70d4cfcc32d1816603370"
  ],
  "author": {
    "name": "Indu Bhagat",
    "email": "indu.bhagat@oracle.com",
    "time": "Mon Jan 15 01:00:31 2024 -0800"
  },
  "committer": {
    "name": "Indu Bhagat",
    "email": "indu.bhagat@oracle.com",
    "time": "Mon Jan 15 03:31:35 2024 -0800"
  },
  "message": "gas: x86: synthesize CFI for hand-written asm\n\nThis patch adds support in GAS to create generic GAS instructions\n(a.k.a., the ginsn) for the x86 backend (AMD64 ABI only at this time).\nUsing this ginsn infrastructure, GAS can then synthesize CFI for\nhand-written asm for x86_64.\n\nA ginsn is a target-independent representation of the machine\ninstructions.  One machine instruction may need one or more ginsn.\n\nThis patch also adds skeleton support for printing ginsn in the listing\noutput for debugging purposes.\n\nSince the current use-case of ginsn is to synthesize CFI, the x86 target\nneeds to generate ginsns necessary for the following machine\ninstructions only:\n\n - All change of flow instructions, including all conditional and\n   unconditional branches, call and return from functions.\n - All register saves and unsaves to the stack.\n - All instructions affecting the two registers that could potentially\n   be used as the base register for CFA tracking.  For SCFI, the base\n   register for CFA tracking is limited to REG_SP and REG_FP only for\n   now.\n\nThe representation of ginsn is kept simple:\n\n- GAS instruction has GINSN_NUM_SRC_OPNDS (defined to be 2 at this time)\n  number of source operands and one destination operand at this time.\n- GAS instruction uses DWARF register numbers in its representation and\n  does not track register size.\n- GAS instructions carry location information (file name and line\n  number).\n- GAS instructions are ID\u0027s with a natural number in order of their\n  addtion to the list.  This can be used as a proxy for the static\n  program order of the corresponding machine instructions.\n\nNote that, GAS instruction (ginsn) format does not support\nGINSN_TYPE_PUSH and GINSN_TYPE_POP.  Some architectures, like aarch64,\ndo not have push and pop instructions, but rather STP/LDP/STR/LDR etc.\ninstructions.  Further these instructions have a variety of addressing\nmodes, like offset, pre-indexing and post-indexing etc.  Among other\nthings, one of differences in these addressing modes is _when_ the addr\nregister is updated with the result of the address calculation: before\nor after the memory operation.  To best support such needs, the generic\ninstructions like GINSN_TYPE_LOAD, GINSN_TYPE_STORE together with\nGINSN_TYPE_ADD, and GINSN_TYPE_SUB may be used.\n\nThe functionality provided in ginsn.c and scfi.c is compiled in when a\ntarget defines TARGET_USE_SCFI and TARGET_USE_GINSN.  This can be\nrevisited later when there are other use-cases of creating ginsn\u0027s in\nGAS, apart from the current use-case of synthesizing CFI for\nhand-written asm.\n\nSupport is added only for System V AMD64 ABI for ELF at this time.  If\nthe user enables SCFI with --32, GAS issues an error:\n\n  \"Fatal error: SCFI is not supported for this ABI\"\n\nFor synthesizing (DWARF) CFI, the SCFI machinery requires the programmer\nto adhere to some pre-requisites for their asm:\n   - Hand-written asm block must begin with a .type   foo, @function\nIt is highly recommended to, additionally, also ensure that:\n   - Hand-written asm block ends with a .size foo, .-foo\n\nThe SCFI machinery encodes some rules which align with the standard\ncalling convention specified by the ABI.  Apart from the rules, the SCFI\nmachinery employs some heuristics.  For example:\n   - The base register for CFA tracking may be either REG_SP or REG_FP.\n   - If the base register for CFA tracking is REG_SP, the precise amount of\n     stack usage (and hence, the value of REG_SP) must be known at all times.\n   - If using dynamic stack allocation, the function must switch to\n     FP-based CFA.  This means using instructions like the following (in\n     AMD64) in prologue:\n        pushq   %rbp\n        movq    %rsp, %rbp\n     and analogous instructions in epilogue.\n   - Save and Restore of callee-saved registers must be symmetrical.\n     However, the SCFI machinery at this time only warns if any such\n     asymmetry is seen.\n\nThese heuristics/rules are architecture-independent and are meant to\nemployed for all architectures/ABIs using SCFI in the future.\n\ngas/\n\t* Makefile.am: Add new files.\n\t* Makefile.in: Regenerated.\n\t* as.c (defined): Handle documentation and listing option for\n\tginsns and SCFI.\n\t* config/obj-elf.c (obj_elf_size): Invoke ginsn_data_end.\n\t(obj_elf_type): Invoke ginsn_data_begin.\n\t* config/tc-i386.c (x86_scfi_callee_saved_p): New function.\n\t(ginsn_prefix_66H_p): Likewise.\n\t(ginsn_dw2_regnum): Likewise.\n\t(x86_ginsn_addsub_reg_mem): Likewise.\n\t(x86_ginsn_addsub_mem_reg): Likewise.\n\t(x86_ginsn_alu_imm): Likewise.\n\t(x86_ginsn_move): Likewise.\n\t(x86_ginsn_lea): Likewise.\n\t(x86_ginsn_jump): Likewise.\n\t(x86_ginsn_jump_cond): Likewise.\n\t(x86_ginsn_enter): Likewise.\n\t(x86_ginsn_safe_to_skip): Likewise.\n\t(x86_ginsn_unhandled): Likewise.\n\t(x86_ginsn_new): New functionality to generate ginsns.\n\t(md_assemble): Invoke x86_ginsn_new.\n\t(s_insn): Likewise.\n\t(i386_target_format): Add hard error for usage of SCFI with non AMD64 ABIs.\n\t* config/tc-i386.h (TARGET_USE_GINSN): New definition.\n\t(TARGET_USE_SCFI): Likewise.\n\t(SCFI_MAX_REG_ID): Likewise.\n\t(REG_FP): Likewise.\n\t(REG_SP): Likewise.\n\t(SCFI_INIT_CFA_OFFSET): Likewise.\n\t(SCFI_CALLEE_SAVED_REG_P): Likewise.\n\t(x86_scfi_callee_saved_p): Likewise.\n\t* gas/listing.h (LISTING_GINSN_SCFI): New define for ginsn and\n\tSCFI.\n\t* gas/read.c (read_a_source_file): Close SCFI processing at end\n\tof file read.\n\t* gas/scfidw2gen.c (scfi_process_cfi_label): Add implementation.\n\t(scfi_process_cfi_signal_frame): Likewise.\n\t* subsegs.h (struct frch_ginsn_data): New forward declaration.\n\t(struct frchain): New member for ginsn data.\n\t* gas/subsegs.c (subseg_set_rest): Initialize the new member.\n\t* symbols.c (colon): Invoke ginsn_frob_label to convey\n\tuser-defined labels to ginsn infrastructure.\n\t* ginsn.c: New file.\n\t* ginsn.h: New file.\n\t* scfi.c: New file.\n\t* scfi.h: New file.\n",
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