blob: 794d19b45b513e42ec14c7368cf10f112168b30e [file] [log] [blame]
#mach: crisv32
#output: Basic clock cycles, total @: 5\n
#output: Memory source stall cycles: 0\n
#output: Memory read-after-write stall cycles: 0\n
#output: Movem source stall cycles: 0\n
#output: Movem destination stall cycles: 0\n
#output: Movem address stall cycles: 0\n
#output: Multiplication source stall cycles: 0\n
#output: Jump source stall cycles: 0\n
#output: Branch misprediction stall cycles: 0\n
#output: Jump target stall cycles: 0\n
#sim: --cris-cycles=basic
.include "testutils.inc"
.global _start
_start:
nop
nop
nop
nop
nop
break 15