# Intel(r) Wireless MMX(tm) technology testcase for WPACK
# mach: xscale
# as: -mcpu=xscale+iwmmxt

	.include "testutils.inc"

	start

	.global wpack
wpack:
	# Enable access to CoProcessors 0 & 1 before
        # we attempt these instructions.

	mvi_h_gr   r1, 3
	mcr        p15, 0, r1, cr15, cr1, 0

	# Test Halfword, Unsigned Saturation, Packing
		
	mvi_h_gr   r0, 0x12345678
	mvi_h_gr   r1, 0x9abcdef0
	mvi_h_gr   r2, 0x11111111
	mvi_h_gr   r3, 0x00000000
	mvi_h_gr   r4, 0
	mvi_h_gr   r5, 0

	tmcrr	   wr0, r0, r1
	tmcrr	   wr1, r2, r3
	tmcrr	   wr2, r4, r5

	wpackhus   wr2, wr0, wr1
	
	tmrrc	   r0, r1, wr0
	tmrrc	   r2, r3, wr1
	tmrrc	   r4, r5, wr2
	
	test_h_gr  r0, 0x12345678
	test_h_gr  r1, 0x9abcdef0
	test_h_gr  r2, 0x11111111
	test_h_gr  r3, 0x00000000
	test_h_gr  r4, 0x0000ffff
	test_h_gr  r5, 0x0000ffff  
		
	# Test Halfword, Signed Saturation, Packing
		
	mvi_h_gr   r0, 0x12345678
	mvi_h_gr   r1, 0x9abcdef0
	mvi_h_gr   r2, 0x11111111
	mvi_h_gr   r3, 0x00000000
	mvi_h_gr   r4, 0
	mvi_h_gr   r5, 0

	tmcrr	   wr0, r0, r1
	tmcrr	   wr1, r2, r3
	tmcrr	   wr2, r4, r5

	wpackhss   wr2, wr0, wr1
	
	tmrrc	   r0, r1, wr0
	tmrrc	   r2, r3, wr1
	tmrrc	   r4, r5, wr2
	
	test_h_gr  r0, 0x12345678
	test_h_gr  r1, 0x9abcdef0
	test_h_gr  r2, 0x11111111
	test_h_gr  r3, 0x00000000
	test_h_gr  r4, 0x80807f7f
	test_h_gr  r5, 0x00007f7f  
		
	# Test Word, Unsigned Saturation, Packing
		
	mvi_h_gr   r0, 0x12345678
	mvi_h_gr   r1, 0x9abcdef0
	mvi_h_gr   r2, 0x11111111
	mvi_h_gr   r3, 0x00000000
	mvi_h_gr   r4, 0
	mvi_h_gr   r5, 0

	tmcrr	   wr0, r0, r1
	tmcrr	   wr1, r2, r3
	tmcrr	   wr2, r4, r5

	wpackwus   wr2, wr0, wr1
	
	tmrrc	   r0, r1, wr0
	tmrrc	   r2, r3, wr1
	tmrrc	   r4, r5, wr2
	
	test_h_gr  r0, 0x12345678
	test_h_gr  r1, 0x9abcdef0
	test_h_gr  r2, 0x11111111
	test_h_gr  r3, 0x00000000
	test_h_gr  r4, 0x0000ffff
	test_h_gr  r5, 0x0000ffff  
		
	# Test Word, Signed Saturation, Packing
		
	mvi_h_gr   r0, 0x12345678
	mvi_h_gr   r1, 0x9abcdef0
	mvi_h_gr   r2, 0x11111111
	mvi_h_gr   r3, 0x00000000
	mvi_h_gr   r4, 0
	mvi_h_gr   r5, 0

	tmcrr	   wr0, r0, r1
	tmcrr	   wr1, r2, r3
	tmcrr	   wr2, r4, r5

	wpackwss   wr2, wr0, wr1
	
	tmrrc	   r0, r1, wr0
	tmrrc	   r2, r3, wr1
	tmrrc	   r4, r5, wr2
	
	test_h_gr  r0, 0x12345678
	test_h_gr  r1, 0x9abcdef0
	test_h_gr  r2, 0x11111111
	test_h_gr  r3, 0x00000000
	test_h_gr  r4, 0x80007fff
	test_h_gr  r5, 0x00007fff  
		
	# Test Double Word, Unsigned Saturation, Packing
		
	mvi_h_gr   r0, 0x12345678
	mvi_h_gr   r1, 0x9abcdef0
	mvi_h_gr   r2, 0x11111111
	mvi_h_gr   r3, 0x00000000
	mvi_h_gr   r4, 0
	mvi_h_gr   r5, 0

	tmcrr	   wr0, r0, r1
	tmcrr	   wr1, r2, r3
	tmcrr	   wr2, r4, r5

	wpackdus   wr2, wr0, wr1
	
	tmrrc	   r0, r1, wr0
	tmrrc	   r2, r3, wr1
	tmrrc	   r4, r5, wr2
	
	test_h_gr  r0, 0x12345678
	test_h_gr  r1, 0x9abcdef0
	test_h_gr  r2, 0x11111111
	test_h_gr  r3, 0x00000000
	test_h_gr  r4, 0x00000000
	test_h_gr  r5, 0x11111111
		
	# Test Double Word, Signed Saturation, Packing
		
	mvi_h_gr   r0, 0x12345678
	mvi_h_gr   r1, 0x9abcdef0
	mvi_h_gr   r2, 0x11111111
	mvi_h_gr   r3, 0x00000000
	mvi_h_gr   r4, 0
	mvi_h_gr   r5, 0

	tmcrr	   wr0, r0, r1
	tmcrr	   wr1, r2, r3
	tmcrr	   wr2, r4, r5

	wpackdss   wr2, wr0, wr1
	
	tmrrc	   r0, r1, wr0
	tmrrc	   r2, r3, wr1
	tmrrc	   r4, r5, wr2
	
	test_h_gr  r0, 0x12345678
	test_h_gr  r1, 0x9abcdef0
	test_h_gr  r2, 0x11111111
	test_h_gr  r3, 0x00000000
	test_h_gr  r4, 0x80000000
	test_h_gr  r5, 0x11111111  

	pass