d5a71b1131778cf2a023855966831eb2457d50d6 - binutils-gdb

commit	d5a71b1131778cf2a023855966831eb2457d50d6	[log] [tgz]
author	Mike Frysinger <vapier@gentoo.org>	Fri Aug 12 22:12:41 2016 +0800
committer	Mike Frysinger <vapier@gentoo.org>	Mon Apr 12 00:14:32 2021 -0400
tree	77243d6b326ca6dfa0ebb60446a9bc518b11617e
parent	32d715691aa037f2838b41fa257c2e239d67c134 [diff]

sim: cgen: move cgen_cpu_max_extra_bytes logic into the common code

Every arch handles this the same way, so move it to the common code.
This will also make unifying the sim_cpu structure easier.

sim/aarch64/ChangeLog[diff]
sim/aarch64/interp.c[diff]
sim/arm/ChangeLog[diff]
sim/arm/wrapper.c[diff]
sim/avr/ChangeLog[diff]
sim/avr/interp.c[diff]
sim/bfin/ChangeLog[diff]
sim/bfin/interp.c[diff]
sim/bpf/ChangeLog[diff]
sim/bpf/sim-if.c[diff]
sim/common/ChangeLog[diff]
sim/common/sim-cpu.c[diff]
sim/common/sim-cpu.h[diff]
sim/cr16/ChangeLog[diff]
sim/cr16/interp.c[diff]
sim/cris/ChangeLog[diff]
sim/cris/sim-if.c[diff]
sim/d10v/ChangeLog[diff]
sim/d10v/interp.c[diff]
sim/example-synacor/ChangeLog[diff]
sim/example-synacor/interp.c[diff]
sim/frv/ChangeLog[diff]
sim/frv/sim-if.c[diff]
sim/ft32/ChangeLog[diff]
sim/ft32/interp.c[diff]
sim/h8300/ChangeLog[diff]
sim/h8300/compile.c[diff]
sim/iq2000/ChangeLog[diff]
sim/iq2000/sim-if.c[diff]
sim/lm32/ChangeLog[diff]
sim/lm32/sim-if.c[diff]
sim/m32r/ChangeLog[diff]
sim/m32r/sim-if.c[diff]
sim/m68hc11/ChangeLog[diff]
sim/m68hc11/interp.c[diff]
sim/mcore/ChangeLog[diff]
sim/mcore/interp.c[diff]
sim/microblaze/ChangeLog[diff]
sim/microblaze/interp.c[diff]
sim/mips/ChangeLog[diff]
sim/mips/interp.c[diff]
sim/mn10300/ChangeLog[diff]
sim/mn10300/interp.c[diff]
sim/moxie/ChangeLog[diff]
sim/moxie/interp.c[diff]
sim/msp430/ChangeLog[diff]
sim/msp430/msp430-sim.c[diff]
sim/or1k/ChangeLog[diff]
sim/or1k/sim-if.c[diff]
sim/pru/ChangeLog[diff]
sim/pru/interp.c[diff]
sim/riscv/ChangeLog[diff]
sim/riscv/interp.c[diff]
sim/sh/ChangeLog[diff]
sim/sh/interp.c[diff]
sim/v850/ChangeLog[diff]
sim/v850/interp.c[diff]

57 files changed