)]}'
{
  "commit": "dd327181e96b8bc4d9bd97aa8d3d7fe01bf29628",
  "tree": "58258932920f080369cdb116aa37ab2e3ea672b9",
  "parents": [
    "6130dcb9e58209ee7679a38642ee43fb4a0b16d5"
  ],
  "author": {
    "name": "Jens Remus",
    "email": "jremus@linux.ibm.com",
    "time": "Fri Mar 01 12:45:14 2024 +0100"
  },
  "committer": {
    "name": "Jens Remus",
    "email": "jremus@linux.ibm.com",
    "time": "Fri Mar 01 12:45:14 2024 +0100"
  },
  "message": "s390: Do not erroneously use base operand value for length operand\n\nThe base register operand B may optionally be omitted in D(B) by coding\nD and in D(L,B) by coding D(L). The index register operand X may\noptionally be omitted in D(X,B) by coding D(,B) or D(B). Both base and\nindex register operands may optionally be omitted in D(X,B) by coding D.\nIn any case the omitted base and/or index register operand value\ndefaults to zero.\n\nWhen parsing an erroneously omitted length L operand in D(L,B) by coding\nD(,B) the base register operand B was erroneously consumed as length\noperand. When using a register name for the base register operand this\nwas detected and reported as error. But when not using a register name\nthe base register operand value was erroneously used as length operand\nvalue.\n\nCorrect the parsing of an omitted optional base or index register to not\nerroneously use the base register operand value as length, when\nerroneously omitting the length operand.\n\nWhile at it rename the variable used to remember whether the base or\nindex register operand was omitted to enhance code readability.\nAdditionally add test cases for the optional omission of base and/or\nindex register operands.\n\nExample assembler source:\n\tmvc\t16(1,%r1),32(%r2)\n\tmvc\t16(1),32(%r2)\n\tmvc\t16(,1),32(%r2)\t\t# undetected syntax error\n\nDisassembly of bad assembly without commit shows the base register\noperand value was erroneously used as length operand value:\n   0:   d2 00 10 10 20 20       mvc     16(1,%r1),32(%r2)\n   6:   d2 00 00 10 20 20       mvc     16(1,%r0),32(%r2)\n   c:   d2 00 00 10 20 20       mvc     16(1,%r0),32(%r2)\n\nAssembler messages with commit:\n3: Error: operand 1: missing operand\n\ngas/\n\t* config/tc-s390.c: Correct parsing of omitted base register.\n\t* testsuite/gas/s390/s390.exp: Add test cases for omitted base\n\tand/or index register.\n\t* testsuite/gas/s390/zarch-omitted-base-index.s: Test cases for\n\tomitted optional base or index register.\n\t* testsuite/gas/s390/zarch-omitted-base-index.d: Likewise.\n\t* testsuite/gas/s390/zarch-omitted-base-index-err.s: Test cases\n\tfor omitted base and/or index register.\n\t* testsuite/gas/s390/zarch-omitted-base-index-err.l: Likewise.\n\nReviewed-by: Andreas Krebbel \u003ckrebbel@linux.ibm.com\u003e\nSigned-off-by: Jens Remus \u003cjremus@linux.ibm.com\u003e\n",
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