| commit | e43d8768d909139bf5ec4a97c79a096ed28a4b08 | [log] [tgz] |
|---|---|---|
| author | Jiawei <jiawei@iscas.ac.cn> | Mon Mar 20 11:34:44 2023 +0800 |
| committer | Nelson Chu <nelson@rivosinc.com> | Tue Mar 21 17:47:47 2023 +0800 |
| tree | c687c4696bee3bf48b03aa964730d0155de04592 | |
| parent | fec61519220148421595a21173f74401416d8d54 [diff] |
RISC-V: Fix disassemble fetch fail return value. This bug reported in https://sourceware.org/bugzilla/show_bug.cgi?id=30184 And discussed in https://sourceware.org/pipermail/binutils/2023-February/126213.html We also checked the implementation of return value in arm and mips. So this patch changes the return value to -1, that can fix bugs and maintain consistency with other architectures. opcodes/ChangeLog: * riscv-dis.c (print_insn_riscv):Change the return value.