x86: minor improvements to optimize_disp() (part I)
- Do the zero checking first - there's no point in doing anything else
in this case.
- Drop two pointless & where just before it was checked that the
respective bits are clear already anyway.
diff --git a/gas/ChangeLog b/gas/ChangeLog
index e4cf2af..5926fff 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2021-06-08 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_disp): Drop redundant masking.
+ Re-order.
+
2021-06-07 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (i386_att_operand): Re-write handling of
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index a874968..9dbe6dc 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -5880,15 +5880,6 @@
{
offsetT op_disp = i.op[op].disps->X_add_number;
- if (i.types[op].bitfield.disp16
- && (op_disp & ~(offsetT) 0xffff) == 0)
- {
- /* If this operand is at most 16 bits, convert
- to a signed 16 bit number and don't use 64bit
- displacement. */
- op_disp = (((op_disp & 0xffff) ^ 0x8000) - 0x8000);
- i.types[op].bitfield.disp64 = 0;
- }
if (!op_disp && i.types[op].bitfield.baseindex)
{
i.types[op].bitfield.disp8 = 0;
@@ -5898,9 +5889,21 @@
i.types[op].bitfield.disp64 = 0;
i.op[op].disps = 0;
i.disp_operands--;
+ continue;
}
+
+ if (i.types[op].bitfield.disp16
+ && (op_disp & ~(offsetT) 0xffff) == 0)
+ {
+ /* If this operand is at most 16 bits, convert
+ to a signed 16 bit number and don't use 64bit
+ displacement. */
+ op_disp = ((op_disp ^ 0x8000) - 0x8000);
+ i.types[op].bitfield.disp64 = 0;
+ }
+
#ifdef BFD64
- else if (flag_code == CODE_64BIT)
+ if (flag_code == CODE_64BIT)
{
if (want_disp32 (current_templates->start)
&& fits_in_unsigned_long (op_disp))
@@ -5913,7 +5916,6 @@
/* If this operand is at most 32 bits, convert
to a signed 32 bit number and don't use 64bit
displacement. */
- op_disp &= (((offsetT) 2 << 31) - 1);
op_disp = (op_disp ^ ((offsetT) 1 << 31)) - ((addressT) 1 << 31);
i.types[op].bitfield.disp64 = 0;
}
