| /* Simulator instruction semantics for frvbf. |
| |
| THIS FILE IS MACHINE GENERATED WITH CGEN. |
| |
| Copyright (C) 1996-2024 Free Software Foundation, Inc. |
| |
| This file is part of the GNU simulators. |
| |
| This file is free software; you can redistribute it and/or modify |
| it under the terms of the GNU General Public License as published by |
| the Free Software Foundation; either version 3, or (at your option) |
| any later version. |
| |
| It is distributed in the hope that it will be useful, but WITHOUT |
| ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| License for more details. |
| |
| You should have received a copy of the GNU General Public License along |
| with this program; if not, write to the Free Software Foundation, Inc., |
| 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. |
| |
| */ |
| |
| #define WANT_CPU frvbf |
| #define WANT_CPU_FRVBF |
| |
| #include "sim-main.h" |
| #include "cgen-mem.h" |
| #include "cgen-ops.h" |
| |
| #undef GET_ATTR |
| #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) |
| |
| /* This is used so that we can compile two copies of the semantic code, |
| one with full feature support and one without that runs fast(er). |
| FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ |
| #if FAST_P |
| #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) |
| #undef CGEN_TRACE_RESULT |
| #define CGEN_TRACE_RESULT(cpu, abuf, name, type, val) |
| #else |
| #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) |
| #endif |
| |
| /* x-invalid: --invalid-- */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_empty.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| |
| { |
| /* Update the recorded pc in the cpu state struct. |
| Only necessary for WITH_SCACHE case, but to avoid the |
| conditional compilation .... */ |
| SET_H_PC (pc); |
| /* Virtual insns have zero size. Overwrite vpc with address of next insn |
| using the default-insn-bitsize spec. When executing insns in parallel |
| we may want to queue the fault and continue execution. */ |
| vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* x-after: --after-- */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_empty.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| |
| { |
| #if WITH_SCACHE_PBB_FRVBF |
| frvbf_pbb_after (current_cpu, sem_arg); |
| #endif |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* x-before: --before-- */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_empty.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| |
| { |
| #if WITH_SCACHE_PBB_FRVBF |
| frvbf_pbb_before (current_cpu, sem_arg); |
| #endif |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* x-cti-chain: --cti-chain-- */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_empty.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| |
| { |
| #if WITH_SCACHE_PBB_FRVBF |
| #ifdef DEFINE_SWITCH |
| vpc = frvbf_pbb_cti_chain (current_cpu, sem_arg, |
| pbb_br_type, pbb_br_npc); |
| BREAK (sem); |
| #else |
| /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ |
| vpc = frvbf_pbb_cti_chain (current_cpu, sem_arg, |
| CPU_PBB_BR_TYPE (current_cpu), |
| CPU_PBB_BR_NPC (current_cpu)); |
| #endif |
| #endif |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* x-chain: --chain-- */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_empty.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| |
| { |
| #if WITH_SCACHE_PBB_FRVBF |
| vpc = frvbf_pbb_chain (current_cpu, sem_arg); |
| #ifdef DEFINE_SWITCH |
| BREAK (sem); |
| #endif |
| #endif |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* x-begin: --begin-- */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_empty.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); |
| |
| { |
| #if WITH_SCACHE_PBB_FRVBF |
| #if defined DEFINE_SWITCH || defined FAST_P |
| /* In the switch case FAST_P is a constant, allowing several optimizations |
| in any called inline functions. */ |
| vpc = frvbf_pbb_begin (current_cpu, FAST_P); |
| #else |
| #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ |
| vpc = frvbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); |
| #else |
| vpc = frvbf_pbb_begin (current_cpu, 0); |
| #endif |
| #endif |
| #endif |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* add: add$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* sub: sub$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = SUBSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* and: and$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = ANDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* or: or$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = ORSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* xor: xor$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = XORSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* not: not$pack $GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_scutss.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = INVSI (GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* sdiv: sdiv$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,sdiv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| frvbf_signed_integer_divide (current_cpu, GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), FLD (f_GRk), 0); |
| ; /*clobber*/ |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* nsdiv: nsdiv$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,nsdiv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| frvbf_signed_integer_divide (current_cpu, GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), FLD (f_GRk), 1); |
| ; /*clobber*/ |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* udiv: udiv$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,udiv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| frvbf_unsigned_integer_divide (current_cpu, GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), FLD (f_GRk), 0); |
| ; /*clobber*/ |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* nudiv: nudiv$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,nudiv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| frvbf_unsigned_integer_divide (current_cpu, GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), FLD (f_GRk), 1); |
| ; /*clobber*/ |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* smul: smul$pack $GRi,$GRj,$GRdoublek */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,smul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_smulcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| DI opval = MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj)))); |
| sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* umul: umul$pack $GRi,$GRj,$GRdoublek */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,umul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_smulcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| DI opval = MULDI (ZEXTSIDI (GET_H_GR (FLD (f_GRi))), ZEXTSIDI (GET_H_GR (FLD (f_GRj)))); |
| sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* smu: smu$pack $GRi,$GRj */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,smu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_smass.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| DI opval = MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj)))); |
| sim_queue_fn_di_write (current_cpu, frvbf_h_iacc0_set, ((UINT) 0), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iacc0", 'D', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* smass: smass$pack $GRi,$GRj */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,smass) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_smass.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| DI opval = (ANDIF (ANDIF (GTDI (MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj)))), 0), GTDI (GET_H_IACC0 (((UINT) 0)), 0)), LTDI (SUBDI (MAKEDI (2147483647, 0xffffffff), MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj))))), GET_H_IACC0 (((UINT) 0))))) ? (MAKEDI (2147483647, 0xffffffff)) : (ANDIF (ANDIF (LTDI (MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj)))), 0), LTDI (GET_H_IACC0 (((UINT) 0)), 0)), GTDI (SUBDI (MAKEDI (0x80000000, 0), MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj))))), GET_H_IACC0 (((UINT) 0))))) ? (MAKEDI (0x80000000, 0)) : (ADDDI (GET_H_IACC0 (((UINT) 0)), MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj)))))); |
| sim_queue_fn_di_write (current_cpu, frvbf_h_iacc0_set, ((UINT) 0), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iacc0", 'D', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* smsss: smsss$pack $GRi,$GRj */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,smsss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_smass.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| DI opval = (ANDIF (ANDIF (LTDI (MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj)))), 0), GTDI (GET_H_IACC0 (((UINT) 0)), 0)), LTDI (ADDDI (MAKEDI (2147483647, 0xffffffff), MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj))))), GET_H_IACC0 (((UINT) 0))))) ? (MAKEDI (2147483647, 0xffffffff)) : (ANDIF (ANDIF (GTDI (MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj)))), 0), LTDI (GET_H_IACC0 (((UINT) 0)), 0)), GTDI (ADDDI (MAKEDI (0x80000000, 0), MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj))))), GET_H_IACC0 (((UINT) 0))))) ? (MAKEDI (0x80000000, 0)) : (SUBDI (GET_H_IACC0 (((UINT) 0)), MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj)))))); |
| sim_queue_fn_di_write (current_cpu, frvbf_h_iacc0_set, ((UINT) 0), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iacc0", 'D', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* sll: sll$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = SLLSI (GET_H_GR (FLD (f_GRi)), ANDSI (GET_H_GR (FLD (f_GRj)), 31)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* srl: srl$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = SRLSI (GET_H_GR (FLD (f_GRi)), ANDSI (GET_H_GR (FLD (f_GRj)), 31)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* sra: sra$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = SRASI (GET_H_GR (FLD (f_GRi)), ANDSI (GET_H_GR (FLD (f_GRj)), 31)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* slass: slass$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,slass) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = frvbf_shift_left_arith_saturate (current_cpu, GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* scutss: scutss$pack $GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,scutss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_scutss.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = frvbf_iacc_cut (current_cpu, GET_H_IACC0 (((UINT) 0)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* scan: scan$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,scan) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_tmp1; |
| SI tmp_tmp2; |
| tmp_tmp1 = GET_H_GR (FLD (f_GRi)); |
| tmp_tmp2 = SRASI (GET_H_GR (FLD (f_GRj)), 1); |
| { |
| SI opval = frvbf_scan_result (current_cpu, XORSI (tmp_tmp1, tmp_tmp2)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* cadd: cadd$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,cadd) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI opval = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* csub: csub$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,csub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI opval = SUBSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* cand: cand$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,cand) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI opval = ANDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* cor: cor$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,cor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI opval = ORSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* cxor: cxor$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,cxor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI opval = XORSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* cnot: cnot$pack $GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,cnot) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI opval = INVSI (GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 3); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* csmul: csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,csmul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_clddu.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| DI opval = MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj)))); |
| sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval); |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* csdiv: csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,csdiv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| frvbf_signed_integer_divide (current_cpu, GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), FLD (f_GRk), 0); |
| ; /*clobber*/ |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* cudiv: cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,cudiv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| frvbf_unsigned_integer_divide (current_cpu, GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), FLD (f_GRk), 0); |
| ; /*clobber*/ |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* csll: csll$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,csll) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI opval = SLLSI (GET_H_GR (FLD (f_GRi)), ANDSI (GET_H_GR (FLD (f_GRj)), 31)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* csrl: csrl$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,csrl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI opval = SRLSI (GET_H_GR (FLD (f_GRi)), ANDSI (GET_H_GR (FLD (f_GRj)), 31)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* csra: csra$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,csra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI opval = SRASI (GET_H_GR (FLD (f_GRi)), ANDSI (GET_H_GR (FLD (f_GRj)), 31)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* cscan: cscan$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,cscan) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_cswap.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI tmp_tmp1; |
| SI tmp_tmp2; |
| tmp_tmp1 = GET_H_GR (FLD (f_GRi)); |
| tmp_tmp2 = SRASI (GET_H_GR (FLD (f_GRj)), 1); |
| { |
| SI opval = frvbf_scan_result (current_cpu, XORSI (tmp_tmp1, tmp_tmp2)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* addcc: addcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,addcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| BI tmp_tmp; |
| QI tmp_cc; |
| SI tmp_result; |
| tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]); |
| tmp_tmp = ADDOFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 13); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 2); |
| } |
| tmp_tmp = ADDCFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 14); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 1); |
| } |
| tmp_result = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| if (EQSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| SI opval = tmp_result; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* subcc: subcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,subcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| BI tmp_tmp; |
| QI tmp_cc; |
| SI tmp_result; |
| tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]); |
| tmp_tmp = SUBOFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 13); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 2); |
| } |
| tmp_tmp = SUBCFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 14); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 1); |
| } |
| tmp_result = SUBSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| if (EQSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| SI opval = tmp_result; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* andcc: andcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,andcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_tmp; |
| tmp_tmp = ANDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 7), 4); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 11), 8); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| { |
| UQI opval = ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 3); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* orcc: orcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,orcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_tmp; |
| tmp_tmp = ORSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 7), 4); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 11), 8); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| { |
| UQI opval = ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 3); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* xorcc: xorcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,xorcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_tmp; |
| tmp_tmp = XORSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 7), 4); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 11), 8); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| { |
| UQI opval = ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 3); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* sllcc: sllcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,sllcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_shift; |
| SI tmp_tmp; |
| QI tmp_cc; |
| tmp_shift = ANDSI (GET_H_GR (FLD (f_GRj)), 31); |
| tmp_cc = frvbf_set_icc_for_shift_left (current_cpu, GET_H_GR (FLD (f_GRi)), tmp_shift, CPU (h_iccr[FLD (f_ICCi_1)])); |
| tmp_tmp = SLLSI (GET_H_GR (FLD (f_GRi)), tmp_shift); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* srlcc: srlcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,srlcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_shift; |
| SI tmp_tmp; |
| QI tmp_cc; |
| tmp_shift = ANDSI (GET_H_GR (FLD (f_GRj)), 31); |
| tmp_cc = frvbf_set_icc_for_shift_right (current_cpu, GET_H_GR (FLD (f_GRi)), tmp_shift, CPU (h_iccr[FLD (f_ICCi_1)])); |
| tmp_tmp = SRLSI (GET_H_GR (FLD (f_GRi)), tmp_shift); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* sracc: sracc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,sracc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_shift; |
| SI tmp_tmp; |
| QI tmp_cc; |
| tmp_shift = ANDSI (GET_H_GR (FLD (f_GRj)), 31); |
| tmp_cc = frvbf_set_icc_for_shift_right (current_cpu, GET_H_GR (FLD (f_GRi)), tmp_shift, CPU (h_iccr[FLD (f_ICCi_1)])); |
| tmp_tmp = SRASI (GET_H_GR (FLD (f_GRi)), tmp_shift); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* smulcc: smulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,smulcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_smulcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| DI tmp_tmp; |
| QI tmp_cc; |
| tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]); |
| tmp_tmp = MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj)))); |
| if (EQDI (SRLDI (tmp_tmp, 63), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 7); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 8); |
| } |
| if (EQBI (EQDI (tmp_tmp, 0), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 11); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 4); |
| } |
| { |
| DI opval = tmp_tmp; |
| sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* umulcc: umulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,umulcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_smulcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| DI tmp_tmp; |
| QI tmp_cc; |
| tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]); |
| tmp_tmp = MULDI (ZEXTSIDI (GET_H_GR (FLD (f_GRi))), ZEXTSIDI (GET_H_GR (FLD (f_GRj)))); |
| if (EQDI (SRLDI (tmp_tmp, 63), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 7); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 8); |
| } |
| if (EQBI (EQDI (tmp_tmp, 0), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 11); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 4); |
| } |
| { |
| DI opval = tmp_tmp; |
| sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* caddcc: caddcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,caddcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_caddcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| BI tmp_tmp; |
| QI tmp_cc; |
| SI tmp_result; |
| tmp_cc = CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]); |
| tmp_tmp = ADDOFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 13); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 2); |
| } |
| tmp_tmp = ADDCFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 14); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 1); |
| } |
| tmp_result = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| if (EQSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| SI opval = tmp_result; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 6); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* csubcc: csubcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,csubcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_caddcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| BI tmp_tmp; |
| QI tmp_cc; |
| SI tmp_result; |
| tmp_cc = CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]); |
| tmp_tmp = SUBOFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 13); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 2); |
| } |
| tmp_tmp = SUBCFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 14); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 1); |
| } |
| tmp_result = SUBSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| if (EQSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| SI opval = tmp_result; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 6); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* csmulcc: csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,csmulcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_csmulcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| DI tmp_tmp; |
| QI tmp_cc; |
| tmp_cc = CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]); |
| tmp_tmp = MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj)))); |
| if (EQDI (SRLDI (tmp_tmp, 63), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 7); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 8); |
| } |
| if (EQBI (EQDI (tmp_tmp, 0), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 11); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 4); |
| } |
| { |
| DI opval = tmp_tmp; |
| sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval); |
| written |= (1 << 6); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* candcc: candcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,candcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_caddcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI tmp_tmp; |
| tmp_tmp = ANDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 6); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), 7), 4); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), 11), 8); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| { |
| UQI opval = ANDQI (CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), 3); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* corcc: corcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,corcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_caddcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI tmp_tmp; |
| tmp_tmp = ORSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 6); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), 7), 4); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), 11), 8); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| { |
| UQI opval = ANDQI (CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), 3); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* cxorcc: cxorcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,cxorcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_caddcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI tmp_tmp; |
| tmp_tmp = XORSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 6); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), 7), 4); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), 11), 8); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| { |
| UQI opval = ANDQI (CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), 3); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* csllcc: csllcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,csllcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_caddcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI tmp_shift; |
| SI tmp_tmp; |
| QI tmp_cc; |
| tmp_shift = ANDSI (GET_H_GR (FLD (f_GRj)), 31); |
| tmp_cc = frvbf_set_icc_for_shift_left (current_cpu, GET_H_GR (FLD (f_GRi)), tmp_shift, CPU (h_iccr[ANDSI (FLD (f_CCi), 3)])); |
| tmp_tmp = SLLSI (GET_H_GR (FLD (f_GRi)), tmp_shift); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 6); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* csrlcc: csrlcc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,csrlcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_caddcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI tmp_shift; |
| SI tmp_tmp; |
| QI tmp_cc; |
| tmp_shift = ANDSI (GET_H_GR (FLD (f_GRj)), 31); |
| tmp_cc = frvbf_set_icc_for_shift_right (current_cpu, GET_H_GR (FLD (f_GRi)), tmp_shift, CPU (h_iccr[ANDSI (FLD (f_CCi), 3)])); |
| tmp_tmp = SRLSI (GET_H_GR (FLD (f_GRi)), tmp_shift); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 6); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* csracc: csracc$pack $GRi,$GRj,$GRk,$CCi,$cond */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,csracc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_caddcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| if (EQQI (CPU (h_cccr[FLD (f_CCi)]), ORSI (FLD (f_cond), 2))) { |
| { |
| SI tmp_shift; |
| SI tmp_tmp; |
| QI tmp_cc; |
| tmp_shift = ANDSI (GET_H_GR (FLD (f_GRj)), 31); |
| tmp_cc = frvbf_set_icc_for_shift_right (current_cpu, GET_H_GR (FLD (f_GRi)), tmp_shift, CPU (h_iccr[ANDSI (FLD (f_CCi), 3)])); |
| tmp_tmp = SRASI (GET_H_GR (FLD (f_GRi)), tmp_shift); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| written |= (1 << 6); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[ANDSI (FLD (f_CCi), 3)]), opval); |
| written |= (1 << 7); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* addx: addx$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = ADDCSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), TRUNCQIBI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 1))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* subx: subx$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = SUBCSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), TRUNCQIBI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 1))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* addxcc: addxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,addxcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_tmp; |
| QI tmp_cc; |
| tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]); |
| tmp_tmp = ADDCSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), TRUNCQIBI (ANDQI (tmp_cc, 1))); |
| if (EQBI (ADDOFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), TRUNCQIBI (ANDQI (tmp_cc, 1))), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 13); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 2); |
| } |
| if (EQBI (ADDCFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), TRUNCQIBI (ANDQI (tmp_cc, 1))), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 14); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 1); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* subxcc: subxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,subxcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_tmp; |
| QI tmp_cc; |
| tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]); |
| tmp_tmp = SUBCSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), TRUNCQIBI (ANDQI (tmp_cc, 1))); |
| if (EQBI (SUBOFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), TRUNCQIBI (ANDQI (tmp_cc, 1))), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 13); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 2); |
| } |
| if (EQBI (SUBCFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), TRUNCQIBI (ANDQI (tmp_cc, 1))), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 14); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 1); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* addss: addss$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,addss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| { |
| SI opval = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (ADDOFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0)) { |
| { |
| SI opval = (GTSI (GET_H_GR (FLD (f_GRi)), 0)) ? (2147483647) : (LTSI (GET_H_GR (FLD (f_GRi)), 0)) ? (0x80000000) : (0); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* subss: subss$pack $GRi,$GRj,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,subss) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addcc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| { |
| SI opval = SUBSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj))); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (SUBOFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0)) { |
| { |
| SI opval = (GTSI (GET_H_GR (FLD (f_GRi)), 0)) ? (2147483647) : (LTSI (GET_H_GR (FLD (f_GRi)), 0)) ? (0x80000000) : (0); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* addi: addi$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = ADDSI (GET_H_GR (FLD (f_GRi)), FLD (f_d12)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* subi: subi$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,subi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = SUBSI (GET_H_GR (FLD (f_GRi)), FLD (f_d12)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* andi: andi$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,andi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = ANDSI (GET_H_GR (FLD (f_GRi)), FLD (f_d12)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* ori: ori$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,ori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = ORSI (GET_H_GR (FLD (f_GRi)), FLD (f_d12)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* xori: xori$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,xori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = XORSI (GET_H_GR (FLD (f_GRi)), FLD (f_d12)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* sdivi: sdivi$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,sdivi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| frvbf_signed_integer_divide (current_cpu, GET_H_GR (FLD (f_GRi)), FLD (f_d12), FLD (f_GRk), 0); |
| ; /*clobber*/ |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* nsdivi: nsdivi$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,nsdivi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| frvbf_signed_integer_divide (current_cpu, GET_H_GR (FLD (f_GRi)), FLD (f_d12), FLD (f_GRk), 1); |
| ; /*clobber*/ |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* udivi: udivi$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,udivi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| frvbf_unsigned_integer_divide (current_cpu, GET_H_GR (FLD (f_GRi)), FLD (f_d12), FLD (f_GRk), 0); |
| ; /*clobber*/ |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* nudivi: nudivi$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,nudivi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| frvbf_unsigned_integer_divide (current_cpu, GET_H_GR (FLD (f_GRi)), FLD (f_d12), FLD (f_GRk), 1); |
| ; /*clobber*/ |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* smuli: smuli$pack $GRi,$s12,$GRdoublek */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,smuli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_smuli.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| DI opval = MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (FLD (f_d12))); |
| sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* umuli: umuli$pack $GRi,$s12,$GRdoublek */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,umuli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_smuli.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| DI opval = MULDI (ZEXTSIDI (GET_H_GR (FLD (f_GRi))), ZEXTSIDI (FLD (f_d12))); |
| sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* slli: slli$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = SLLSI (GET_H_GR (FLD (f_GRi)), ANDSI (FLD (f_d12), 31)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* srli: srli$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = SRLSI (GET_H_GR (FLD (f_GRi)), ANDSI (FLD (f_d12), 31)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* srai: srai$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI opval = SRASI (GET_H_GR (FLD (f_GRi)), ANDSI (FLD (f_d12), 31)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* scani: scani$pack $GRi,$s12,$GRk */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,scani) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_swapi.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_tmp1; |
| SI tmp_tmp2; |
| tmp_tmp1 = GET_H_GR (FLD (f_GRi)); |
| tmp_tmp2 = SRASI (FLD (f_d12), 1); |
| { |
| SI opval = frvbf_scan_result (current_cpu, XORSI (tmp_tmp1, tmp_tmp2)); |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* addicc: addicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,addicc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addicc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| BI tmp_tmp; |
| QI tmp_cc; |
| SI tmp_result; |
| tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]); |
| tmp_tmp = ADDOFSI (GET_H_GR (FLD (f_GRi)), FLD (f_s10), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 13); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 2); |
| } |
| tmp_tmp = ADDCFSI (GET_H_GR (FLD (f_GRi)), FLD (f_s10), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 14); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 1); |
| } |
| tmp_result = ADDSI (GET_H_GR (FLD (f_GRi)), FLD (f_s10)); |
| if (EQSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| SI opval = tmp_result; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* subicc: subicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,subicc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addicc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| BI tmp_tmp; |
| QI tmp_cc; |
| SI tmp_result; |
| tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]); |
| tmp_tmp = SUBOFSI (GET_H_GR (FLD (f_GRi)), FLD (f_s10), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 13); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 2); |
| } |
| tmp_tmp = SUBCFSI (GET_H_GR (FLD (f_GRi)), FLD (f_s10), 0); |
| if (EQBI (tmp_tmp, 0)) { |
| tmp_cc = ANDQI (tmp_cc, 14); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 1); |
| } |
| tmp_result = SUBSI (GET_H_GR (FLD (f_GRi)), FLD (f_s10)); |
| if (EQSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_result, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| SI opval = tmp_result; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* andicc: andicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,andicc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addicc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_tmp; |
| tmp_tmp = ANDSI (GET_H_GR (FLD (f_GRi)), FLD (f_s10)); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 7), 4); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 11), 8); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| { |
| UQI opval = ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 3); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* oricc: oricc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,oricc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addicc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_tmp; |
| tmp_tmp = ORSI (GET_H_GR (FLD (f_GRi)), FLD (f_s10)); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 7), 4); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 11), 8); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| { |
| UQI opval = ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 3); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* xoricc: xoricc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,xoricc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addicc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_tmp; |
| tmp_tmp = XORSI (GET_H_GR (FLD (f_GRi)), FLD (f_s10)); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 7), 4); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| { |
| UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 11), 8); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } else { |
| { |
| UQI opval = ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 3); |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| written |= (1 << 4); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| } |
| } |
| |
| abuf->written = written; |
| return vpc; |
| #undef FLD |
| } |
| |
| /* smulicc: smulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,smulicc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_smulicc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| DI tmp_tmp; |
| QI tmp_cc; |
| tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]); |
| tmp_tmp = MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (FLD (f_s10))); |
| if (EQDI (SRLDI (tmp_tmp, 63), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 7); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 8); |
| } |
| if (EQBI (EQDI (tmp_tmp, 0), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 11); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 4); |
| } |
| { |
| DI opval = tmp_tmp; |
| sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* umulicc: umulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,umulicc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_smulicc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| DI tmp_tmp; |
| QI tmp_cc; |
| tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]); |
| tmp_tmp = MULDI (ZEXTSIDI (GET_H_GR (FLD (f_GRi))), ZEXTSIDI (FLD (f_s10))); |
| if (EQDI (SRLDI (tmp_tmp, 63), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 7); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 8); |
| } |
| if (EQBI (EQDI (tmp_tmp, 0), 0)) { |
| tmp_cc = ANDQI (tmp_cc, 11); |
| } else { |
| tmp_cc = ORQI (tmp_cc, 4); |
| } |
| { |
| DI opval = tmp_tmp; |
| sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval); |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
| } |
| |
| /* sllicc: sllicc$pack $GRi,$s10,$GRk,$ICCi_1 */ |
| |
| static SEM_PC |
| SEM_FN_NAME (frvbf,sllicc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) |
| { |
| #define FLD(f) abuf->fields.sfmt_addicc.f |
| ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
| int UNUSED written = 0; |
| IADDR UNUSED pc = abuf->addr; |
| SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); |
| |
| { |
| SI tmp_shift; |
| SI tmp_tmp; |
| QI tmp_cc; |
| tmp_shift = ANDSI (FLD (f_s10), 31); |
| tmp_cc = frvbf_set_icc_for_shift_left (current_cpu, GET_H_GR (FLD (f_GRi)), tmp_shift, CPU (h_iccr[FLD (f_ICCi_1)])); |
| tmp_tmp = SLLSI (GET_H_GR (FLD (f_GRi)), tmp_shift); |
| { |
| SI opval = tmp_tmp; |
| sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
| } |
| if (EQSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4); |
| } else { |
| if (LTSI (tmp_tmp, 0)) { |
| tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8); |
| } else { |
| tmp_cc = ANDQI (tmp_cc, 3); |
| } |
| } |
| { |
| UQI opval = tmp_cc; |
| sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval); |
| CGEN_TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval); |
| } |
| } |
| |
| return vpc; |
| #undef FLD |
|