sim/testsuite/bfin/c_comp3op_pr_plus_pr_sh2.s

//Original:/proj/frio/dv/testcases/core/c_comp3op_pr_plus_pr_sh2/c_comp3op_pr_plus_pr_sh2.dsp
// Spec Reference:  comp3op   pregs + pregs << 2
# mach: bfin

.include "testutils.inc"
	start

	imm32 p1, 0x89ab1def;
	imm32 p2, 0x56781abc;
	imm32 p3, 0xdef01234;
	imm32 p4, 0x23451899;
	imm32 p5, 0x78911345;
	imm32 sp, 0x98761432;
	imm32 fp, 0x12341678;
	P1 = P1 + ( P1 << 2 );
	P2 = P1 + ( P2 << 2 );
	P3 = P1 + ( P3 << 2 );
	P4 = P1 + ( P4 << 2 );
	P5 = P1 + ( P5 << 2 );
	SP = P1 + ( SP << 2 );
	FP = P1 + FP;
	CHECKREG p1, 0xB05795AB;
	CHECKREG p2, 0x0A38009B;
	CHECKREG p3, 0x2C17DE7B;
	CHECKREG p4, 0x3D6BF80F;
	CHECKREG p5, 0x929BE2BF;
	CHECKREG sp, 0x122FE673;
	CHECKREG fp, 0xC28BAC23;

	imm32 p1, 0x89abcd2f;
	imm32 p2, 0x56789a2c;
	imm32 p3, 0xdef01224;
	imm32 p4, 0x23456829;
	imm32 p5, 0x78912325;
	imm32 sp, 0x98765422;
	imm32 fp, 0x12345628;
	P1 = P2 + ( P1 << 2 );
	P2 = P2 + ( P2 << 2 );
	P3 = P2 + ( P3 << 2 );
	P4 = P2 + ( P4 << 2 );
	P5 = P2 + ( P5 << 2 );
	SP = P2 + ( SP << 2 );
	FP = P2 + ( FP << 2 );
	CHECKREG p1, 0x7D27CEE8;
	CHECKREG p2, 0xB05B02DC;
	CHECKREG p3, 0x2C1B4B6C;
	CHECKREG p4, 0x3D70A380;
	CHECKREG p5, 0x929F8F70;
	CHECKREG sp, 0x12345364;
	CHECKREG fp, 0xF92C5B7C;

	imm32 p1, 0x89abcde3;
	imm32 p2, 0x56789ab3;
	imm32 p3, 0xdef01233;
	imm32 p4, 0x23456893;
	imm32 p5, 0x78912343;
	imm32 sp, 0x98765433;
	imm32 fp, 0x12345673;
	P1 = P3 + ( P1 << 2 );
	P2 = P3 + ( P2 << 2 );
	P3 = P3 + ( P3 << 2 );
	P4 = P3 + ( P4 << 2 );
	P5 = P3 + ( P5 << 2 );
	SP = P3 + ( SP << 2 );
	FP = P3 + ( FP << 2 );
	CHECKREG p1, 0x059F49BF;
	CHECKREG p2, 0x38D27CFF;
	CHECKREG p3, 0x5AB05AFF;
	CHECKREG p4, 0xE7C5FD4B;
	CHECKREG p5, 0x3CF4E80B;
	CHECKREG sp, 0xBC89ABCB;
	CHECKREG fp, 0xA381B4CB;

	imm32 p1, 0x49abcdef;
	imm32 p2, 0x46789abc;
	imm32 p3, 0x4ef01234;
	imm32 p4, 0x43456899;
	imm32 p5, 0x48912345;
	imm32 sp, 0x48765432;
	imm32 fp, 0x42345678;
	P1 = P4 + ( P1 << 2 );
	P2 = P4 + ( P2 << 2 );
	P3 = P4 + ( P3 << 2 );
	P4 = P4 + ( P4 << 2 );
	P5 = P4 + ( P5 << 2 );
	SP = P4 + ( SP << 2 );
	FP = P4 + ( FP << 2 );
	CHECKREG p1, 0x69F4A055;
	CHECKREG p2, 0x5D27D389;
	CHECKREG p3, 0x7F05B169;
	CHECKREG p4, 0x505B0AFD;
	CHECKREG p5, 0x729F9811;
	CHECKREG sp, 0x72345BC5;
	CHECKREG fp, 0x592C64DD;

	imm32 p1, 0x85abcdef;
	imm32 p2, 0x55789abc;
	imm32 p3, 0xd5f01234;
	imm32 p4, 0x25456899;
	imm32 p5, 0x75912345;
	imm32 sp, 0x95765432;
	imm32 fp, 0x15345678;
	P1 = P5 + ( P1 << 2 );
	P2 = P5 + ( P2 << 2 );
	P3 = P5 + ( P3 << 2 );
	P4 = P5 + ( P4 << 2 );
	P5 = P5 + ( P5 << 2 );
	SP = P5 + ( SP << 2 );
	FP = P5 + ( FP << 2 );
	CHECKREG p1, 0x8C405B01;
	CHECKREG p2, 0xCB738E35;
	CHECKREG p3, 0xCD516C15;
	CHECKREG p4, 0x0AA6C5A9;
	CHECKREG p5, 0x4BD5B059;
	CHECKREG sp, 0xA1AF0121;
	CHECKREG fp, 0xA0A70A39;

	imm32 p1, 0x89a6cdef;
	imm32 p2, 0x56769abc;
	imm32 p3, 0xdef61234;
	imm32 p4, 0x23466899;
	imm32 p5, 0x78962345;
	imm32 sp, 0x98765432;
	imm32 fp, 0x12365678;
	P1 = SP + ( P1 << 2 );
	P2 = SP + ( P2 << 2 );
	P3 = SP + ( P3 << 2 );
	P4 = SP + ( P4 << 2 );
	P5 = SP + ( P5 << 2 );
	SP = SP + ( SP << 2 );
	FP = SP + ( FP << 2 );
	CHECKREG p1, 0xBF118BEE;
	CHECKREG p2, 0xF250BF22;
	CHECKREG p3, 0x144E9D02;
	CHECKREG p4, 0x258FF696;
	CHECKREG p5, 0x7ACEE146;
	CHECKREG sp, 0xFA4FA4FA;
	CHECKREG fp, 0x4328FEDA;

	imm32 p1, 0x89ab7def;
	imm32 p2, 0x56787abc;
	imm32 p3, 0xdef07234;
	imm32 p4, 0x23457899;
	imm32 p5, 0x78917345;
	imm32 sp, 0x98767432;
	imm32 fp, 0x12345678;
	P1 = FP + ( P1 << 2 );
	P2 = FP + ( P2 << 2 );
	P3 = FP + ( P3 << 2 );
	P4 = FP + ( P4 << 2 );
	P5 = FP + ( P5 << 2 );
	SP = FP + ( SP << 2 );
	FP = FP + ( FP << 2 );
	CHECKREG p1, 0x38E24E34;
	CHECKREG p2, 0x6C164168;
	CHECKREG p3, 0x8DF61F48;
	CHECKREG p4, 0x9F4A38DC;
	CHECKREG p5, 0xF47A238C;
	CHECKREG sp, 0x740E2740;
	CHECKREG fp, 0x5B05B058;

	imm32 p1, 0x29ab1def;
	imm32 p2, 0x52781abc;
	imm32 p3, 0xde201234;
	imm32 p4, 0x23421899;
	imm32 p5, 0x78912345;
	imm32 sp, 0x98761232;
	imm32 fp, 0x12341628;
	P1 = P3 + ( P1 << 2 );
	P2 = P4 + ( P1 << 2 );
	P3 = P5 + ( P1 << 2 );
	P4 = SP + ( P1 << 2 );
	P5 = FP + ( P1 << 2 );
	FP = P1 + ( P1 << 2 );
	CHECKREG p1, 0x84CC89F0;
	CHECKREG p2, 0x36744059;
	CHECKREG p3, 0x8BC34B05;
	CHECKREG p4, 0xABA839F2;
	CHECKREG p5, 0x25663DE8;
	CHECKREG fp, 0x97FEB1B0;

	imm32 p1, 0x893bcd2f;
	imm32 p2, 0x56739a2c;
	imm32 p3, 0x3ef03224;
	imm32 p4, 0x23456329;
	imm32 p5, 0x78312335;
	imm32 sp, 0x98735423;
	imm32 fp, 0x12343628;
	P1 = P4 + ( P2 << 2 );
	P2 = P5 + ( P2 << 2 );
	P3 = SP + ( P2 << 2 );
	P4 = FP + ( P2 << 2 );
	SP = P1 + ( P2 << 2 );
	FP = P2 + ( P2 << 2 );
	CHECKREG p1, 0x7D13CBD9;
	CHECKREG p2, 0xD1FF8BE5;
	CHECKREG p3, 0xE07183B7;
	CHECKREG p4, 0x5A3265BC;
	CHECKREG sp, 0xC511FB6D;
	CHECKREG fp, 0x19FDBB79;

	imm32 p1, 0x894bcde3;
	imm32 p2, 0x56749ab3;
	imm32 p3, 0x4ef04233;
	imm32 p4, 0x24456493;
	imm32 p5, 0x78412344;
	imm32 sp, 0x98745434;
	imm32 fp, 0x12344673;
	P1 = P5 + ( P3 << 2 );
	P2 = SP + ( P3 << 2 );
	P3 = FP + ( P3 << 2 );
	P5 = P1 + ( P3 << 2 );
	SP = P2 + ( P3 << 2 );
	FP = P3 + ( P3 << 2 );
	CHECKREG p1, 0xB4022C10;
	CHECKREG p2, 0xD4355D00;
	CHECKREG p3, 0x4DF54F3F;
	CHECKREG p5, 0xEBD7690C;
	CHECKREG sp, 0x0C0A99FC;
	CHECKREG fp, 0x85CA8C3B;

	imm32 p1, 0x49abc5ef;
	imm32 p2, 0x46789a5c;
	imm32 p3, 0x4ef01235;
	imm32 p4, 0x53456899;
	imm32 p5, 0x45912345;
	imm32 sp, 0x48565432;
	imm32 fp, 0x42355678;
	P1 = SP + ( P4 << 2 );
	P2 = FP + ( P4 << 2 );
	P4 = P1 + ( P4 << 2 );
	P5 = P2 + ( P4 << 2 );
	SP = P3 + ( P4 << 2 );
	FP = P4 + ( P4 << 2 );
	CHECKREG p1, 0x956BF696;
	CHECKREG p2, 0x8F4AF8DC;
	CHECKREG p4, 0xE28198FA;
	CHECKREG p5, 0x19515CC4;
	CHECKREG sp, 0xD8F6761D;
	CHECKREG fp, 0x6C87FCE2;

	imm32 p1, 0x85ab6def;
	imm32 p2, 0x657896bc;
	imm32 p3, 0xd6f01264;
	imm32 p4, 0x25656896;
	imm32 p5, 0x75962345;
	imm32 sp, 0x95766432;
	imm32 fp, 0x15345678;
	P1 = FP + ( P5 << 2 );
	P3 = P1 + ( P5 << 2 );
	P4 = P2 + ( P5 << 2 );
	P5 = P3 + ( P5 << 2 );
	SP = P4 + ( P5 << 2 );
	FP = P5 + ( P5 << 2 );
	CHECKREG p1, 0xEB8CE38C;
	CHECKREG p3, 0xC1E570A0;
	CHECKREG p4, 0x3BD123D0;
	CHECKREG p5, 0x983DFDB4;
	CHECKREG sp, 0x9CC91AA0;
	CHECKREG fp, 0xF935F484;

	imm32 p1, 0x89a7cdef;
	imm32 p2, 0x56767abc;
	imm32 p3, 0xdef61734;
	imm32 p4, 0x73466879;
	imm32 p5, 0x77962347;
	imm32 sp, 0x98765432;
	imm32 fp, 0x12375678;
	P2 = P1 + ( SP << 2 );
	P3 = P2 + ( SP << 2 );
	P4 = P3 + ( SP << 2 );
	P5 = P4 + ( SP << 2 );
	SP = P5 + ( SP << 2 );
	FP = SP + ( SP << 2 );
	CHECKREG p2, 0xEB811EB7;
	CHECKREG p3, 0x4D5A6F7F;
	CHECKREG p4, 0xAF33C047;
	CHECKREG p5, 0x110D110F;
	CHECKREG sp, 0x72E661D7;
	CHECKREG fp, 0x3E7FE933;

	imm32 p1, 0x88ab78ef;
	imm32 p2, 0x56887a8c;
	imm32 p3, 0x8ef87238;
	imm32 p4, 0x28458899;
	imm32 p5, 0x78817845;
	imm32 sp, 0x98787482;
	imm32 fp, 0x12348678;
	P1 = P2 + ( FP << 2 );
	P2 = P3 + ( FP << 2 );
	P3 = P4 + ( FP << 2 );
	P4 = P5 + ( FP << 2 );
	P5 = SP + ( FP << 2 );
	SP = FP + ( FP << 2 );
	CHECKREG p1, 0x9F5A946C;
	CHECKREG p2, 0xD7CA8C18;
	CHECKREG p3, 0x7117A279;
	CHECKREG p4, 0xC1539225;
	CHECKREG p5, 0xE14A8E62;
	CHECKREG sp, 0x5B06A058;

	pass