| //Original:/testcases/core/c_dsp32alu_rmm/c_dsp32alu_rmm.dsp |
| // Spec Reference: dsp32alu dreg = -/- ( dreg, dreg) |
| # mach: bfin |
| |
| .include "testutils.inc" |
| start |
| |
| |
| |
| |
| // ALU operations include parallel addition, subtraction |
| // and 32-bit data. If an operation use a single ALU only, it uses ALU0. |
| |
| imm32 r0, 0x15678911; |
| imm32 r1, 0x2789ab1d; |
| imm32 r2, 0x34445515; |
| imm32 r3, 0x46667717; |
| imm32 r4, 0x5567891b; |
| imm32 r5, 0x6789ab1d; |
| imm32 r6, 0x74445515; |
| imm32 r7, 0x86667777; |
| R0 = R0 -|- R0; |
| R1 = R0 -|- R1; |
| R2 = R0 -|- R2; |
| R3 = R0 -|- R3; |
| R4 = R0 -|- R4; |
| R5 = R0 -|- R5; |
| R6 = R0 -|- R6; |
| R7 = R0 -|- R7; |
| CHECKREG r0, 0x00000000; |
| CHECKREG r1, 0xD87754E3; |
| CHECKREG r2, 0xCBBCAAEB; |
| CHECKREG r3, 0xB99A88E9; |
| CHECKREG r4, 0xAA9976E5; |
| CHECKREG r5, 0x987754E3; |
| CHECKREG r6, 0x8BBCAAEB; |
| CHECKREG r7, 0x799A8889; |
| |
| imm32 r0, 0x9567892b; |
| imm32 r1, 0xa789ab2d; |
| imm32 r2, 0xb4445525; |
| imm32 r3, 0xc6667727; |
| imm32 r4, 0xd8889929; |
| imm32 r5, 0xeaaabb2b; |
| imm32 r6, 0xfcccdd2d; |
| imm32 r7, 0x0eeeffff; |
| R0 = R1 -|- R0; |
| R1 = R1 -|- R1; |
| R2 = R1 -|- R2; |
| R3 = R1 -|- R3; |
| R4 = R1 -|- R4; |
| R5 = R1 -|- R5; |
| R6 = R1 -|- R6; |
| R7 = R1 -|- R7; |
| CHECKREG r0, 0x12222202; |
| CHECKREG r1, 0x00000000; |
| CHECKREG r2, 0x4BBCAADB; |
| CHECKREG r3, 0x399A88D9; |
| CHECKREG r4, 0x277866D7; |
| CHECKREG r5, 0x155644D5; |
| CHECKREG r6, 0x033422D3; |
| CHECKREG r7, 0xF1120001; |
| |
| imm32 r0, 0x416789ab; |
| imm32 r1, 0x6289abcd; |
| imm32 r2, 0x43445555; |
| imm32 r3, 0x64667777; |
| imm32 r4, 0x456789ab; |
| imm32 r5, 0x6689abcd; |
| imm32 r6, 0x47445555; |
| imm32 r7, 0x68667777; |
| R0 = R2 -|- R0; |
| R1 = R2 -|- R1; |
| R2 = R2 -|- R2; |
| R3 = R2 -|- R3; |
| R4 = R2 -|- R4; |
| R5 = R2 -|- R5; |
| R6 = R2 -|- R6; |
| R7 = R2 -|- R7; |
| CHECKREG r0, 0x01DDCBAA; |
| CHECKREG r1, 0xE0BBA988; |
| CHECKREG r2, 0x00000000; |
| CHECKREG r3, 0x9B9A8889; |
| CHECKREG r4, 0xBA997655; |
| CHECKREG r5, 0x99775433; |
| CHECKREG r6, 0xB8BCAAAB; |
| CHECKREG r7, 0x979A8889; |
| |
| imm32 r0, 0x9567892b; |
| imm32 r1, 0xa789ab2d; |
| imm32 r2, 0xb4445525; |
| imm32 r3, 0xc6667727; |
| imm32 r0, 0x9567892b; |
| imm32 r1, 0xa789ab2d; |
| imm32 r2, 0xb4445525; |
| imm32 r3, 0xc6667727; |
| R0 = R3 -|- R0; |
| R1 = R3 -|- R1; |
| R2 = R3 -|- R2; |
| R3 = R3 -|- R3; |
| R4 = R3 -|- R4; |
| R5 = R3 -|- R5; |
| R6 = R3 -|- R6; |
| R7 = R3 -|- R7; |
| CHECKREG r0, 0x30FFEDFC; |
| CHECKREG r1, 0x1EDDCBFA; |
| CHECKREG r2, 0x12222202; |
| CHECKREG r3, 0x00000000; |
| CHECKREG r4, 0x456789AB; |
| CHECKREG r5, 0x6689ABCD; |
| CHECKREG r6, 0x47445555; |
| CHECKREG r7, 0x68667777; |
| |
| imm32 r0, 0x4537891b; |
| imm32 r1, 0x6759ab2d; |
| imm32 r2, 0x44555535; |
| imm32 r3, 0x66665747; |
| imm32 r4, 0x88789565; |
| imm32 r5, 0xaa8abb5b; |
| imm32 r6, 0xcc9cdd85; |
| imm32 r7, 0xeeaeff9f; |
| R0 = R4 -|- R0; |
| R1 = R4 -|- R1; |
| R2 = R4 -|- R2; |
| R3 = R4 -|- R3; |
| R4 = R4 -|- R4; |
| R5 = R4 -|- R5; |
| R6 = R4 -|- R6; |
| R7 = R4 -|- R7; |
| CHECKREG r0, 0x43410C4A; |
| CHECKREG r1, 0x211FEA38; |
| CHECKREG r2, 0x44234030; |
| CHECKREG r3, 0x22123E1E; |
| CHECKREG r4, 0x00000000; |
| CHECKREG r5, 0x557644A5; |
| CHECKREG r6, 0x3364227B; |
| CHECKREG r7, 0x11520061; |
| |
| imm32 r0, 0x456b89ab; |
| imm32 r1, 0x69764bcd; |
| imm32 r2, 0x49736564; |
| imm32 r3, 0x61278394; |
| imm32 r4, 0x98876439; |
| imm32 r5, 0xaaaa0bbb; |
| imm32 r6, 0xcccc1ddd; |
| imm32 r7, 0x12346fff; |
| R0 = R5 -|- R0; |
| R1 = R5 -|- R1; |
| R2 = R5 -|- R2; |
| R3 = R5 -|- R3; |
| R4 = R5 -|- R4; |
| R5 = R5 -|- R5; |
| R6 = R5 -|- R6; |
| R7 = R5 -|- R7; |
| CHECKREG r0, 0x653F8210; |
| CHECKREG r1, 0x4134BFEE; |
| CHECKREG r2, 0x6137A657; |
| CHECKREG r3, 0x49838827; |
| CHECKREG r4, 0x1223A782; |
| CHECKREG r5, 0x00000000; |
| CHECKREG r6, 0x3334E223; |
| CHECKREG r7, 0xEDCC9001; |
| |
| imm32 r0, 0x456739ab; |
| imm32 r1, 0x67694bcd; |
| imm32 r2, 0x03456755; |
| imm32 r3, 0x66666777; |
| imm32 r4, 0x12345699; |
| imm32 r5, 0x45678b6b; |
| imm32 r6, 0x043290d6; |
| imm32 r7, 0x1234567f; |
| R0 = R6 -|- R0; |
| R1 = R6 -|- R1; |
| R2 = R6 -|- R2; |
| R3 = R6 -|- R3; |
| R4 = R6 -|- R4; |
| R5 = R6 -|- R5; |
| R6 = R6 -|- R6; |
| R7 = R6 -|- R7; |
| CHECKREG r0, 0xBECB572B; |
| CHECKREG r1, 0x9CC94509; |
| CHECKREG r2, 0x00ED2981; |
| CHECKREG r3, 0x9DCC295F; |
| CHECKREG r4, 0xF1FE3A3D; |
| CHECKREG r5, 0xBECB056B; |
| CHECKREG r6, 0x00000000; |
| CHECKREG r7, 0xEDCCA981; |
| |
| imm32 r0, 0x476789ab; |
| imm32 r1, 0x6779abcd; |
| imm32 r2, 0x23456755; |
| imm32 r3, 0x56789007; |
| imm32 r4, 0x789ab799; |
| imm32 r5, 0xaaaa0bbb; |
| imm32 r6, 0x89ab1d7d; |
| imm32 r7, 0xabcd2ff7; |
| R0 = R7 -|- R0; |
| R1 = R7 -|- R1; |
| R2 = R7 -|- R2; |
| R3 = R7 -|- R3; |
| R4 = R7 -|- R4; |
| R5 = R7 -|- R5; |
| R6 = R7 -|- R6; |
| R7 = R7 -|- R7; |
| CHECKREG r0, 0x6466A64C; |
| CHECKREG r1, 0x4454842A; |
| CHECKREG r2, 0x8888C8A2; |
| CHECKREG r3, 0x55559FF0; |
| CHECKREG r4, 0x3333785E; |
| CHECKREG r5, 0x0123243C; |
| CHECKREG r6, 0x2222127A; |
| CHECKREG r7, 0x00000000; |
| |
| imm32 r0, 0x456739ab; |
| imm32 r1, 0x67694bcd; |
| imm32 r2, 0x03456755; |
| imm32 r3, 0x66666777; |
| imm32 r4, 0x12345699; |
| imm32 r5, 0x45678b6b; |
| imm32 r6, 0x043290d6; |
| imm32 r7, 0x1234567f; |
| R4 = R4 -|- R7 (S); |
| R5 = R5 -|- R5 (CO); |
| R2 = R6 -|- R3 (SCO); |
| R6 = R0 -|- R4 (S); |
| R0 = R1 -|- R6 (S); |
| R2 = R2 -|- R1 (CO); |
| R1 = R3 -|- R0 (CO); |
| R7 = R7 -|- R4 (SCO); |
| CHECKREG r0, 0x2202123C; |
| CHECKREG r1, 0x553B4464; |
| CHECKREG r2, 0x51FF1897; |
| CHECKREG r3, 0x66666777; |
| CHECKREG r4, 0x0000001A; |
| CHECKREG r5, 0x00000000; |
| CHECKREG r6, 0x45673991; |
| CHECKREG r7, 0x56651234; |
| |
| imm32 r0, 0x476789ab; |
| imm32 r1, 0x6779abcd; |
| imm32 r2, 0x23456755; |
| imm32 r3, 0x56789007; |
| imm32 r4, 0x789ab799; |
| imm32 r5, 0xaaaa0bbb; |
| imm32 r6, 0x89ab1d7d; |
| imm32 r7, 0xabcd2ff7; |
| R3 = R4 -|- R0 (S); |
| R5 = R5 -|- R1 (SCO); |
| R2 = R2 -|- R2 (S); |
| R7 = R7 -|- R3 (CO); |
| R4 = R3 -|- R4 (CO); |
| R0 = R1 -|- R5 (S); |
| R1 = R0 -|- R6 (SCO); |
| R6 = R6 -|- R7 (SCO); |
| CHECKREG r0, 0x078B2BCD; |
| CHECKREG r1, 0x0E507DE0; |
| CHECKREG r2, 0x00000000; |
| CHECKREG r3, 0x31332DEE; |
| CHECKREG r4, 0x7655B899; |
| CHECKREG r5, 0x5FEE8000; |
| CHECKREG r6, 0xA2E387A2; |
| CHECKREG r7, 0x02097A9A; |
| |
| pass |