| //Original:/testcases/core/c_dsp32shift_fextx/c_dsp32shift_fextx.dsp |
| // Spec Reference: dsp32shift fext x |
| # mach: bfin |
| |
| .include "testutils.inc" |
| start |
| |
| imm32 r0, 0x00000001; |
| imm32 r1, 0x01000801; |
| imm32 r2, 0x08200802; |
| imm32 r3, 0x08030803; |
| imm32 r4, 0x08004804; |
| imm32 r5, 0x08000505; |
| imm32 r6, 0x08000866; |
| imm32 r7, 0x08000807; |
| R1 = EXTRACT( R1, R0.L ) (Z); |
| R2 = EXTRACT( R2, R0.L ) (Z); |
| R3 = EXTRACT( R3, R0.L ) (Z); |
| R4 = EXTRACT( R4, R0.L ) (X); |
| R5 = EXTRACT( R5, R0.L ) (Z); |
| R6 = EXTRACT( R6, R0.L ) (Z); |
| R7 = EXTRACT( R7, R0.L ) (X); |
| R0 = EXTRACT( R0, R0.L ) (Z); |
| CHECKREG r0, 0x00000001; |
| CHECKREG r1, 0x00000001; |
| CHECKREG r2, 0x00000000; |
| CHECKREG r3, 0x00000001; |
| CHECKREG r4, 0x00000000; |
| CHECKREG r5, 0x00000001; |
| CHECKREG r6, 0x00000000; |
| CHECKREG r7, 0xFFFFFFFF; |
| |
| imm32 r0, 0x0900d001; |
| imm32 r1, 0x09000002; |
| imm32 r2, 0x09000002; |
| imm32 r3, 0x09100003; |
| imm32 r4, 0x09020004; |
| imm32 r5, 0x09003005; |
| imm32 r6, 0x09000406; |
| imm32 r7, 0x09000057; |
| R0 = EXTRACT( R0, R1.L ) (Z); |
| R2 = EXTRACT( R2, R1.L ) (Z); |
| R3 = EXTRACT( R3, R1.L ) (Z); |
| R4 = EXTRACT( R4, R1.L ) (Z); |
| R5 = EXTRACT( R5, R1.L ) (X); |
| R6 = EXTRACT( R6, R1.L ) (Z); |
| R7 = EXTRACT( R7, R1.L ) (X); |
| R1 = EXTRACT( R1, R1.L ) (Z); |
| CHECKREG r0, 0x00000001; |
| CHECKREG r1, 0x00000002; |
| CHECKREG r2, 0x00000002; |
| CHECKREG r3, 0x00000003; |
| CHECKREG r4, 0x00000000; |
| CHECKREG r5, 0x00000001; |
| CHECKREG r6, 0x00000002; |
| CHECKREG r7, 0xFFFFFFFF; |
| |
| |
| imm32 r0, 0x0a00e001; |
| imm32 r1, 0x0a00e001; |
| imm32 r2, 0x0a00000f; |
| imm32 r3, 0x0a000010; |
| imm32 r4, 0x0a00e004; |
| imm32 r5, 0x0a00e005; |
| imm32 r6, 0x0a00e006; |
| imm32 r7, 0x0a00e007; |
| R0 = EXTRACT( R0, R2.L ) (Z); |
| R1 = EXTRACT( R1, R2.L ) (Z); |
| R3 = EXTRACT( R3, R2.L ) (Z); |
| R4 = EXTRACT( R4, R2.L ) (Z); |
| R5 = EXTRACT( R5, R2.L ) (Z); |
| R6 = EXTRACT( R6, R2.L ) (Z); |
| R7 = EXTRACT( R7, R2.L ) (Z); |
| R2 = EXTRACT( R2, R2.L ) (Z); |
| CHECKREG r0, 0x00006001; |
| CHECKREG r1, 0x00006001; |
| CHECKREG r2, 0x0000000F; |
| CHECKREG r3, 0x00000010; |
| CHECKREG r4, 0x00006004; |
| CHECKREG r5, 0x00006005; |
| CHECKREG r6, 0x00006006; |
| CHECKREG r7, 0x00006007; |
| |
| imm32 r0, 0x0b00f001; |
| imm32 r1, 0x0b00f001; |
| imm32 r2, 0x0b00f002; |
| imm32 r3, 0x0b000010; |
| imm32 r4, 0x0b00f004; |
| imm32 r5, 0x0b00f005; |
| imm32 r6, 0x0b00f006; |
| imm32 r7, 0x0b00f007; |
| R0 = EXTRACT( R0, R3.L ) (Z); |
| R1 = EXTRACT( R1, R3.L ) (Z); |
| R2 = EXTRACT( R2, R3.L ) (X); |
| R4 = EXTRACT( R4, R3.L ) (Z); |
| R5 = EXTRACT( R5, R3.L ) (Z); |
| R6 = EXTRACT( R6, R3.L ) (X); |
| R7 = EXTRACT( R7, R3.L ) (Z); |
| R3 = EXTRACT( R3, R3.L ) (Z); |
| CHECKREG r0, 0x0000F001; |
| CHECKREG r1, 0x0000F001; |
| CHECKREG r2, 0xFFFFF002; |
| CHECKREG r3, 0x00000010; |
| CHECKREG r4, 0x0000F004; |
| CHECKREG r5, 0x0000F005; |
| CHECKREG r6, 0xFFFFF006; |
| CHECKREG r7, 0x0000F007; |
| |
| imm32 r0, 0x0c0000c0; |
| imm32 r1, 0x0c0100c0; |
| imm32 r2, 0x0c0200c0; |
| imm32 r3, 0x0c0300c0; |
| imm32 r4, 0x0c04000c; |
| imm32 r5, 0x0c0500c0; |
| imm32 r6, 0x0c0600c0; |
| imm32 r7, 0x0c0700c0; |
| R0 = EXTRACT( R0, R4.L ) (Z); |
| R1 = EXTRACT( R1, R4.L ) (Z); |
| R2 = EXTRACT( R2, R4.L ) (Z); |
| R3 = EXTRACT( R3, R4.L ) (Z); |
| R5 = EXTRACT( R5, R4.L ) (X); |
| R6 = EXTRACT( R6, R4.L ) (Z); |
| R7 = EXTRACT( R7, R4.L ) (Z); |
| R4 = EXTRACT( R4, R4.L ) (Z); |
| CHECKREG r0, 0x000000C0; |
| CHECKREG r1, 0x000000C0; |
| CHECKREG r2, 0x000000C0; |
| CHECKREG r3, 0x000000C0; |
| CHECKREG r4, 0x0000000C; |
| CHECKREG r5, 0x000000C0; |
| CHECKREG r6, 0x000000C0; |
| CHECKREG r7, 0x000000C0; |
| |
| imm32 r0, 0xa00100d0; |
| imm32 r1, 0xa00100d1; |
| imm32 r2, 0xa00200d0; |
| imm32 r3, 0xa00300d0; |
| imm32 r4, 0xa00400d0; |
| imm32 r5, 0xa0050007; |
| imm32 r6, 0xa00600d0; |
| imm32 r7, 0xa00700d0; |
| R0 = EXTRACT( R0, R5.L ) (Z); |
| R1 = EXTRACT( R1, R5.L ) (X); |
| R2 = EXTRACT( R2, R5.L ) (Z); |
| R3 = EXTRACT( R3, R5.L ) (Z); |
| R4 = EXTRACT( R4, R5.L ) (X); |
| R6 = EXTRACT( R6, R5.L ) (Z); |
| R7 = EXTRACT( R7, R5.L ) (Z); |
| R5 = EXTRACT( R5, R5.L ) (Z); |
| CHECKREG r0, 0x00000050; |
| CHECKREG r1, 0xFFFFFFD1; |
| CHECKREG r2, 0x00000050; |
| CHECKREG r3, 0x00000050; |
| CHECKREG r4, 0xFFFFFFD0; |
| CHECKREG r5, 0x00000007; |
| CHECKREG r6, 0x00000050; |
| CHECKREG r7, 0x00000050; |
| |
| imm32 r0, 0xb0010000; |
| imm32 r1, 0xb0010000; |
| imm32 r2, 0xb002000f; |
| imm32 r3, 0xb0030000; |
| imm32 r4, 0xb0040000; |
| imm32 r5, 0xb0050000; |
| imm32 r6, 0xb0060009; |
| imm32 r7, 0xb0070000; |
| R0 = EXTRACT( R0, R6.L ) (Z); |
| R1 = EXTRACT( R1, R6.L ) (Z); |
| R2 = EXTRACT( R2, R6.L ) (Z); |
| R3 = EXTRACT( R3, R6.L ) (X); |
| R4 = EXTRACT( R4, R6.L ) (Z); |
| R5 = EXTRACT( R5, R6.L ) (Z); |
| R6 = EXTRACT( R6, R6.L ) (Z); |
| R7 = EXTRACT( R7, R6.L ) (Z); |
| CHECKREG r0, 0x00000000; |
| CHECKREG r1, 0x00000000; |
| CHECKREG r2, 0x0000000F; |
| CHECKREG r3, 0x00000000; |
| CHECKREG r4, 0x00000000; |
| CHECKREG r5, 0x00000000; |
| CHECKREG r6, 0x00000009; |
| CHECKREG r7, 0x00000000; |
| |
| imm32 r0, 0xd00100e0; |
| imm32 r1, 0xd00100e0; |
| imm32 r2, 0xd00200e0; |
| imm32 r3, 0xd00300e0; |
| imm32 r4, 0xd00400e0; |
| imm32 r5, 0xd00500e0; |
| imm32 r6, 0xd00600e0; |
| imm32 r7, 0xd0070023; |
| R1 = EXTRACT( R0, R7.L ) (Z); |
| R2 = EXTRACT( R1, R7.L ) (Z); |
| R3 = EXTRACT( R2, R7.L ) (Z); |
| R4 = EXTRACT( R3, R7.L ) (Z); |
| R5 = EXTRACT( R4, R7.L ) (X); |
| R6 = EXTRACT( R5, R7.L ) (Z); |
| R7 = EXTRACT( R6, R7.L ) (X); |
| R0 = EXTRACT( R7, R7.L ) (Z); |
| CHECKREG r0, 0x00000000; |
| CHECKREG r1, 0x00000000; |
| CHECKREG r2, 0x00000000; |
| CHECKREG r3, 0x00000000; |
| CHECKREG r4, 0x00000000; |
| CHECKREG r5, 0x00000000; |
| CHECKREG r6, 0x00000000; |
| CHECKREG r7, 0x00000000; |
| |
| |
| pass |