commit | fa16423949fc78b3d9c499eddefa91b99228fbc9 | [log] [tgz] |
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author | Jim Wilson <jimw@sifive.com> | Wed Feb 19 14:51:07 2020 -0800 |
committer | Jim Wilson <jimw@sifive.com> | Wed Feb 19 14:51:07 2020 -0800 |
tree | a7092b040556f52f3d0e236b1786524a0f32bb07 | |
parent | 741cb83912fffbc65784168204ce1a597e0fbd26 [diff] |
RISC-V: Convert the ADD/ADDI to the compressed MV/LI if RS1 is zero. 2020-02-19 Nelson Chu <nelson.chu@sifive.com> gas/ * testsuite/gas/riscv/c-add-addi.d: New testcase. * testsuite/gas/riscv/c-add-addi.s: Likewise. opcodes/ * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed c.mv/c.li if rs1 is zero. Change-Id: Id939b5e6db80d267a832545f3ffef7b9ba881f7d