/* Target dependent code for ARC processor family, for GDB, the GNU debugger.

   Copyright 2005, 2008, 2009 Free Software Foundation, Inc.

   Contributed by Codito Technologies Pvt. Ltd. (www.codito.com)

   Authors:
      Sameer Dhavale  <sameer.dhavale@codito.com>
      Soam Vasani     <soam.vasani@codito.com>
      Richard Stuckey <richard.stuckey@arc.com>

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

/******************************************************************************/
/*                                                                            */
/* Outline:                                                                   */
/*     This header file defines the JTAG interface to an ARC processor.       */
/*                                                                            */
/*     Operations are provided for:                                           */
/*        1) controlling the interface                                        */
/*        2) reading/writing the core registers of the processor              */
/*        3) reading/writing the auxiliary registers of the processor         */
/*        4) reading/writing single words in the target memory                */
/*        5) reading/writing blocks in the target memory                      */
/*                                                                            */
/*     The addresses specified for the memory word read/write operations must */
/*     be word-aligned.  Those specified for the memory block read/write      */
/*     operations may have any alignment; these operations may transfer an    */
/*     arbitrary number of bytes.                                             */
/*                                                                            */
/* Usage:                                                                     */
/*     The module exports a global variable arc_jtag_ops which holds pointers */
/*     to the functions for the operations, as well as some state information.*/
/*     This variable is initialized by the module's initialization function   */
/*     which must be called before any use is made of the module (N.B. the    */
/*     call to this function is generated by the gdb build mechanism, so this */
/*     function should not be explicitly called).                             */
/*                                                                            */
/*     The variable arc_jtag_ops.retry_count controls how many repeated       */
/*     attempts are made if a read/write operation fail; this variable is     */
/*     initially set to 50.                                                   */
/*                                                                            */
/* Debugging Facilities:                                                      */
/*     If the variable arc_jtag_ops.state_machine_debug is set to TRUE then   */
/*     trace information will be output.                                      */
/*                                                                            */
/* Host/Target Byte Order:                                                    */
/*     The register contents returned by the read/write aux/core register     */
/*     functions, or supplied to them, are in little-endian byte order.       */
/*                                                                            */
/*     The memory contents returned by the read/write word/chunk/pattern      */
/*     functions, or supplied to them, are in host byte order; the functions  */
/*     perform whatever byte-swapping is required by the endiannness of the   */
/*     target.                                                                */
/*                                                                            */
/******************************************************************************/

#ifndef ARC_JTAG_OPS
#define ARC_JTAG_OPS

/* ARC header files */
#include "arc-support.h"


#define ARC_TARGET_NAME     "arcjtag"


typedef enum
{
    JTAG_SUCCESS,
    JTAG_READ_FAILURE,
    JTAG_WRITE_FAILURE
} JTAG_OperationStatus;


typedef enum
{
    JTAG_OPENED,
    JTAG_CLOSED
} JTAG_Status;


typedef struct
{
    JTAG_Status  status;
    unsigned int retry_count;
    Boolean      state_machine_debug;

    Boolean (*open)        (ARC_RegisterNumber mem_subsys);
    void    (*close)       (void);
    void    (*reset)       (void);
    void    (*reset_board) (void);
    void    (*check_open)  (void);

    /* These operations return the number of bytes read/written.  */
    unsigned int (*memory_read_word)     (ARC_Address address, ARC_Word *data);                          /* single word.  */
    unsigned int (*memory_write_word)    (ARC_Address address, ARC_Word  data);                          /* single word.  */
    unsigned int (*memory_read_chunk)    (ARC_Address address, ARC_Byte *data,    unsigned int words);   /* block.        */
    unsigned int (*memory_write_chunk)   (ARC_Address address, ARC_Byte *data,    unsigned int words);   /* block.        */
    unsigned int (*memory_write_pattern) (ARC_Address address, ARC_Word  pattern, unsigned int words);   /* block.        */

    JTAG_OperationStatus (*read_aux_reg)   (ARC_RegisterNumber reg, ARC_RegisterContents *contents);
    JTAG_OperationStatus (*write_aux_reg)  (ARC_RegisterNumber reg, ARC_RegisterContents  contents);
    JTAG_OperationStatus (*read_core_reg)  (ARC_RegisterNumber reg, ARC_RegisterContents *contents);
    JTAG_OperationStatus (*write_core_reg) (ARC_RegisterNumber reg, ARC_RegisterContents  contents);
} JTAG_Operations;


extern JTAG_Operations arc_jtag_ops;


#endif /* ARC_JTAG_OPS */
/******************************************************************************/