| # Makefile template for Configure for the MIPS simulator. |
| # Written by Cygnus Support. |
| |
| ## COMMON_PRE_CONFIG_FRAG |
| |
| # Object files created by various simulator generators. |
| |
| |
| SIM_IGEN_OBJ = \ |
| support.o \ |
| itable.o \ |
| semantics.o \ |
| idecode.o \ |
| icache.o \ |
| engine.o \ |
| irun.o \ |
| |
| |
| SIM_M16_OBJ = \ |
| m16_support.o \ |
| m16_semantics.o \ |
| m16_idecode.o \ |
| m16_icache.o \ |
| \ |
| m32_support.o \ |
| m32_semantics.o \ |
| m32_idecode.o \ |
| m32_icache.o \ |
| \ |
| itable.o \ |
| m16run.o \ |
| |
| SIM_MICROMIPS_OBJ = \ |
| micromips16_support.o \ |
| micromips16_semantics.o \ |
| micromips16_idecode.o \ |
| micromips16_icache.o \ |
| \ |
| micromips32_support.o \ |
| micromips32_semantics.o \ |
| micromips32_idecode.o \ |
| micromips32_icache.o \ |
| \ |
| micromips_m32_support.o \ |
| micromips_m32_semantics.o \ |
| micromips_m32_idecode.o \ |
| micromips_m32_icache.o \ |
| \ |
| itable.o \ |
| micromipsrun.o \ |
| |
| |
| SIM_MULTI_OBJ = @sim_multi_obj@ \ |
| itable.o \ |
| multi-run.o \ |
| |
| SIM_OBJS = \ |
| interp.o \ |
| $(SIM_@sim_gen@_OBJ) \ |
| $(SIM_NEW_COMMON_OBJS) \ |
| cp1.o \ |
| mdmx.o \ |
| dsp.o \ |
| sim-main.o \ |
| sim-resume.o \ |
| |
| SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio |
| |
| # List of flags to always pass to $(CC). |
| SIM_SUBTARGET=@SIM_SUBTARGET@ |
| SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET) |
| |
| SIM_EXTRA_CLEAN = clean-extra |
| SIM_EXTRA_DISTCLEAN = distclean-extra |
| |
| all: $(SIM_@sim_gen@_ALL) |
| |
| SIM_EXTRA_DEPS = itable.h |
| |
| # Some modules don't build cleanly yet. |
| cp1.o: SIM_WERROR_CFLAGS = |
| |
| ## COMMON_POST_CONFIG_FRAG |
| |
| IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all |
| IGEN_INSN=$(srcdir)/mips.igen |
| IGEN_DC=$(srcdir)/mips.dc |
| M16_DC=$(srcdir)/m16.dc |
| MICROMIPS32_DC=$(srcdir)/micromips.dc |
| MICROMIPS16_DC=$(srcdir)/micromips16.dc |
| IGEN_INCLUDE=\ |
| $(srcdir)/micromipsdsp.igen \ |
| $(srcdir)/micromips.igen \ |
| $(srcdir)/m16.igen \ |
| $(srcdir)/m16e.igen \ |
| $(srcdir)/mdmx.igen \ |
| $(srcdir)/mips3d.igen \ |
| $(srcdir)/sb1.igen \ |
| $(srcdir)/tx.igen \ |
| $(srcdir)/vr.igen \ |
| $(srcdir)/dsp.igen \ |
| $(srcdir)/dsp2.igen \ |
| $(srcdir)/mips3264r2.igen \ |
| |
| # NB: Since these can be built by a number of generators, care |
| # must be taken to ensure that they are only dependant on |
| # one of those generators. |
| BUILT_SRC_FROM_GEN = \ |
| itable.h \ |
| itable.c \ |
| |
| SIM_IGEN_ALL = tmp-igen |
| SIM_M16_ALL = tmp-m16 |
| SIM_MICROMIPS_ALL = tmp-micromips |
| SIM_MULTI_ALL = tmp-multi |
| |
| $(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL) |
| |
| |
| |
| BUILT_SRC_FROM_IGEN = \ |
| icache.h \ |
| icache.c \ |
| idecode.h \ |
| idecode.c \ |
| semantics.h \ |
| semantics.c \ |
| model.h \ |
| model.c \ |
| support.h \ |
| support.c \ |
| engine.h \ |
| engine.c \ |
| irun.c \ |
| |
| $(BUILT_SRC_FROM_IGEN): tmp-igen |
| |
| tmp-igen: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) |
| $(ECHO_IGEN) $(IGEN_RUN) \ |
| $(IGEN_TRACE) \ |
| -I $(srcdir) \ |
| -Werror \ |
| -Wnodiscard \ |
| @sim_igen_flags@ \ |
| -G gen-direct-access \ |
| -G gen-zero-r0 \ |
| -B 32 \ |
| -H 31 \ |
| -i $(IGEN_INSN) \ |
| -o $(IGEN_DC) \ |
| -x \ |
| -n icache.h -hc tmp-icache.h \ |
| -n icache.c -c tmp-icache.c \ |
| -n semantics.h -hs tmp-semantics.h \ |
| -n semantics.c -s tmp-semantics.c \ |
| -n idecode.h -hd tmp-idecode.h \ |
| -n idecode.c -d tmp-idecode.c \ |
| -n model.h -hm tmp-model.h \ |
| -n model.c -m tmp-model.c \ |
| -n support.h -hf tmp-support.h \ |
| -n support.c -f tmp-support.c \ |
| -n itable.h -ht tmp-itable.h \ |
| -n itable.c -t tmp-itable.c \ |
| -n engine.h -he tmp-engine.h \ |
| -n engine.c -e tmp-engine.c \ |
| -n irun.c -r tmp-irun.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h icache.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c icache.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h idecode.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c idecode.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h semantics.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c semantics.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h model.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c model.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h support.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c support.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.h engine.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-engine.c engine.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-irun.c irun.c |
| $(SILENCE) touch $@ |
| |
| BUILT_SRC_FROM_M16 = \ |
| m16_icache.h \ |
| m16_icache.c \ |
| m16_idecode.h \ |
| m16_idecode.c \ |
| m16_semantics.h \ |
| m16_semantics.c \ |
| m16_model.h \ |
| m16_model.c \ |
| m16_support.h \ |
| m16_support.c \ |
| \ |
| m32_icache.h \ |
| m32_icache.c \ |
| m32_idecode.h \ |
| m32_idecode.c \ |
| m32_semantics.h \ |
| m32_semantics.c \ |
| m32_model.h \ |
| m32_model.c \ |
| m32_support.h \ |
| m32_support.c \ |
| |
| $(BUILT_SRC_FROM_M16): tmp-m16 |
| |
| tmp-m16: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) |
| $(ECHO_IGEN) $(IGEN_RUN) \ |
| $(IGEN_TRACE) \ |
| -I $(srcdir) \ |
| -Werror \ |
| -Wnodiscard \ |
| @sim_m16_flags@ \ |
| -G gen-direct-access \ |
| -G gen-zero-r0 \ |
| -B 16 \ |
| -H 15 \ |
| -i $(IGEN_INSN) \ |
| -o $(M16_DC) \ |
| -P m16_ \ |
| -x \ |
| -n m16_icache.h -hc tmp-icache.h \ |
| -n m16_icache.c -c tmp-icache.c \ |
| -n m16_semantics.h -hs tmp-semantics.h \ |
| -n m16_semantics.c -s tmp-semantics.c \ |
| -n m16_idecode.h -hd tmp-idecode.h \ |
| -n m16_idecode.c -d tmp-idecode.c \ |
| -n m16_model.h -hm tmp-model.h \ |
| -n m16_model.c -m tmp-model.c \ |
| -n m16_support.h -hf tmp-support.h \ |
| -n m16_support.c -f tmp-support.c \ |
| # |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h m16_icache.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c m16_icache.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h m16_idecode.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c m16_idecode.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h m16_semantics.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c m16_semantics.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h m16_model.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c m16_model.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h m16_support.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c m16_support.c |
| $(ECHO_IGEN) $(IGEN_RUN) \ |
| $(IGEN_TRACE) \ |
| -I $(srcdir) \ |
| -Werror \ |
| -Wnodiscard \ |
| @sim_igen_flags@ \ |
| -G gen-direct-access \ |
| -G gen-zero-r0 \ |
| -B 32 \ |
| -H 31 \ |
| -i $(IGEN_INSN) \ |
| -o $(IGEN_DC) \ |
| -P m32_ \ |
| -x \ |
| -n m32_icache.h -hc tmp-icache.h \ |
| -n m32_icache.c -c tmp-icache.c \ |
| -n m32_semantics.h -hs tmp-semantics.h \ |
| -n m32_semantics.c -s tmp-semantics.c \ |
| -n m32_idecode.h -hd tmp-idecode.h \ |
| -n m32_idecode.c -d tmp-idecode.c \ |
| -n m32_model.h -hm tmp-model.h \ |
| -n m32_model.c -m tmp-model.c \ |
| -n m32_support.h -hf tmp-support.h \ |
| -n m32_support.c -f tmp-support.c \ |
| # |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h m32_icache.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c m32_icache.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h m32_idecode.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c m32_idecode.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h m32_semantics.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c m32_semantics.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h m32_model.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c m32_model.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h m32_support.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c m32_support.c |
| $(ECHO_IGEN) $(IGEN_RUN) \ |
| $(IGEN_TRACE) \ |
| -I $(srcdir) \ |
| -Werror \ |
| -Wnodiscard \ |
| -Wnowidth \ |
| @sim_igen_flags@ @sim_m16_flags@ \ |
| -G gen-direct-access \ |
| -G gen-zero-r0 \ |
| -i $(IGEN_INSN) \ |
| -n itable.h -ht tmp-itable.h \ |
| -n itable.c -t tmp-itable.c \ |
| # |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c |
| $(SILENCE) touch $@ |
| |
| BUILT_SRC_FROM_MICROMIPS = \ |
| micromips16_icache.h \ |
| micromips16_icache.c \ |
| micromips16_idecode.h \ |
| micromips16_idecode.c \ |
| micromips16_semantics.h \ |
| micromips16_semantics.c \ |
| micromips16_model.h \ |
| micromips16_model.c \ |
| micromips16_support.h \ |
| micromips16_support.c \ |
| \ |
| micromips32_icache.h \ |
| micromips32_icache.c \ |
| micromips32_idecode.h \ |
| micromips32_idecode.c \ |
| micromips32_semantics.h \ |
| micromips32_semantics.c \ |
| micromips32_model.h \ |
| micromips32_model.c \ |
| micromips32_support.h \ |
| micromips32_support.c \ |
| \ |
| micromips_m32_icache.h \ |
| micromips_m32_icache.c \ |
| micromips_m32_idecode.h \ |
| micromips_m32_idecode.c \ |
| micromips_m32_semantics.h \ |
| micromips_m32_semantics.c \ |
| micromips_m32_model.h \ |
| micromips_m32_model.c \ |
| micromips_m32_support.h \ |
| micromips_m32_support.c \ |
| |
| $(BUILT_SRC_FROM_MICROMIPS): tmp-micromips |
| |
| tmp-micromips: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) |
| $(ECHO_IGEN) $(IGEN_RUN) \ |
| $(IGEN_TRACE) \ |
| -I $(srcdir) \ |
| -Werror \ |
| -Wnodiscard \ |
| @sim_micromips16_flags@ \ |
| -G gen-direct-access \ |
| -G gen-zero-r0 \ |
| -B 16 \ |
| -H 15 \ |
| -i $(IGEN_INSN) \ |
| -o $(MICROMIPS16_DC) \ |
| -P micromips16_ \ |
| -x \ |
| -n micromips16_icache.h -hc tmp-icache.h \ |
| -n micromips16_icache.c -c tmp-icache.c \ |
| -n micromips16_semantics.h -hs tmp-semantics.h \ |
| -n micromips16_semantics.c -s tmp-semantics.c \ |
| -n micromips16_idecode.h -hd tmp-idecode.h \ |
| -n micromips16_idecode.c -d tmp-idecode.c \ |
| -n micromips16_model.h -hm tmp-model.h \ |
| -n micromips16_model.c -m tmp-model.c \ |
| -n micromips16_support.h -hf tmp-support.h \ |
| -n micromips16_support.c -f tmp-support.c \ |
| # |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h micromips16_icache.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c micromips16_icache.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h micromips16_idecode.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c micromips16_idecode.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h micromips16_semantics.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c micromips16_semantics.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h micromips16_model.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c micromips16_model.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h micromips16_support.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c micromips16_support.c |
| $(ECHO_IGEN) $(IGEN_RUN) \ |
| $(IGEN_TRACE) \ |
| -I $(srcdir) \ |
| -Werror \ |
| -Wnodiscard \ |
| @sim_micromips_flags@ \ |
| -G gen-direct-access \ |
| -G gen-zero-r0 \ |
| -B 32 \ |
| -H 31 \ |
| -i $(IGEN_INSN) \ |
| -o $(MICROMIPS32_DC) \ |
| -P micromips32_ \ |
| -x \ |
| -n micromips32_icache.h -hc tmp-icache.h \ |
| -n micromips32_icache.c -c tmp-icache.c \ |
| -n micromips32_semantics.h -hs tmp-semantics.h \ |
| -n micromips32_semantics.c -s tmp-semantics.c \ |
| -n micromips32_idecode.h -hd tmp-idecode.h \ |
| -n micromips32_idecode.c -d tmp-idecode.c \ |
| -n micromips32_model.h -hm tmp-model.h \ |
| -n micromips32_model.c -m tmp-model.c \ |
| -n micromips32_support.h -hf tmp-support.h \ |
| -n micromips32_support.c -f tmp-support.c \ |
| # |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h micromips32_icache.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c micromips32_icache.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h micromips32_idecode.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c micromips32_idecode.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h micromips32_semantics.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c micromips32_semantics.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h micromips32_model.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c micromips32_model.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h micromips32_support.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c micromips32_support.c |
| $(ECHO_IGEN) $(IGEN_RUN) \ |
| $(IGEN_TRACE) \ |
| -I $(srcdir) \ |
| -Werror \ |
| -Wnodiscard \ |
| @sim_igen_flags@ \ |
| -G gen-direct-access \ |
| -G gen-zero-r0 \ |
| -B 32 \ |
| -H 31 \ |
| -i $(IGEN_INSN) \ |
| -o $(IGEN_DC) \ |
| -P micromips_m32_ \ |
| -x \ |
| -n micromips_m32_icache.h -hc tmp-icache.h \ |
| -n micromips_m32_icache.c -c tmp-icache.c \ |
| -n micromips_m32_semantics.h -hs tmp-semantics.h \ |
| -n micromips_m32_semantics.c -s tmp-semantics.c \ |
| -n micromips_m32_idecode.h -hd tmp-idecode.h \ |
| -n micromips_m32_idecode.c -d tmp-idecode.c \ |
| -n micromips_m32_model.h -hm tmp-model.h \ |
| -n micromips_m32_model.c -m tmp-model.c \ |
| -n micromips_m32_support.h -hf tmp-support.h \ |
| -n micromips_m32_support.c -f tmp-support.c \ |
| # |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.h micromips_m32_icache.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-icache.c micromips_m32_icache.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.h micromips_m32_idecode.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-idecode.c micromips_m32_idecode.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.h micromips_m32_semantics.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-semantics.c micromips_m32_semantics.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.h micromips_m32_model.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-model.c micromips_m32_model.c |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.h micromips_m32_support.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-support.c micromips_m32_support.c |
| $(ECHO_IGEN) $(IGEN_RUN) \ |
| $(IGEN_TRACE) \ |
| -I $(srcdir) \ |
| -Werror \ |
| -Wnodiscard \ |
| -Wnowidth \ |
| @sim_igen_flags@ @sim_micromips_flags@ @sim_micromips16_flags@\ |
| -G gen-direct-access \ |
| -G gen-zero-r0 \ |
| -i $(IGEN_INSN) \ |
| -n itable.h -ht tmp-itable.h \ |
| -n itable.c -t tmp-itable.c \ |
| # |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c |
| $(SILENCE) touch $@ |
| |
| BUILT_SRC_FROM_MULTI = @sim_multi_src@ |
| SIM_MULTI_IGEN_CONFIGS = @sim_multi_igen_configs@ |
| |
| $(BUILT_SRC_FROM_MULTI): tmp-multi |
| tmp-multi: tmp-mach-multi tmp-itable-multi tmp-run-multi targ-vals.h |
| tmp-mach-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) |
| for t in $(SIM_MULTI_IGEN_CONFIGS); do \ |
| p=`echo $${t} | sed -e 's/:.*//'` ; \ |
| m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \ |
| f=`echo $${t} | sed -e 's/.*://'` ; \ |
| case $${p} in \ |
| micromips16*) e="-B 16 -H 15 -o $(MICROMIPS16_DC) -F 16" ;; \ |
| micromips32* | micromips64*) \ |
| e="-B 32 -H 31 -o $(MICROMIPS32_DC) -F $${f}" ;; \ |
| micromips_m32*) \ |
| e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \ |
| m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \ |
| micromips_m64*) \ |
| e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}"; \ |
| m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \ |
| m16*) e="-B 16 -H 15 -o $(M16_DC) -F 16" ;; \ |
| *) e="-B 32 -H 31 -o $(IGEN_DC) -F $${f}" ;; \ |
| esac; \ |
| $(IGEN_RUN) \ |
| $(IGEN_TRACE) \ |
| $${e} \ |
| -I $(srcdir) \ |
| -Werror \ |
| -Wnodiscard \ |
| -N 0 \ |
| -M $${m} \ |
| -G gen-direct-access \ |
| -G gen-zero-r0 \ |
| -i $(IGEN_INSN) \ |
| -P $${p}_ \ |
| -x \ |
| -n $${p}_icache.h -hc tmp-icache.h \ |
| -n $${p}_icache.c -c tmp-icache.c \ |
| -n $${p}_semantics.h -hs tmp-semantics.h \ |
| -n $${p}_semantics.c -s tmp-semantics.c \ |
| -n $${p}_idecode.h -hd tmp-idecode.h \ |
| -n $${p}_idecode.c -d tmp-idecode.c \ |
| -n $${p}_model.h -hm tmp-model.h \ |
| -n $${p}_model.c -m tmp-model.c \ |
| -n $${p}_support.h -hf tmp-support.h \ |
| -n $${p}_support.c -f tmp-support.c \ |
| -n $${p}_engine.h -he tmp-engine.h \ |
| -n $${p}_engine.c -e tmp-engine.c \ |
| || exit; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h \ |
| $${p}_icache.h ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c \ |
| $${p}_icache.c ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h \ |
| $${p}_idecode.h ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c \ |
| $${p}_idecode.c ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h \ |
| $${p}_semantics.h ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c \ |
| $${p}_semantics.c ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-model.h \ |
| $${p}_model.h ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-model.c \ |
| $${p}_model.c ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-support.h \ |
| $${p}_support.h ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-support.c \ |
| $${p}_support.c ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-engine.h \ |
| $${p}_engine.h ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c \ |
| $${p}_engine.c ; \ |
| done |
| $(SILENCE) touch $@ |
| tmp-itable-multi: $(IGEN_INSN) $(IGEN_DC) $(IGEN) $(IGEN_INCLUDE) |
| $(ECHO_IGEN) $(IGEN_RUN) \ |
| $(IGEN_TRACE) \ |
| -I $(srcdir) \ |
| -Werror \ |
| -Wnodiscard \ |
| -Wnowidth \ |
| -N 0 \ |
| @sim_multi_flags@ \ |
| -G gen-direct-access \ |
| -G gen-zero-r0 \ |
| -i $(IGEN_INSN) \ |
| -n itable.h -ht tmp-itable.h \ |
| -n itable.c -t tmp-itable.c \ |
| # |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.h itable.h |
| $(SILENCE) $(SHELL) $(srcroot)/move-if-change tmp-itable.c itable.c |
| $(SILENCE) touch $@ |
| tmp-run-multi: $(srcdir)/m16run.c $(srcdir)/micromipsrun.c |
| for t in $(SIM_MULTI_IGEN_CONFIGS); do \ |
| case $${t} in \ |
| m16*) \ |
| m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \ |
| sed < $(srcdir)/m16run.c > tmp-run \ |
| -e "s/^sim_/m16$${m}_/" \ |
| -e "/include/s/sim-engine/m16$${m}_engine/" \ |
| -e "s/m16_/m16$${m}_/" \ |
| -e "s/m32_/m32$${m}_/" ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-run \ |
| m16$${m}_run.c ; \ |
| ;;\ |
| micromips32*) \ |
| m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \ |
| sed < $(srcdir)/micromipsrun.c > tmp-run \ |
| -e "s/^sim_/micromips32$${m}_/" \ |
| -e "/include/s/sim-engine/micromips32$${m}_engine/" \ |
| -e "s/micromips16_/micromips16$${m}_/" \ |
| -e "s/micromips32_/micromips32$${m}_/" \ |
| -e "s/m32_/m32$${m}_/" ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-run \ |
| micromips$${m}_run.c ; \ |
| ;;\ |
| micromips64*) \ |
| m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \ |
| sed < $(srcdir)/micromipsrun.c > tmp-run \ |
| -e "s/^sim_/micromips64$${m}_/" \ |
| -e "/include/s/sim-engine/micromips64$${m}_engine/" \ |
| -e "s/micromips16_/micromips16$${m}_/" \ |
| -e "s/micromips32_/micromips64$${m}_/" \ |
| -e "s/m32_/m64$${m}_/" ; \ |
| $(SHELL) $(srcdir)/../../move-if-change tmp-run \ |
| micromips$${m}_run.c ; \ |
| ;;\ |
| esac \ |
| done |
| $(SILENCE) touch $@ |
| |
| clean-extra: |
| rm -f $(BUILT_SRC_FROM_GEN) |
| rm -f $(BUILT_SRC_FROM_IGEN) |
| rm -f $(BUILT_SRC_FROM_M16) |
| rm -f $(BUILT_SRC_FROM_MICROMIPS) |
| rm -f $(BUILT_SRC_FROM_MULTI) |
| rm -f tmp-* |
| rm -f micromips16*.o micromips32*.o m16*.o m32*.o itable*.o |
| |
| distclean-extra: |
| rm -f multi-include.h multi-run.c |
