//Original:/testcases/core/c_regmv_pr_dr/c_regmv_pr_dr.dsp
// Spec Reference: regmv preg to dreg
# mach: bfin

.include "testutils.inc"
	start


imm32 r0, 0x00000001;
imm32 r1, 0x00020003;
imm32 r2, 0x00040005;
imm32 r3, 0x00060007;
imm32 r4, 0x00080009;
imm32 r5, 0x000a000b;
imm32 r6, 0x000c000d;
imm32 r7, 0x000e000f;

//imm32 p0, 0x00000001;
imm32 p1, 0x10082001;
imm32 p2, 0x10092002;
imm32 p3, 0x100a2003;
imm32 p4, 0x100b2004;
imm32 p5, 0x100c2005;
imm32 sp, 0x100d2006;
imm32 fp, 0x100e2007;

//--------- Preg to dreg : Rx <= Px ------


R0 = P1;
R1 = P1;
R2 = P1;
R3 = P1;
R4 = P1;
R5 = P1;
R6 = P1;
R7 = P1;
CHECKREG r1, 0x10082001;
CHECKREG r2, 0x10082001;
CHECKREG r3, 0x10082001;
CHECKREG r4, 0x10082001;
CHECKREG r5, 0x10082001;
CHECKREG r6, 0x10082001;
CHECKREG r7, 0x10082001;

R0 = P2;
R1 = P2;
R2 = P2;
R3 = P2;
R4 = P2;
R5 = P2;
R6 = P2;
R7 = P2;
CHECKREG r0, 0x10092002;
CHECKREG r1, 0x10092002;
CHECKREG r2, 0x10092002;
CHECKREG r3, 0x10092002;
CHECKREG r4, 0x10092002;
CHECKREG r5, 0x10092002;
CHECKREG r6, 0x10092002;
CHECKREG r7, 0x10092002;

R0 = P3;
R1 = P3;
R2 = P3;
R3 = P3;
R4 = P3;
R5 = P3;
R6 = P3;
R7 = P3;
CHECKREG r1, 0x100a2003;
CHECKREG r2, 0x100a2003;
CHECKREG r3, 0x100a2003;
CHECKREG r4, 0x100a2003;
CHECKREG r5, 0x100a2003;
CHECKREG r6, 0x100a2003;
CHECKREG r7, 0x100a2003;

R0 = P4;
R1 = P4;
R2 = P4;
R3 = P4;
R4 = P4;
R5 = P4;
R6 = P4;
R7 = P4;
CHECKREG r0, 0x100b2004;
CHECKREG r1, 0x100b2004;
CHECKREG r2, 0x100b2004;
CHECKREG r3, 0x100b2004;
CHECKREG r4, 0x100b2004;
CHECKREG r5, 0x100b2004;
CHECKREG r6, 0x100b2004;
CHECKREG r7, 0x100b2004;

R1 = P5;
R2 = P5;
R3 = P5;
R4 = P5;
R5 = P5;
R6 = P5;
R7 = P5;
CHECKREG r1, 0x100c2005;
CHECKREG r2, 0x100c2005;
CHECKREG r3, 0x100c2005;
CHECKREG r4, 0x100c2005;
CHECKREG r5, 0x100c2005;
CHECKREG r6, 0x100c2005;
CHECKREG r7, 0x100c2005;

R0 = SP;
R1 = SP;
R2 = SP;
R3 = SP;
R4 = SP;
R5 = SP;
R6 = SP;
R7 = SP;
CHECKREG r0, 0x100d2006;
CHECKREG r1, 0x100d2006;
CHECKREG r2, 0x100d2006;
CHECKREG r3, 0x100d2006;
CHECKREG r4, 0x100d2006;
CHECKREG r5, 0x100d2006;
CHECKREG r6, 0x100d2006;
CHECKREG r7, 0x100d2006;

R0 = FP;
R1 = FP;
R2 = FP;
R3 = FP;
R4 = FP;
R5 = FP;
R6 = FP;
R7 = FP;
CHECKREG r1, 0x100e2007;
CHECKREG r2, 0x100e2007;
CHECKREG r3, 0x100e2007;
CHECKREG r4, 0x100e2007;
CHECKREG r5, 0x100e2007;
CHECKREG r6, 0x100e2007;
CHECKREG r7, 0x100e2007;

pass